From 290317a9796d8f42c5f4f1cc5b4714e6897d80ad Mon Sep 17 00:00:00 2001 From: Nao Pross Date: Sat, 22 May 2021 01:08:34 +0200 Subject: Start testing --- tex/statemachines.tex | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) (limited to 'tex/statemachines.tex') diff --git a/tex/statemachines.tex b/tex/statemachines.tex index 9fb47e2..967737b 100644 --- a/tex/statemachines.tex +++ b/tex/statemachines.tex @@ -1,5 +1,4 @@ \section{State Machines} -There are 3 types of state machines. \begin{figure}[h] \centering \ttfamily @@ -65,21 +64,20 @@ There are 3 types of state machines. \end{figure} \subsection{Encoding the state} -This is typical for Mealey and Moore machines. +For Mealey and Moore machines it is typical to write: \begin{lstlisting}[language=vhdl] type state_type is (st_rst, st_a, st_b, st_c, ...); signal present_state, next_state : state_type; \end{lstlisting} -The encoding of the state is left automatically to the synthesizer or -configured in the graphical interface of the tool. If a custom encoding is -required (Medwedjew), adding the following generates a custom encoding. +The encoding of the state is left to the synthesizer or can be configured in +the graphical interface of the tool. If a custom encoding is required +(Medwedjew), adding the following generates a custom encoding. \begin{lstlisting}[language=vhdl] attribute enum_encoding : string; attribute enum_encoding of state_type: type is "0001 0010 0100 ..."; \end{lstlisting} - -Or alternatively a completely different approach is using a vector type. +Or an equivalent approach is to use a vector subtype and constants. \begin{lstlisting}[language=vhdl] subtype state_type is bit_vector(3 downto 0); -- cgit v1.2.1