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authorNao Pross <naopross@thearcway.org>2018-05-04 18:27:12 +0200
committerNao Pross <naopross@thearcway.org>2018-05-04 18:27:12 +0200
commit5e8e628da03121323351e54e6866826288e4c4bd (patch)
tree4b3476cec9c295b5c633ea6b801815a131e2780b /hal/hwconfig.cpp
parentAdd templated generic implementaions for uart, rename uart1.tpp to uart.tpp (diff)
downloadSAMLiquidSmoke-5e8e628da03121323351e54e6866826288e4c4bd.tar.gz
SAMLiquidSmoke-5e8e628da03121323351e54e6866826288e4c4bd.zip
Implement most of basic HAL
Oscillator: The oscillator is configured correctly. Interrupts: RX uart interrupts work. The global interrupt vector table is enabled. UART: RX features work.
Diffstat (limited to '')
-rw-r--r--hal/hwconfig.cpp39
1 files changed, 39 insertions, 0 deletions
diff --git a/hal/hwconfig.cpp b/hal/hwconfig.cpp
new file mode 100644
index 0000000..a3b4b46
--- /dev/null
+++ b/hal/hwconfig.cpp
@@ -0,0 +1,39 @@
+#include "hwconfig.hpp"
+
+extern "C" {
+#include <xc.h>
+}
+
+void hw::reglock()
+{
+ SYSKEY = 0x00000000;
+}
+
+void hw::regunlock()
+{
+ SYSKEY = 0x12345678;
+ SYSKEY = 0xAA996655;
+ SYSKEY = 0x556699AA;
+}
+
+void osc::initialize()
+{
+ hw::regunlock();
+ // CF no clock failure; COSC FRCDIV; PLLODIV DIV_256; UFRCEN disabled; PBDIVRDY disabled; SLOCK out of lock; FRCDIV FRC/1; SLPEN Idle on WAIT instruction; NOSC FRCDIV; PLLMULT MUL_24; SOSCEN disabled; PBDIV DIV_8; CLKLOCK unlocked; OSWEN Switch is Complete; SOSCRDY disabled;
+ OSCCON = 0x381F7700;
+ hw::reglock();
+ // TUN Center Frequency;
+ OSCTUN = 0x0;
+ // DIVSWEN disabled; RSLP disabled; ACTIVE Active; ROSEL SYSCLK; OE Not Driven out on REFCLKO pin; SIDL disabled; RODIV 0; ON disabled;
+ REFOCON = 0x100;
+ // ROTRIM 0;
+ REFOTRIM = 0x0;
+}
+
+void interrupts::initialize()
+{
+ // Enable the multi vector
+ INTCONbits.MVEC = 1;
+ // Enable Global Interrupts
+ __builtin_mtc0(12,0,(__builtin_mfc0(12,0) | 0x0001));
+} \ No newline at end of file