From 51a827c0c9f45683228177b8ac7ffe140613e982 Mon Sep 17 00:00:00 2001 From: Nao Pross Date: Fri, 4 May 2018 01:39:50 +0200 Subject: Fix indent, replace tabs with spaces --- hal/pin.hpp | 26 +++++++-------- hal/pin.tpp | 52 ++++++++++++++--------------- hal/uart.hpp | 58 ++++++++++++++++----------------- hal/uart1.tpp | 52 ++++++++++++++--------------- mcc_generated_files/interrupt_manager.h | 2 +- mcc_generated_files/mcc.c | 2 +- mcc_generated_files/mcc.h | 6 ++-- mcc_generated_files/pin_manager.c | 2 +- mcc_generated_files/uart1.c | 6 ++-- mcc_generated_files/uart1.h | 10 +++--- 10 files changed, 108 insertions(+), 108 deletions(-) diff --git a/hal/pin.hpp b/hal/pin.hpp index 6625f90..384c0c7 100644 --- a/hal/pin.hpp +++ b/hal/pin.hpp @@ -6,20 +6,20 @@ */ #ifndef PIN_HPP -#define PIN_HPP +#define PIN_HPP template class pin { public: - enum class mode : unsigned - { INPUT = 1, OUTPUT = 0 }; + enum class mode : unsigned + { INPUT = 1, OUTPUT = 0 }; - enum class state : unsigned - { ON = 1, OFF = 0 }; + enum class state : unsigned + { ON = 1, OFF = 0 }; - pin() = delete; + pin() = delete; - template + template pin(latch_T *latch, tris_T *tris, port_T *port); virtual ~pin(); @@ -27,9 +27,9 @@ public: void set_mode(unsigned m); void set_mode(mode m); - state read() const; + state read() const; - void set(unsigned s); + void set(unsigned s); void set(state s); void toggle(); @@ -38,9 +38,9 @@ public: bool operator!=(const pin &other) const; private: - volatile uint8_t *_latch; - volatile uint8_t *_tris; - volatile uint8_t *_port; + volatile uint8_t *_latch; + volatile uint8_t *_tris; + volatile uint8_t *_port; }; -#endif /* PIN_HPP */ \ No newline at end of file +#endif /* PIN_HPP */ diff --git a/hal/pin.tpp b/hal/pin.tpp index c3c005f..c6cf957 100644 --- a/hal/pin.tpp +++ b/hal/pin.tpp @@ -11,13 +11,13 @@ template template pin::pin(latch_T *latch, tris_T *tris, port_T *port) : - _latch(reinterpret_cast(latch)), - _tris(reinterpret_cast(tris)), - _port(reinterpret_cast(port)) + _latch(reinterpret_cast(latch)), + _tris(reinterpret_cast(tris)), + _port(reinterpret_cast(port)) { - // default settings - set_mode(pin::mode::OUTPUT); - set(pin::state::OFF); + // default settings + set_mode(pin::mode::OUTPUT); + set(pin::state::OFF); } @@ -31,58 +31,58 @@ pin::~pin() template void pin::set_mode(unsigned m) { - if (m) - *_tris |= 1< void pin::set_mode(pin::mode m) { - set(static_cast(m)); + set(static_cast(m)); } template typename pin::state pin::read() const { - if (*_tris & (1< void pin::set(unsigned s) { - if (s) - *_latch |= 1< void pin::set(pin::state s) { - set(static_cast(s)); + set(static_cast(s)); } template void pin::toggle() { - *_latch ^= 1< bool pin::operator==(const pin &other) const { - return (_latch == other._latch - && _tris == other._tris - && _port == other._port); + return (_latch == other._latch + && _tris == other._tris + && _port == other._port); } template bool pin::operator!=(const pin &other) const { - return !(*this == other); -} \ No newline at end of file + return !(*this == other); +} diff --git a/hal/uart.hpp b/hal/uart.hpp index 179dd4a..461f0fa 100644 --- a/hal/uart.hpp +++ b/hal/uart.hpp @@ -6,7 +6,7 @@ */ #ifndef UART_HPP -#define UART_HPP +#define UART_HPP #include #include @@ -21,33 +21,33 @@ void usart_4_isr(); namespace uart { - const unsigned devices_count = 4; - - enum class status : unsigned int - { - rx_data_available = 1<<0, - rx_overrun_error = 1<<1, - framing_error = 1<<2, - parity_error = 1<<3, - receiver_ide = 1<<4, - tx_complete = 1<<8, - tx_full = 1<<9, - }; - - enum class transfer_status : unsigned int - { - rx_full = 1<<0, - rx_data_present = 1<<1, - rx_empty = 1<<2, - tx_full = 1<<3, - tx_empty = 1<<4, - }; - - std::string rx_buffer[devices_count]; - std::string tx_buffer[devices_count]; - - template - void initialize(); + const unsigned devices_count = 4; + + enum class status : unsigned int + { + rx_data_available = 1<<0, + rx_overrun_error = 1<<1, + framing_error = 1<<2, + parity_error = 1<<3, + receiver_ide = 1<<4, + tx_complete = 1<<8, + tx_full = 1<<9, + }; + + enum class transfer_status : unsigned int + { + rx_full = 1<<0, + rx_data_present = 1<<1, + rx_empty = 1<<2, + tx_full = 1<<3, + tx_empty = 1<<4, + }; + + std::string rx_buffer[devices_count]; + std::string tx_buffer[devices_count]; + + template + void initialize(); template uint8_t peek(uint16_t offset); @@ -83,5 +83,5 @@ namespace uart bool tx_buffer_full(); } -#endif /* UART_HPP */ +#endif /* UART_HPP */ diff --git a/hal/uart1.tpp b/hal/uart1.tpp index 9526650..544ec73 100644 --- a/hal/uart1.tpp +++ b/hal/uart1.tpp @@ -15,36 +15,36 @@ extern "C" { void __ISR(_UART_1_VECTOR, IPL1AUTO) usart_1_isr() { - if (IFS1bits.U1RXIF) { - uart::rx_buffer[0].push_back(static_cast(U1RXREG)); + if (IFS1bits.U1RXIF) { + uart::rx_buffer[0].push_back(static_cast(U1RXREG)); - IFS1bits.U1RXIF = 0; - } else if (IFS1bits.U1TXIF) { + IFS1bits.U1RXIF = 0; + } else if (IFS1bits.U1TXIF) { IFS1bits.U1TXIF = 0; - } + } } namespace uart { - template<> - void initialize<1>() - { - // STSEL 1S; IREN disabled; PDSEL 8N; RTSMD disabled; RXINV disabled; SIDL disabled; WAKE disabled; ABAUD disabled; LPBACK disabled; BRGH enabled; UEN TX_RX; ON enabled; - U1MODE = 0x8008; - // UTXISEL TX_ONE_CHAR; UTXINV disabled; ADDR 0; URXEN disabled; OERR disabled; ADM_EN disabled; URXISEL RX_ONE_CHAR; UTXBRK disabled; UTXEN disabled; ADDEN disabled; - U1STA = 0x0; - // U1TXREG 0; - U1TXREG = 0x0; - // BaudRate = 9600; Frequency = 1000000 Hz; BRG 25; - U1BRG = 0x19; - - IEC1bits.U1RXIE = 1; - - U1STAbits.UTXEN = 1; - U1STAbits.URXEN = 1; - - //Enabling UART - U1MODEbits.ON = 1; - } -} \ No newline at end of file + template<> + void initialize<1>() + { + // STSEL 1S; IREN disabled; PDSEL 8N; RTSMD disabled; RXINV disabled; SIDL disabled; WAKE disabled; ABAUD disabled; LPBACK disabled; BRGH enabled; UEN TX_RX; ON enabled; + U1MODE = 0x8008; + // UTXISEL TX_ONE_CHAR; UTXINV disabled; ADDR 0; URXEN disabled; OERR disabled; ADM_EN disabled; URXISEL RX_ONE_CHAR; UTXBRK disabled; UTXEN disabled; ADDEN disabled; + U1STA = 0x0; + // U1TXREG 0; + U1TXREG = 0x0; + // BaudRate = 9600; Frequency = 1000000 Hz; BRG 25; + U1BRG = 0x19; + + IEC1bits.U1RXIE = 1; + + U1STAbits.UTXEN = 1; + U1STAbits.URXEN = 1; + + //Enabling UART + U1MODEbits.ON = 1; + } +} diff --git a/mcc_generated_files/interrupt_manager.h b/mcc_generated_files/interrupt_manager.h index 83dac16..39fc377 100644 --- a/mcc_generated_files/interrupt_manager.h +++ b/mcc_generated_files/interrupt_manager.h @@ -83,4 +83,4 @@ void INTERRUPT_Initialize(void); } #endif -#endif \ No newline at end of file +#endif diff --git a/mcc_generated_files/mcc.c b/mcc_generated_files/mcc.c index 7f3a675..70dfcaa 100644 --- a/mcc_generated_files/mcc.c +++ b/mcc_generated_files/mcc.c @@ -157,4 +157,4 @@ void _general_exception_handler () #ifdef __cplusplus } -#endif \ No newline at end of file +#endif diff --git a/mcc_generated_files/mcc.h b/mcc_generated_files/mcc.h index 8fc44bf..fff8452 100644 --- a/mcc_generated_files/mcc.h +++ b/mcc_generated_files/mcc.h @@ -44,7 +44,7 @@ */ #ifndef MCC_H -#define MCC_H +#define MCC_H #ifdef __cplusplus extern "C" { @@ -137,7 +137,7 @@ void _general_exception_handler (void); } #endif -#endif /* MCC_H */ +#endif /* MCC_H */ /** End of File -*/ \ No newline at end of file +*/ diff --git a/mcc_generated_files/pin_manager.c b/mcc_generated_files/pin_manager.c index b0d4a93..32e358c 100644 --- a/mcc_generated_files/pin_manager.c +++ b/mcc_generated_files/pin_manager.c @@ -135,4 +135,4 @@ void PIN_MANAGER_Initialize(void) #ifdef __cplusplus } -#endif \ No newline at end of file +#endif diff --git a/mcc_generated_files/uart1.c b/mcc_generated_files/uart1.c index bf35ee3..3c31d6d 100644 --- a/mcc_generated_files/uart1.c +++ b/mcc_generated_files/uart1.c @@ -18,7 +18,7 @@ Driver Version : 0.5 The generated drivers are tested against the following: Compiler : XC32 1.42 - MPLAB : MPLAB X 3.55 + MPLAB : MPLAB X 3.55 */ /* @@ -287,7 +287,7 @@ void UART1_Write(const uint8_t byte) } IEC1bits.U1TXIE = true ; - + } @@ -395,4 +395,4 @@ UART1_STATUS UART1_StatusGet (void) #ifdef __cplusplus } -#endif \ No newline at end of file +#endif diff --git a/mcc_generated_files/uart1.h b/mcc_generated_files/uart1.h index bd3971a..44a9e9a 100644 --- a/mcc_generated_files/uart1.h +++ b/mcc_generated_files/uart1.h @@ -18,7 +18,7 @@ Driver Version : 0.5 The generated drivers are tested against the following: Compiler : XC32 1.42 - MPLAB : MPLAB X 3.55 + MPLAB : MPLAB X 3.55 */ /* @@ -473,10 +473,10 @@ uint8_t UART1_Peek(uint16_t offset); UART1__Initializer(); while(size < readbufferLen) - { - UART1_TasksReceive ( ); - size = UART1_ReceiveBufferSizeGet(); - } + { + UART1_TasksReceive ( ); + size = UART1_ReceiveBufferSizeGet(); + } numBytes = UART1_ReadBuffer ( readBuffer , readbufferLen ) ; -- cgit v1.2.1