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-rw-r--r--hw/Project Logs for Steps/Piezo SCH ECO 22.01.2018 09-20-08.LOG5
-rw-r--r--hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-25-04.LOG51
-rw-r--r--hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-26-23.LOG51
-rw-r--r--hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-29.LOG44
-rw-r--r--hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-59.LOG51
-rw-r--r--hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-52-31.LOG289
-rw-r--r--hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-58-00.LOG1
-rw-r--r--hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-59-52.LOG1
-rw-r--r--hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG33
-rw-r--r--hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-16-32.LOG37
-rw-r--r--hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-17-29.LOG1
-rw-r--r--hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-22-54.LOG10
-rw-r--r--hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 11-47-37.LOG1
-rw-r--r--hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 08-59-04.LOG9
-rw-r--r--hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-10-29.LOG9
-rw-r--r--hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-20-08.LOG21
-rw-r--r--hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-21-22.LOG9
17 files changed, 623 insertions, 0 deletions
diff --git a/hw/Project Logs for Steps/Piezo SCH ECO 22.01.2018 09-20-08.LOG b/hw/Project Logs for Steps/Piezo SCH ECO 22.01.2018 09-20-08.LOG
new file mode 100644
index 0000000..528e92c
--- /dev/null
+++ b/hw/Project Logs for Steps/Piezo SCH ECO 22.01.2018 09-20-08.LOG
@@ -0,0 +1,5 @@
+Replace Part D1 Diode BAT18 in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with Diode BAT18 from Miscellaneous Devices.IntLib
+Replace Part D2 Diode BAT18 in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with Diode BAT18 from Miscellaneous Devices.IntLib
+Replace Part R1 Res2 in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with Res2 from Miscellaneous Devices.IntLib
+Replace Part R2 Res2 in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with Res2 from Miscellaneous Devices.IntLib
+Replace Part Y1 XTAL in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with XTAL from Miscellaneous Devices.IntLib
diff --git a/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-25-04.LOG b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-25-04.LOG
new file mode 100644
index 0000000..17d18c2
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-25-04.LOG
@@ -0,0 +1,51 @@
+Removed Pin From Net: NetName=PZ24 Pin=U1-8
+Removed Pin From Net: NetName=PZ22 Pin=U1-29
+Removed Pin From Net: NetName=PZ23 Pin=U1-30
+Added Component: Designator=P4(57PC5FS)
+Add component. Clean all parameters for all variants
+Added Component: Designator=R4(AXIAL-0.4)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]"
+Added Component: Designator=R5(AXIAL-0.4)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]"
+Added Component: Designator=TP10(PIN1)
+Add component. Clean all parameters for all variants
+Added Component: Designator=TP11(PIN1)
+Add component. Clean all parameters for all variants
+Added Pin To Net: NetName=GND Pin=P4-2
+Added Pin To Net: NetName=GND Pin=P4-7
+Added Pin To Net: NetName=VCC Pin=R4-2
+Added Pin To Net: NetName=PZ22 Pin=U1-8
+Added Pin To Net: NetName=PZ23 Pin=U1-9
+Added Pin To Net: NetName=PZ24 Pin=U1-10
+Added Pin To Net: NetName=NetP4_4 Pin=P4-4
+Added Pin To Net: NetName=NetP4_4 Pin=R4-1
+Added Net: Name=NetP4_4
+Added Pin To Net: NetName=NetP4_5 Pin=P4-5
+Added Pin To Net: NetName=NetP4_5 Pin=R5-2
+Added Net: Name=NetP4_5
+Added Pin To Net: NetName=NetR5_1 Pin=R5-1
+Added Pin To Net: NetName=NetR5_1 Pin=TP10-1
+Added Pin To Net: NetName=NetR5_1 Pin=U1-29
+Added Net: Name=NetR5_1
+Added Pin To Net: NetName=NetTP11_1 Pin=TP11-1
+Added Pin To Net: NetName=NetTP11_1 Pin=U1-30
+Added Net: Name=NetTP11_1
+Added Member To Class: ClassName=Steps Member=Component P4 57PC5FS
+Added Member To Class: ClassName=Steps Member=Component R4 Res2
+Added Member To Class: ClassName=Steps Member=Component R5 Res2
+Added Member To Class: ClassName=Steps Member=Component TP10 Test Pad
+Added Member To Class: ClassName=Steps Member=Component TP11 Test Pad
diff --git a/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-26-23.LOG b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-26-23.LOG
new file mode 100644
index 0000000..17d18c2
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-26-23.LOG
@@ -0,0 +1,51 @@
+Removed Pin From Net: NetName=PZ24 Pin=U1-8
+Removed Pin From Net: NetName=PZ22 Pin=U1-29
+Removed Pin From Net: NetName=PZ23 Pin=U1-30
+Added Component: Designator=P4(57PC5FS)
+Add component. Clean all parameters for all variants
+Added Component: Designator=R4(AXIAL-0.4)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]"
+Added Component: Designator=R5(AXIAL-0.4)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]"
+Added Component: Designator=TP10(PIN1)
+Add component. Clean all parameters for all variants
+Added Component: Designator=TP11(PIN1)
+Add component. Clean all parameters for all variants
+Added Pin To Net: NetName=GND Pin=P4-2
+Added Pin To Net: NetName=GND Pin=P4-7
+Added Pin To Net: NetName=VCC Pin=R4-2
+Added Pin To Net: NetName=PZ22 Pin=U1-8
+Added Pin To Net: NetName=PZ23 Pin=U1-9
+Added Pin To Net: NetName=PZ24 Pin=U1-10
+Added Pin To Net: NetName=NetP4_4 Pin=P4-4
+Added Pin To Net: NetName=NetP4_4 Pin=R4-1
+Added Net: Name=NetP4_4
+Added Pin To Net: NetName=NetP4_5 Pin=P4-5
+Added Pin To Net: NetName=NetP4_5 Pin=R5-2
+Added Net: Name=NetP4_5
+Added Pin To Net: NetName=NetR5_1 Pin=R5-1
+Added Pin To Net: NetName=NetR5_1 Pin=TP10-1
+Added Pin To Net: NetName=NetR5_1 Pin=U1-29
+Added Net: Name=NetR5_1
+Added Pin To Net: NetName=NetTP11_1 Pin=TP11-1
+Added Pin To Net: NetName=NetTP11_1 Pin=U1-30
+Added Net: Name=NetTP11_1
+Added Member To Class: ClassName=Steps Member=Component P4 57PC5FS
+Added Member To Class: ClassName=Steps Member=Component R4 Res2
+Added Member To Class: ClassName=Steps Member=Component R5 Res2
+Added Member To Class: ClassName=Steps Member=Component TP10 Test Pad
+Added Member To Class: ClassName=Steps Member=Component TP11 Test Pad
diff --git a/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-29.LOG b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-29.LOG
new file mode 100644
index 0000000..2f12384
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-29.LOG
@@ -0,0 +1,44 @@
+Removed Pin From Net: NetName=PZ24 Pin=U1-8
+Removed Pin From Net: NetName=PZ22 Pin=U1-29
+Removed Pin From Net: NetName=PZ23 Pin=U1-30
+Added Component: Designator=R4(AXIAL-0.4)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]"
+Added Component: Designator=R5(AXIAL-0.4)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]"
+Added Component: Designator=TP10(PIN1)
+Add component. Clean all parameters for all variants
+Added Component: Designator=TP11(PIN1)
+Add component. Clean all parameters for all variants
+Added Pin To Net: NetName=VCC Pin=R4-2
+Added Pin To Net: NetName=PZ22 Pin=U1-8
+Added Pin To Net: NetName=PZ23 Pin=U1-9
+Added Pin To Net: NetName=PZ24 Pin=U1-10
+Added Pin To Net: NetName=NetP4_4 Pin=R4-1
+Added Net: Name=NetP4_4
+Added Pin To Net: NetName=NetP4_5 Pin=R5-2
+Added Net: Name=NetP4_5
+Added Pin To Net: NetName=NetR5_1 Pin=R5-1
+Added Pin To Net: NetName=NetR5_1 Pin=TP10-1
+Added Pin To Net: NetName=NetR5_1 Pin=U1-29
+Added Net: Name=NetR5_1
+Added Pin To Net: NetName=NetTP11_1 Pin=TP11-1
+Added Pin To Net: NetName=NetTP11_1 Pin=U1-30
+Added Net: Name=NetTP11_1
+Added Member To Class: ClassName=Steps Member=Component R4 Res2
+Added Member To Class: ClassName=Steps Member=Component R5 Res2
+Added Member To Class: ClassName=Steps Member=Component TP10 Test Pad
+Added Member To Class: ClassName=Steps Member=Component TP11 Test Pad
diff --git a/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-59.LOG b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-59.LOG
new file mode 100644
index 0000000..17d18c2
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-59.LOG
@@ -0,0 +1,51 @@
+Removed Pin From Net: NetName=PZ24 Pin=U1-8
+Removed Pin From Net: NetName=PZ22 Pin=U1-29
+Removed Pin From Net: NetName=PZ23 Pin=U1-30
+Added Component: Designator=P4(57PC5FS)
+Add component. Clean all parameters for all variants
+Added Component: Designator=R4(AXIAL-0.4)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]"
+Added Component: Designator=R5(AXIAL-0.4)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]"
+Added Component: Designator=TP10(PIN1)
+Add component. Clean all parameters for all variants
+Added Component: Designator=TP11(PIN1)
+Add component. Clean all parameters for all variants
+Added Pin To Net: NetName=GND Pin=P4-2
+Added Pin To Net: NetName=GND Pin=P4-7
+Added Pin To Net: NetName=VCC Pin=R4-2
+Added Pin To Net: NetName=PZ22 Pin=U1-8
+Added Pin To Net: NetName=PZ23 Pin=U1-9
+Added Pin To Net: NetName=PZ24 Pin=U1-10
+Added Pin To Net: NetName=NetP4_4 Pin=P4-4
+Added Pin To Net: NetName=NetP4_4 Pin=R4-1
+Added Net: Name=NetP4_4
+Added Pin To Net: NetName=NetP4_5 Pin=P4-5
+Added Pin To Net: NetName=NetP4_5 Pin=R5-2
+Added Net: Name=NetP4_5
+Added Pin To Net: NetName=NetR5_1 Pin=R5-1
+Added Pin To Net: NetName=NetR5_1 Pin=TP10-1
+Added Pin To Net: NetName=NetR5_1 Pin=U1-29
+Added Net: Name=NetR5_1
+Added Pin To Net: NetName=NetTP11_1 Pin=TP11-1
+Added Pin To Net: NetName=NetTP11_1 Pin=U1-30
+Added Net: Name=NetTP11_1
+Added Member To Class: ClassName=Steps Member=Component P4 57PC5FS
+Added Member To Class: ClassName=Steps Member=Component R4 Res2
+Added Member To Class: ClassName=Steps Member=Component R5 Res2
+Added Member To Class: ClassName=Steps Member=Component TP10 Test Pad
+Added Member To Class: ClassName=Steps Member=Component TP11 Test Pad
diff --git a/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-52-31.LOG b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-52-31.LOG
new file mode 100644
index 0000000..5172025
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-52-31.LOG
@@ -0,0 +1,289 @@
+Removed Pin From Net: NetName=VCC Pin=U1-1
+Removed Pin From Net: NetName=NetPZ25_D1_1 Pin=U1-8
+Removed Pin From Net: NetName=NetPZ23_D1_1 Pin=U1-29
+Removed Pin From Net: NetName=NetPZ24_D1_1 Pin=U1-30
+Removed Pin From Net: NetName=NetPZ14_D1_1 Pin=U1-38
+Removed Pin From Net: NetName=NetPZ15_D1_1 Pin=U1-39
+Removed Pin From Net: NetName=NetPZ16_D1_1 Pin=U1-40
+Change Component Designator: OldDesignator=PZ1_D1 NewDesignator=D1_PZ1
+Change Component Designator: OldDesignator=PZ1_D2 NewDesignator=D2_PZ1
+Change Component Designator: OldDesignator=PZ1_R1 NewDesignator=R1_PZ1
+Change Component Designator: OldDesignator=PZ1_R2 NewDesignator=R2_PZ1
+Change Component Designator: OldDesignator=PZ1_Y1 NewDesignator=Y1_PZ1
+Change Component Designator: OldDesignator=PZ2_D1 NewDesignator=D1_PZ2
+Change Component Designator: OldDesignator=PZ2_D2 NewDesignator=D2_PZ2
+Change Component Designator: OldDesignator=PZ2_R1 NewDesignator=R1_PZ2
+Change Component Designator: OldDesignator=PZ2_R2 NewDesignator=R2_PZ2
+Change Component Designator: OldDesignator=PZ2_Y1 NewDesignator=Y1_PZ2
+Change Component Designator: OldDesignator=PZ3_D1 NewDesignator=D1_PZ3
+Change Component Designator: OldDesignator=PZ3_D2 NewDesignator=D2_PZ3
+Change Component Designator: OldDesignator=PZ3_R1 NewDesignator=R1_PZ3
+Change Component Designator: OldDesignator=PZ3_R2 NewDesignator=R2_PZ3
+Change Component Designator: OldDesignator=PZ3_Y1 NewDesignator=Y1_PZ3
+Change Component Designator: OldDesignator=PZ4_D1 NewDesignator=D1_PZ4
+Change Component Designator: OldDesignator=PZ4_D2 NewDesignator=D2_PZ4
+Change Component Designator: OldDesignator=PZ4_R1 NewDesignator=R1_PZ4
+Change Component Designator: OldDesignator=PZ4_R2 NewDesignator=R2_PZ4
+Change Component Designator: OldDesignator=PZ4_Y1 NewDesignator=Y1_PZ4
+Change Component Designator: OldDesignator=PZ5_D1 NewDesignator=D1_PZ5
+Change Component Designator: OldDesignator=PZ5_D2 NewDesignator=D2_PZ5
+Change Component Designator: OldDesignator=PZ5_R1 NewDesignator=R1_PZ5
+Change Component Designator: OldDesignator=PZ5_R2 NewDesignator=R2_PZ5
+Change Component Designator: OldDesignator=PZ5_Y1 NewDesignator=Y1_PZ5
+Change Component Designator: OldDesignator=PZ6_D1 NewDesignator=D1_PZ6
+Change Component Designator: OldDesignator=PZ6_D2 NewDesignator=D2_PZ6
+Change Component Designator: OldDesignator=PZ6_R1 NewDesignator=R1_PZ6
+Change Component Designator: OldDesignator=PZ6_R2 NewDesignator=R2_PZ6
+Change Component Designator: OldDesignator=PZ6_Y1 NewDesignator=Y1_PZ6
+Change Component Designator: OldDesignator=PZ7_D1 NewDesignator=D1_PZ7
+Change Component Designator: OldDesignator=PZ7_D2 NewDesignator=D2_PZ7
+Change Component Designator: OldDesignator=PZ7_R1 NewDesignator=R1_PZ7
+Change Component Designator: OldDesignator=PZ7_R2 NewDesignator=R2_PZ7
+Change Component Designator: OldDesignator=PZ7_Y1 NewDesignator=Y1_PZ7
+Change Component Designator: OldDesignator=PZ8_D1 NewDesignator=D1_PZ8
+Change Component Designator: OldDesignator=PZ8_D2 NewDesignator=D2_PZ8
+Change Component Designator: OldDesignator=PZ8_R1 NewDesignator=R1_PZ8
+Change Component Designator: OldDesignator=PZ8_R2 NewDesignator=R2_PZ8
+Change Component Designator: OldDesignator=PZ8_Y1 NewDesignator=Y1_PZ8
+Change Component Designator: OldDesignator=PZ9_D1 NewDesignator=D1_PZ9
+Change Component Designator: OldDesignator=PZ9_D2 NewDesignator=D2_PZ9
+Change Component Designator: OldDesignator=PZ9_R1 NewDesignator=R1_PZ9
+Change Component Designator: OldDesignator=PZ9_R2 NewDesignator=R2_PZ9
+Change Component Designator: OldDesignator=PZ9_Y1 NewDesignator=Y1_PZ9
+Change Component Designator: OldDesignator=PZ10_D1 NewDesignator=D1_PZ10
+Change Component Designator: OldDesignator=PZ10_D2 NewDesignator=D2_PZ10
+Change Component Designator: OldDesignator=PZ10_R1 NewDesignator=R1_PZ10
+Change Component Designator: OldDesignator=PZ10_R2 NewDesignator=R2_PZ10
+Change Component Designator: OldDesignator=PZ10_Y1 NewDesignator=Y1_PZ10
+Change Component Designator: OldDesignator=PZ11_D1 NewDesignator=D1_PZ11
+Change Component Designator: OldDesignator=PZ11_D2 NewDesignator=D2_PZ11
+Change Component Designator: OldDesignator=PZ11_R1 NewDesignator=R1_PZ11
+Change Component Designator: OldDesignator=PZ11_R2 NewDesignator=R2_PZ11
+Change Component Designator: OldDesignator=PZ11_Y1 NewDesignator=Y1_PZ11
+Change Component Designator: OldDesignator=PZ12_D1 NewDesignator=D1_PZ12
+Change Component Designator: OldDesignator=PZ12_D2 NewDesignator=D2_PZ12
+Change Component Designator: OldDesignator=PZ12_R1 NewDesignator=R1_PZ12
+Change Component Designator: OldDesignator=PZ12_R2 NewDesignator=R2_PZ12
+Change Component Designator: OldDesignator=PZ12_Y1 NewDesignator=Y1_PZ12
+Change Component Designator: OldDesignator=PZ13_D1 NewDesignator=D1_PZ13
+Change Component Designator: OldDesignator=PZ13_D2 NewDesignator=D2_PZ13
+Change Component Designator: OldDesignator=PZ13_R1 NewDesignator=R1_PZ13
+Change Component Designator: OldDesignator=PZ13_R2 NewDesignator=R2_PZ13
+Change Component Designator: OldDesignator=PZ13_Y1 NewDesignator=Y1_PZ13
+Change Component Designator: OldDesignator=PZ14_D1 NewDesignator=D1_PZ14
+Change Component Designator: OldDesignator=PZ14_D2 NewDesignator=D2_PZ14
+Change Component Designator: OldDesignator=PZ14_R1 NewDesignator=R1_PZ14
+Change Component Designator: OldDesignator=PZ14_R2 NewDesignator=R2_PZ14
+Change Component Designator: OldDesignator=PZ14_Y1 NewDesignator=Y1_PZ14
+Change Component Designator: OldDesignator=PZ15_D1 NewDesignator=D1_PZ15
+Change Component Designator: OldDesignator=PZ15_D2 NewDesignator=D2_PZ15
+Change Component Designator: OldDesignator=PZ15_R1 NewDesignator=R1_PZ15
+Change Component Designator: OldDesignator=PZ15_R2 NewDesignator=R2_PZ15
+Change Component Designator: OldDesignator=PZ15_Y1 NewDesignator=Y1_PZ15
+Added Component: Designator=C1(CAPR5-4X5)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "PackageDescription"; Value = "Capacitor; 2 Leads"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "CAPR5-4X5"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "23-Sep-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Value"; Value = "100nF"; VariantName = "[No Variations]"
+Added Component: Designator=D1(LED-1)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "08-Jul-2005"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Mech Layer 1 removed."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDescription"; Value = "LED; 2 Leads"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "LED-1"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Added Component: Designator=P1(HDR2X8)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Added Component: Designator=P2(HDR1X6)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Added Component: Designator=P3(HDR1X4)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Added Component: Designator=R1(AXIAL-0.4)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]"
+Added Component: Designator=R2(AXIAL-0.4)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]"
+Added Component: Designator=R3(AXIAL-0.4)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Value"; Value = "270"; VariantName = "[No Variations]"
+Added Component: Designator=S1(TL36WW15050)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.apem.com"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "DatasheetVersion"; Value = "05-Dec-2000"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Dec-2003"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Schematic revised, PCB Footprint replaced."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDescription"; Value = "Switch; 4 Leads"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "TL36WW15050"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "24-Mar-1999"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Added Component: Designator=U2(N014)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.ti.com/"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "ComponentLink2Description"; Value = "Datasheet"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "ComponentLink2URL"; Value = "http://www-s.ti.com/sc/ds/sn74f125.pdf"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1993"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "06-Jun-2005"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Stylized 3D Model Added."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDescription"; Value = "DIP; 14 Leads; Row Spacing 7.62 mm; Pitch 2.54 mm"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "N014"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageVersion"; Value = "Oct-1995"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Added Pin To Net: NetName=VCC Pin=C1-1
+Added Pin To Net: NetName=GND Pin=C1-2
+Added Pin To Net: NetName=NetPZ24_R1_1 Pin=D1-1
+Added Pin To Net: NetName=GND Pin=D1-2
+Added Pin To Net: NetName=NetPZ23_R1_1 Pin=P1-1
+Added Pin To Net: NetName=GND Pin=P1-11
+Added Pin To Net: NetName=GND Pin=P1-12
+Added Pin To Net: NetName=GND Pin=P1-13
+Added Pin To Net: NetName=VCC Pin=P1-14
+Added Pin To Net: NetName=VCC Pin=P1-15
+Added Pin To Net: NetName=VCC Pin=P1-16
+Added Pin To Net: NetName=NetPZ25_R1_1 Pin=P2-1
+Added Pin To Net: NetName=VCC Pin=P2-2
+Added Pin To Net: NetName=GND Pin=P2-3
+Added Pin To Net: NetName=NetPZ23_R1_1 Pin=P2-4
+Added Pin To Net: NetName=NetPZ24_D1_1 Pin=P2-5
+Added Pin To Net: NetName=NetPZ23_D1_1 Pin=P2-6
+Added Pin To Net: NetName=VCC Pin=P3-1
+Added Pin To Net: NetName=NetPZ16_D1_1 Pin=P3-2
+Added Pin To Net: NetName=NetPZ16_R1_1 Pin=P3-3
+Added Pin To Net: NetName=GND Pin=P3-4
+Added Pin To Net: NetName=NetPZ25_R1_1 Pin=R1-1
+Added Pin To Net: NetName=VCC Pin=R1-2
+Added Pin To Net: NetName=GND Pin=R2-1
+Added Pin To Net: NetName=NetPZ23_D1_1 Pin=R2-2
+Added Pin To Net: NetName=NetPZ24_R1_1 Pin=R3-1
+Added Pin To Net: NetName=NetPZ25_D1_1 Pin=R3-2
+Added Pin To Net: NetName=VCC Pin=S1-1
+Added Pin To Net: NetName=NetPZ25_D1_1 Pin=S1-2
+Added Pin To Net: NetName=GND Pin=S1-3
+Added Pin To Net: NetName=NetPZ25_R1_1 Pin=U1-1
+Added Pin To Net: NetName=NetPZ23_R1_1 Pin=U1-19
+Added Pin To Net: NetName=NetPZ16_D1_1 Pin=U1-25
+Added Pin To Net: NetName=NetPZ16_R1_1 Pin=U1-26
+Added Pin To Net: NetName=NetPZ23_D1_1 Pin=U1-38
+Added Pin To Net: NetName=NetPZ24_D1_1 Pin=U1-39
+Added Pin To Net: NetName=NetPZ23_R1_1 Pin=U1-40
+Added Pin To Net: NetName=NetPZ25_D1_1 Pin=U2-1
+Added Pin To Net: NetName=NetPZ14_D1_1 Pin=U2-2
+Added Pin To Net: NetName=NetPZ23_R1_1 Pin=U2-3
+Added Pin To Net: NetName=NetPZ25_D1_1 Pin=U2-4
+Added Pin To Net: NetName=NetPZ15_D1_1 Pin=U2-5
+Added Pin To Net: NetName=NetPZ24_D1_1 Pin=U2-6
+Added Pin To Net: NetName=GND Pin=U2-7
+Added Pin To Net: NetName=NetPZ23_D1_1 Pin=U2-8
+Added Pin To Net: NetName=NetPZ25_D1_1 Pin=U2-10
+Added Pin To Net: NetName=VCC Pin=U2-14
+Change Net Name : Old Net Name=NetPZ1_D1_1 New Net Name=PZ1
+Change Net Name : Old Net Name=NetPZ1_R1_1 New Net Name=NetR1_PZ1_1
+Change Net Name : Old Net Name=NetPZ2_D1_1 New Net Name=PZ2
+Change Net Name : Old Net Name=NetPZ2_R1_1 New Net Name=NetR1_PZ2_1
+Change Net Name : Old Net Name=NetPZ3_D1_1 New Net Name=PZ3
+Change Net Name : Old Net Name=NetPZ3_R1_1 New Net Name=NetR1_PZ3_1
+Change Net Name : Old Net Name=NetPZ4_D1_1 New Net Name=PZ4
+Change Net Name : Old Net Name=NetPZ4_R1_1 New Net Name=NetR1_PZ4_1
+Change Net Name : Old Net Name=NetPZ5_D1_1 New Net Name=PZ5
+Change Net Name : Old Net Name=NetPZ5_R1_1 New Net Name=NetR1_PZ5_1
+Change Net Name : Old Net Name=NetPZ6_D1_1 New Net Name=PZ6
+Change Net Name : Old Net Name=NetPZ6_R1_1 New Net Name=NetR1_PZ6_1
+Change Net Name : Old Net Name=NetPZ7_D1_1 New Net Name=PZ7
+Change Net Name : Old Net Name=NetPZ7_R1_1 New Net Name=NetR1_PZ7_1
+Change Net Name : Old Net Name=NetPZ8_D1_1 New Net Name=PZ8
+Change Net Name : Old Net Name=NetPZ8_R1_1 New Net Name=NetR1_PZ8_1
+Change Net Name : Old Net Name=NetPZ9_D1_1 New Net Name=PZ9
+Change Net Name : Old Net Name=NetPZ9_R1_1 New Net Name=NetR1_PZ9_1
+Change Net Name : Old Net Name=NetPZ10_D1_1 New Net Name=PZ10
+Change Net Name : Old Net Name=NetPZ10_R1_1 New Net Name=NetR1_PZ10_1
+Change Net Name : Old Net Name=NetPZ11_D1_1 New Net Name=PZ11
+Change Net Name : Old Net Name=NetPZ11_R1_1 New Net Name=NetR1_PZ11_1
+Change Net Name : Old Net Name=NetPZ12_D1_1 New Net Name=PZ12
+Change Net Name : Old Net Name=NetPZ12_R1_1 New Net Name=NetR1_PZ12_1
+Change Net Name : Old Net Name=NetPZ13_D1_1 New Net Name=PZ13
+Change Net Name : Old Net Name=NetPZ13_R1_1 New Net Name=NetR1_PZ13_1
+Change Net Name : Old Net Name=NetPZ14_D1_1 New Net Name=NetU2_2
+Change Net Name : Old Net Name=NetPZ14_R1_1 New Net Name=NetR1_PZ14_1
+Change Net Name : Old Net Name=NetPZ15_D1_1 New Net Name=NetU2_5
+Change Net Name : Old Net Name=NetPZ15_R1_1 New Net Name=NetR1_PZ15_1
+Change Net Name : Old Net Name=NetPZ16_D1_1 New Net Name=TX
+Change Net Name : Old Net Name=NetPZ16_R1_1 New Net Name=RX
+Change Net Name : Old Net Name=NetPZ23_D1_1 New Net Name=PGM
+Change Net Name : Old Net Name=NetPZ23_R1_1 New Net Name=PGD
+Change Net Name : Old Net Name=NetPZ24_D1_1 New Net Name=PGC
+Change Net Name : Old Net Name=NetPZ24_R1_1 New Net Name=NetD1_1
+Change Net Name : Old Net Name=NetPZ25_D1_1 New Net Name=NetR3_2
+Change Net Name : Old Net Name=NetPZ25_R1_1 New Net Name=M\C\L\R\
+Added Pin To Net: NetName=PZ17 Pin=P1-2
+Added Pin To Net: NetName=PZ17 Pin=U1-20
+Added Net: Name=PZ17
+Added Pin To Net: NetName=PZ18 Pin=P1-3
+Added Pin To Net: NetName=PZ18 Pin=U1-21
+Added Net: Name=PZ18
+Added Pin To Net: NetName=PZ19 Pin=P1-4
+Added Pin To Net: NetName=PZ19 Pin=U1-22
+Added Net: Name=PZ19
+Added Pin To Net: NetName=PZ20 Pin=P1-5
+Added Pin To Net: NetName=PZ20 Pin=U1-27
+Added Net: Name=PZ20
+Added Pin To Net: NetName=PZ21 Pin=P1-6
+Added Pin To Net: NetName=PZ21 Pin=U1-28
+Added Net: Name=PZ21
+Added Pin To Net: NetName=PZ22 Pin=P1-7
+Added Pin To Net: NetName=PZ22 Pin=U1-29
+Added Net: Name=PZ22
+Added Pin To Net: NetName=PZ23 Pin=P1-8
+Added Pin To Net: NetName=PZ23 Pin=U1-30
+Added Net: Name=PZ23
+Added Pin To Net: NetName=PZ24 Pin=P1-9
+Added Pin To Net: NetName=PZ24 Pin=U1-8
+Added Net: Name=PZ24
+Added Pin To Net: NetName=PZ25 Pin=P1-10
+Added Pin To Net: NetName=PZ25 Pin=U2-9
+Added Net: Name=PZ25
+Change Class Name : Old Net Name=Xilofono New Net Name=Steps
+Added Member To Class: ClassName=Steps Member=Component C1 Cap2
+Added Member To Class: ClassName=Steps Member=Component D1 LED1
+Added Member To Class: ClassName=Steps Member=Component P1 Bridge
+Added Member To Class: ClassName=Steps Member=Component P2 LVISP
+Added Member To Class: ClassName=Steps Member=Component P3 RS232
+Added Member To Class: ClassName=Steps Member=Component R1 Res2
+Added Member To Class: ClassName=Steps Member=Component R2 Res2
+Added Member To Class: ClassName=Steps Member=Component R3 Res2
+Added Member To Class: ClassName=Steps Member=Component S1 SW-SPDT
+Added Member To Class: ClassName=Steps Member=Component U2 SN74F125N
+Change Room Name: Old Name=Xilofono New Name=Steps
+Change Room Scope: Old Scope=InComponentClass('Xilofono') New Scope=InComponentClass('Steps')
diff --git a/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-58-00.LOG b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-58-00.LOG
new file mode 100644
index 0000000..4428861
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-58-00.LOG
@@ -0,0 +1 @@
+Change Component Footprint: Designator=S1 Old Footprint=TL36WW15050 New Footprint=HDR1X3
diff --git a/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-59-52.LOG b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-59-52.LOG
new file mode 100644
index 0000000..62991c3
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-59-52.LOG
@@ -0,0 +1 @@
+Change Component Footprint: Designator=D1 Old Footprint=LED-1 New Footprint=BAT-2
diff --git a/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG
new file mode 100644
index 0000000..60e5407
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG
@@ -0,0 +1,33 @@
+Removed Pin From Net: NetName=M\C\L\R\ Pin=P2-1
+Removed Pin From Net: NetName=VCC Pin=P2-2
+Removed Pin From Net: NetName=GND Pin=P2-3
+Removed Pin From Net: NetName=PGD Pin=P2-4
+Removed Pin From Net: NetName=PGC Pin=P2-5
+Removed Pin From Net: NetName=PGM Pin=P2-6
+Removed Member From Class: ClassName=Steps Member=P2
+Added Component: Designator=J1(95001-2661)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.molex.com/"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "ComponentLink2Description"; Value = "Datasheet"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "ComponentLink2URL"; Value = "http://www.molex.com/cmc_upload/common_files/1222003_mx95001b.pdf"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "ComponentLink3Description"; Value = "Iges Model"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "ComponentLink3URL"; Value = "http://www.molex.com/pdm_docs/igs/95001-2441_igs.zip"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "DatasheetDocument"; Value = "17-Dec-2001"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "DrillSize"; Value = "Nominal, Rounded to nearest 0.05mm"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageDocument"; Value = "17-Dec-2001"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PackageReference"; Value = "95001-2661"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PCB_Layout"; Value = "Complies with Manufacturer's Recommendation."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PCB_Mounting"; Value = "Thru-Hole"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "PerformanceCategory"; Value = "3"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Ports"; Value = "1"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Positions/Loaded"; Value = "Port1 - 6/6"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Published"; Value = "25-Jun-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Added Pin To Net: NetName=M\C\L\R\ Pin=J1-1
+Added Pin To Net: NetName=VCC Pin=J1-2
+Added Pin To Net: NetName=GND Pin=J1-3
+Added Pin To Net: NetName=PGD Pin=J1-4
+Added Pin To Net: NetName=PGC Pin=J1-5
+Added Pin To Net: NetName=PGM Pin=J1-6
+Added Member To Class: ClassName=Steps Member=Component J1 95001-2661
diff --git a/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-16-32.LOG b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-16-32.LOG
new file mode 100644
index 0000000..580a188
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-16-32.LOG
@@ -0,0 +1,37 @@
+Change Component Comment : Designator=J1 Old Comment=95001-2661 New Comment=LVPICSP
+Change Component Designator: OldDesignator=P1 NewDesignator=P2
+Added Component: Designator=P1(HDR1X2)
+Add component. Clean all parameters for all variants
+Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
+Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
+Added Component: Designator=TP1(PIN1)
+Add component. Clean all parameters for all variants
+Added Component: Designator=TP2(PIN1)
+Add component. Clean all parameters for all variants
+Added Component: Designator=TP3(PIN1)
+Add component. Clean all parameters for all variants
+Added Component: Designator=TP4(PIN1)
+Add component. Clean all parameters for all variants
+Added Component: Designator=TP5(PIN1)
+Add component. Clean all parameters for all variants
+Added Component: Designator=TP6(PIN1)
+Add component. Clean all parameters for all variants
+Added Component: Designator=TP7(PIN1)
+Add component. Clean all parameters for all variants
+Added Component: Designator=TP8(PIN1)
+Add component. Clean all parameters for all variants
+Added Component: Designator=TP9(PIN1)
+Add component. Clean all parameters for all variants
+Added Pin To Net: NetName=VCC Pin=P1-1
+Added Pin To Net: NetName=GND Pin=P1-2
+Added Member To Class: ClassName=Steps Member=Component P2 Bridge
+Added Member To Class: ClassName=Steps Member=Component TP1 Test Pad
+Added Member To Class: ClassName=Steps Member=Component TP2 Test Pad
+Added Member To Class: ClassName=Steps Member=Component TP3 Test Pad
+Added Member To Class: ClassName=Steps Member=Component TP4 Test Pad
+Added Member To Class: ClassName=Steps Member=Component TP5 Test Pad
+Added Member To Class: ClassName=Steps Member=Component TP6 Test Pad
+Added Member To Class: ClassName=Steps Member=Component TP7 Test Pad
+Added Member To Class: ClassName=Steps Member=Component TP8 Test Pad
+Added Member To Class: ClassName=Steps Member=Component TP9 Test Pad
diff --git a/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-17-29.LOG b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-17-29.LOG
new file mode 100644
index 0000000..693d813
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-17-29.LOG
@@ -0,0 +1 @@
+Added Member To Class: ClassName=Steps Member=Component P1 PWR
diff --git a/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-22-54.LOG b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-22-54.LOG
new file mode 100644
index 0000000..d54f779
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-22-54.LOG
@@ -0,0 +1,10 @@
+Added Pin To Net: NetName=VCC Pin=TP1-1
+Added Pin To Net: NetName=GND Pin=TP2-1
+Added Pin To Net: NetName=NetR3_2 Pin=TP3-1
+Added Pin To Net: NetName=TX Pin=TP4-1
+Added Pin To Net: NetName=M\C\L\R\ Pin=TP5-1
+Added Pin To Net: NetName=RX Pin=TP6-1
+Added Pin To Net: NetName=PGD Pin=TP7-1
+Added Pin To Net: NetName=PGC Pin=TP8-1
+Added Pin To Net: NetName=PGM Pin=TP9-1
+Added Member To Class: ClassName=Steps Member=Component P1 PWR
diff --git a/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 11-47-37.LOG b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 11-47-37.LOG
new file mode 100644
index 0000000..c93373f
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 11-47-37.LOG
@@ -0,0 +1 @@
+Change Component Footprint: Designator=P1 Old Footprint=HDR1X2 New Footprint=RT01502HDWC
diff --git a/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 08-59-04.LOG b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 08-59-04.LOG
new file mode 100644
index 0000000..5c94d4e
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 08-59-04.LOG
@@ -0,0 +1,9 @@
+Change Component Designator: Old Designator=TP? New Designator=TP1
+Change Component Designator: Old Designator=TP? New Designator=TP2
+Change Component Designator: Old Designator=TP? New Designator=TP3
+Change Component Designator: Old Designator=TP? New Designator=TP4
+Change Component Designator: Old Designator=TP? New Designator=TP5
+Change Component Designator: Old Designator=TP? New Designator=TP6
+Change Component Designator: Old Designator=TP? New Designator=TP7
+Change Component Designator: Old Designator=TP? New Designator=TP8
+Change Component Designator: Old Designator=TP? New Designator=TP9
diff --git a/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-10-29.LOG b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-10-29.LOG
new file mode 100644
index 0000000..5c94d4e
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-10-29.LOG
@@ -0,0 +1,9 @@
+Change Component Designator: Old Designator=TP? New Designator=TP1
+Change Component Designator: Old Designator=TP? New Designator=TP2
+Change Component Designator: Old Designator=TP? New Designator=TP3
+Change Component Designator: Old Designator=TP? New Designator=TP4
+Change Component Designator: Old Designator=TP? New Designator=TP5
+Change Component Designator: Old Designator=TP? New Designator=TP6
+Change Component Designator: Old Designator=TP? New Designator=TP7
+Change Component Designator: Old Designator=TP? New Designator=TP8
+Change Component Designator: Old Designator=TP? New Designator=TP9
diff --git a/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-20-08.LOG b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-20-08.LOG
new file mode 100644
index 0000000..5838463
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-20-08.LOG
@@ -0,0 +1,21 @@
+Replace Part C1 Cap2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Cap2 from Miscellaneous Devices.IntLib
+Replace Part D1 LED1 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with LED1 from Miscellaneous Devices.IntLib
+Replace Part J1 95001-2661 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with 95001-2661 from Molex Modular Jack Right Angle.IntLib
+Replace Part P1 Header 2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Header 2 from Miscellaneous Connectors.IntLib
+Replace Part P2 Header 16 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Header 16 from Miscellaneous Connectors.IntLib
+Replace Part P3 Header 4 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Header 4 from Miscellaneous Connectors.IntLib
+Replace Part R1 Res2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Res2 from Miscellaneous Devices.IntLib
+Replace Part R2 Res2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Res2 from Miscellaneous Devices.IntLib
+Replace Part R3 Res2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Res2 from Miscellaneous Devices.IntLib
+Replace Part S1 SW-SPDT in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with SW-SPDT from Miscellaneous Devices.IntLib
+Replace Part TP1 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP2 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP3 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP4 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP5 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP6 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP7 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP8 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP9 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part U1 PIC18F44K20-I/P in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with PIC18F44K20-I/P from Microchip Microcontroller 8-Bit PIC18.IntLib
+Replace Part U2 SN74F125N in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with SN74F125N from TI Logic Buffer Line Driver.IntLib
diff --git a/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-21-22.LOG b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-21-22.LOG
new file mode 100644
index 0000000..4bc089f
--- /dev/null
+++ b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-21-22.LOG
@@ -0,0 +1,9 @@
+Replace Part TP1 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP2 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP3 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP4 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP5 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP6 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP7 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP8 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib
+Replace Part TP9 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib