From 18abece8f8a8af17a3b5e80dc1baf61457409600 Mon Sep 17 00:00:00 2001 From: Nao Pross Date: Fri, 2 Feb 2018 12:12:18 +0100 Subject: 2 February 2018 Documentation: - new API documentation - datasheets for new components - update BOM - update documentation data Hardware: - update schematic for MIDI connector Software: - new MIDI API - update prject target to PIC18F45K22 --- datasheets/310011xx_eng_tds.pdf | Bin 0 -> 295265 bytes datasheets/57PC5FS-Switchcraft.pdf | Bin 0 -> 59649 bytes datasheets/57PC5FS.pdf | Bin 0 -> 139287 bytes datasheets/ASseries_eng_tds.pdf | Bin 0 -> 269906 bytes datasheets/DS-51765C.pdf | Bin 0 -> 192774 bytes datasheets/PIC18F44K20.pdf | Bin 5464877 -> 0 bytes datasheets/PIC18F44K22.pdf | Bin 5839368 -> 0 bytes datasheets/PIC18F44xK22.pdf | Bin 0 -> 5839368 bytes .../oxMolex_Mar-Lotb_RJ12_6P6C_ungeschirmt_E.pdf | Bin 0 -> 157874 bytes doc/data/misure-xilofono-note.txt | 11 + doc/data/misure-xilofono.csv | 30 + doc/lista_componenti.ods | Bin 16250 -> 20711 bytes doc/xilofono.tex | 240 +++- hw/Mids.PcbDoc | Bin 0 -> 768000 bytes hw/Mids.PrjPcb | 1099 ++++++++++++++++ hw/Mids.PrjPcbStructure | 11 + hw/Mids.SchDoc | Bin 0 -> 33792 bytes hw/Mids.SchLib | Bin 0 -> 24576 bytes hw/Piezo.SchDoc | Bin 36352 -> 36352 bytes .../Mids PCB ECO 22.01.2018 13-24-52.LOG | 686 ++++++++++ .../Piezo SCH ECO 22.01.2018 09-20-08.LOG | 5 + .../Steps PCB ECO 02.02.2018 11-25-04.LOG | 51 + .../Steps PCB ECO 02.02.2018 11-26-23.LOG | 51 + .../Steps PCB ECO 02.02.2018 11-35-29.LOG | 44 + .../Steps PCB ECO 02.02.2018 11-35-59.LOG | 51 + .../Steps PCB ECO 19.01.2018 13-52-31.LOG | 289 ++++ .../Steps PCB ECO 19.01.2018 13-58-00.LOG | 1 + .../Steps PCB ECO 19.01.2018 13-59-52.LOG | 1 + .../Steps PCB ECO 19.01.2018 15-21-24.LOG | 33 + .../Steps PCB ECO 22.01.2018 09-16-32.LOG | 37 + .../Steps PCB ECO 22.01.2018 09-17-29.LOG | 1 + .../Steps PCB ECO 22.01.2018 09-22-54.LOG | 10 + .../Steps PCB ECO 22.01.2018 11-47-37.LOG | 1 + .../Steps SCH ECO 22.01.2018 08-59-04.LOG | 9 + .../Steps SCH ECO 22.01.2018 09-10-29.LOG | 9 + .../Steps SCH ECO 22.01.2018 09-20-08.LOG | 21 + .../Steps SCH ECO 22.01.2018 09-21-22.LOG | 9 + .../Design Rule Check - Steps.drc | 286 ++++ .../Design Rule Check - Steps.html | 986 ++++++++++++++ hw/Project Outputs for Xilofono/Xilofono.PDF | Bin 0 -> 164325 bytes hw/Steps.IntLib | Bin 0 -> 41472 bytes hw/Steps.PcbDoc | Bin 1019904 -> 1033216 bytes hw/Steps.PcbLib | Bin 0 -> 152064 bytes hw/Steps.PrjPcb | 1385 ++++++++++++++++++++ hw/Steps.PrjPcbStructure | 16 + hw/Steps.SchDoc | Bin 0 -> 168960 bytes hw/Steps.SchLib | Bin 0 -> 80384 bytes hw/Switchcraft.PcbLib | Bin 0 -> 100864 bytes hw/Switchcraft.SchLib | Bin 0 -> 6656 bytes hw/TestPad.SchLib | Bin 0 -> 4608 bytes hw/Workspace.DsnWrk | 4 + hw/Xilofono.OutJob | 145 ++ hw/Xilofono.PrjPcb | 91 +- hw/Xilofono.PrjPcbStructure | 52 +- hw/Xilofono.SchDoc | Bin 71680 -> 0 bytes hw/debug.log | 124 ++ refs/52053B.pdf | Bin 0 -> 6352908 bytes src/dist/default/production/memoryfile.xml | 12 +- src/dist/default/production/src.production.cmf | 227 +++- src/dist/default/production/src.production.elf | Bin 8444 -> 12232 bytes src/dist/default/production/src.production.hex | 33 +- src/dist/default/production/src.production.hxl | 14 +- src/dist/default/production/src.production.lst | 1090 +++++++++++---- src/dist/default/production/src.production.map | 714 ++++++---- src/dist/default/production/src.production.mum | 6 +- src/dist/default/production/src.production.obj | Bin 2674 -> 7095 bytes src/dist/default/production/src.production.rlf | Bin 17184 -> 59843 bytes src/dist/default/production/src.production.sdb | 153 ++- src/dist/default/production/src.production.sym | 179 ++- src/main.c | 30 +- src/midi.c | 108 ++ src/midi.h | 82 ++ src/nbproject/Makefile-default.mk | 28 +- src/nbproject/Makefile-genesis.properties | 4 +- src/nbproject/configurations.xml | 4 +- .../private/SuppressibleMessageMemo.properties | 3 + src/nbproject/private/configurations.xml | 2 +- src/nbproject/private/private.xml | 4 +- 78 files changed, 7810 insertions(+), 672 deletions(-) create mode 100644 datasheets/310011xx_eng_tds.pdf create mode 100644 datasheets/57PC5FS-Switchcraft.pdf create mode 100644 datasheets/57PC5FS.pdf create mode 100644 datasheets/ASseries_eng_tds.pdf create mode 100644 datasheets/DS-51765C.pdf delete mode 100644 datasheets/PIC18F44K20.pdf delete mode 100644 datasheets/PIC18F44K22.pdf create mode 100644 datasheets/PIC18F44xK22.pdf create mode 100644 datasheets/oxMolex_Mar-Lotb_RJ12_6P6C_ungeschirmt_E.pdf create mode 100644 doc/data/misure-xilofono-note.txt create mode 100644 doc/data/misure-xilofono.csv create mode 100644 hw/Mids.PcbDoc create mode 100644 hw/Mids.PrjPcb create mode 100644 hw/Mids.PrjPcbStructure create mode 100644 hw/Mids.SchDoc create mode 100644 hw/Mids.SchLib create mode 100644 hw/Project Logs for Mids/Mids PCB ECO 22.01.2018 13-24-52.LOG create mode 100644 hw/Project Logs for Steps/Piezo SCH ECO 22.01.2018 09-20-08.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-25-04.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-26-23.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-29.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-59.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-52-31.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-58-00.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-59-52.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-16-32.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-17-29.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-22-54.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 11-47-37.LOG create mode 100644 hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 08-59-04.LOG create mode 100644 hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-10-29.LOG create mode 100644 hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-20-08.LOG create mode 100644 hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-21-22.LOG create mode 100644 hw/Project Outputs for Steps/Design Rule Check - Steps.drc create mode 100644 hw/Project Outputs for Steps/Design Rule Check - Steps.html create mode 100644 hw/Project Outputs for Xilofono/Xilofono.PDF create mode 100644 hw/Steps.IntLib create mode 100644 hw/Steps.PcbLib create mode 100644 hw/Steps.PrjPcb create mode 100644 hw/Steps.PrjPcbStructure create mode 100644 hw/Steps.SchDoc create mode 100644 hw/Steps.SchLib create mode 100644 hw/Switchcraft.PcbLib create mode 100644 hw/Switchcraft.SchLib create mode 100644 hw/TestPad.SchLib create mode 100644 hw/Xilofono.OutJob delete mode 100644 hw/Xilofono.SchDoc create mode 100644 refs/52053B.pdf create mode 100644 src/midi.c create mode 100644 src/midi.h create mode 100644 src/nbproject/private/SuppressibleMessageMemo.properties diff --git a/datasheets/310011xx_eng_tds.pdf b/datasheets/310011xx_eng_tds.pdf new file mode 100644 index 0000000..ad234be Binary files /dev/null and b/datasheets/310011xx_eng_tds.pdf differ diff --git a/datasheets/57PC5FS-Switchcraft.pdf b/datasheets/57PC5FS-Switchcraft.pdf new file mode 100644 index 0000000..68697a1 Binary files /dev/null and b/datasheets/57PC5FS-Switchcraft.pdf differ diff --git a/datasheets/57PC5FS.pdf b/datasheets/57PC5FS.pdf new file mode 100644 index 0000000..a8faf44 Binary files /dev/null and b/datasheets/57PC5FS.pdf differ diff --git a/datasheets/ASseries_eng_tds.pdf b/datasheets/ASseries_eng_tds.pdf new file mode 100644 index 0000000..258ad66 Binary files /dev/null and b/datasheets/ASseries_eng_tds.pdf differ diff --git a/datasheets/DS-51765C.pdf b/datasheets/DS-51765C.pdf new file mode 100644 index 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0000000..b7f277c --- /dev/null +++ b/doc/data/misure-xilofono-note.txt @@ -0,0 +1,11 @@ +Tutte le misure sono prese in millimetri (mm). + +Ogni foro e' largo 6mm alto 5mm. + +Con foro basso di un listello si intende il foro piu' vicino a se' quando si +tiene lo xilofono per suonare. + +Le coordinate XY di ogni foro sono prese nell'angolo* in basso a sinistra, +rispetto all'angolo* in basso a sinistra del foro basso della prima nota C2. + +* il foro e' quadrato \ No newline at end of file diff --git a/doc/data/misure-xilofono.csv b/doc/data/misure-xilofono.csv new file mode 100644 index 0000000..8e04159 --- /dev/null +++ b/doc/data/misure-xilofono.csv @@ -0,0 +1,30 @@ +Nota;Altezza;Larghezza;X Foro;Y Foro Basso;Y Foro Alto; +c2;220;25;0;0;123; +d2;209;25;30;9;126; +e2;196;25;60;18;128; +f2;191;25;90;22;130; +g2;181;25;120;30;132; +a2;171;25;150;38;134; +b2;161;25;180;45;136; +c3;156;25;210;49;138; +d3;148;25;240;56;140; +e3;139;25;270;61;142; +f3;135;25;300;65;144; +g3;127;25;330;70;146; +a3;120;25;360;80;148; +b3;113;25;390;83;150; +c4;110;25;420;87;152; +;;;;;; +c#2;;;;;; +d#2;;;;;; +;;;;;; +F#2;;;;;; +g#2;;;;;; +a#2;;;;;; +;;;;;; +c#3;;;;;; +d#3;;;;;; +;;;;;; +f#3;;;;;; +g#3;;;;;; +a#3;;;;;; diff --git a/doc/lista_componenti.ods b/doc/lista_componenti.ods index 4ecfd6f..27c34b5 100644 Binary files a/doc/lista_componenti.ods and b/doc/lista_componenti.ods differ diff --git a/doc/xilofono.tex b/doc/xilofono.tex index a2b473e..0ad9ddc 100644 --- a/doc/xilofono.tex +++ b/doc/xilofono.tex @@ -2,17 +2,34 @@ % language / document \usepackage[italian]{babel} + +% font \usepackage{lmodern} % font \usepackage{anyfontsize} + +% urls +\usepackage{url} +\urlstyle{tt} + % figures \usepackage{float} % place figures \usepackage{pgfplots} % plts +\usepackage{tikz-timing} \usepackage[european]{circuitikz} % circuiti elettrici \usepackage{tikzscale} % scale tikz images +\pgfplotsset{compat=1.15} +% tables +\usepackage{array} +\usepackage{booktabs} -\pgfplotsset{compat=1.15} +% code +\usepackage{listings} +% parskip +\setlength{\parskip}{1em} + +% metadata \title{Xilofono MIDI} \author{Naoki Pross, \textit{SAM Bellinzona}} @@ -25,10 +42,10 @@ \section{Requisiti} Lo Xilofono digitale \`e un dispositivo in grado di rilevare le note suonate dall'utente per poi salvarle in un dispositivo esterno in formato MIDI. -Esso \`e costruito utilizzando parti da uno Xilofono ``Sonor Tag 25'' modificato con dell'elettronica esterna. +Esso \`e costruito utilizzando parti da uno Xilofono ``Sonor Tag 25'' modificato con dei circuiti di misura. \section{Elemento piezoelettrico} -Il sensore piezoelettrico quando colpito genera una tensione oscillante come mostrato nella figura \ref{fig:piezo-waveform}. La tensione generata dal piezo \`e pi\`u che sufficiente per entrare direttamente in un circuito digitale di misura CMOS; l'unica correzione necessaria \`e la parte negativa dell'oscillazione che deve essere smorzata. +Il sensore piezoelettrico quando colpito genera una tensione oscillante come mostrato nella figura \ref{fig:piezo-waveform}. La tensione generata ha bisogno solamente di una correzzione minimale per poter entrare in un circuito di misura CMOS. \`E necessario quindi rimuovere o smorzare la parte negativa dell'oscillazione. \begin{figure}[H] \centering \begin{tikzpicture} \begin{axis}[ @@ -38,14 +55,12 @@ Il sensore piezoelettrico quando colpito genera una tensione oscillante come mos grid=major, grid style=dotted ] - \addplot [color=black, smooth, thick] table [ mark=none, each nth point=2, x=Time, y=Smooth, col sep=semicolon ] {data/piezo-waveform.csv}; - \end{axis} \end{tikzpicture} \caption{ @@ -55,16 +70,225 @@ Il sensore piezoelettrico quando colpito genera una tensione oscillante come mos \end{figure} \section{Circuito di misura} -Per ogni listello della tastiera dello strumento \`e presente un circuito di misura composto da un elemento piezoelettrico, che rileva il colpo, ed un comparatore per digitalizzare il segnale per il microcontroller. +Per ogni listello della tastiera dello strumento \`e presente un circuito di misura composto dall'elemento piezoelettrico, per rilevare il colpo, e dei diodi che limitano la tensione tra \(V_{cc}\) (5V) e \(V_{ss}\)(0V). + +Il piezoelettrodo utilizzato \`e un Murata 7BB-20-06 con una frequenza di risonanza di \(6.3\pm 0.6~\mathrm{kHz}\). \begin{figure}[H] \centering \includegraphics[width=\linewidth]{figures/reduced-circ.tikz} + \caption{Circuito di misura} \end{figure} \section{Microcontroller} Per gestire i segnali forniti dai circuiti di misura \`e presente un PIC18F44K22, che esporta le informazioni delle note suonate in formato MIDI via seriale. -\section{Software} -\subsection{Formato MIDI} +\section{Protocollo MIDI} +L'acronimo MIDI (Musical Instrument Digital Interface) indica il protocollo standard per l'interazione degli strumenti musicali elettronici, anche tramite un computer\cite{wiki:midi}. + +\subsection{Specifiche hardware} +Il protocollo MIDI \`e composto da pi\`u parti per il trasporto, i file e per l'hardware. Per questo progetto \`e utilizzato unicamente il protocollo di trasporto, le informazioni sono trasmesse attraverso una porta seriale RS232 a due fili, utilizzando il connettore di uscita DIN 5 Pin (DIN 41524). + +\begin{figure}[H] +\centering +\begin{tikzpicture}[scale=1.5] + \timing at (0,1) {L4D{Status}4D{D0}4D{D1}4D{D2}4D{...}}; + \timing at (0,.5) {L4D{0x90}4D{0x3C}4D{0x7F}4L4L}; + %\timing at (0,0) { +\end{tikzpicture} +\caption{Esempio di trasmissione MIDI} +\end{figure} + +Il formato originale per la trasmissione seriale MIDI \`e un \emph{current loop} a cui il valore logico 0 \`e assegnato al passaggio di una corrente di 5 mA\cite{gweep}. + +\subsection{Specifiche software} +La trasmissione seriale MIDI \`e definita come standard a \(31'250\pm 1\%\) baud con 1 start bit, frame da 8 bit e 1 stop bit. Un messaggio (o pacchetto)\footnote{In questo documento i due termini sono utilizzati intercambiabilmente.} MIDI incomincia con uno \emph{Status Byte} (vedi tabella \ref{tab:status-bytes}) seguito se necessario da altri byte di dati. +Per migliorare le prestazioni \`e definito che se il byte di status viene omesso, il dispositivo ricevente assume che lo status sia uguale all'ultimo messaggio ricevuto (running status). + +\subsection{Protocollo -- Messaggi di canale} +Il nibble (4 bit) basso del byte di status viene utilizzato per la selezione del canale. I 16 canali disponibili sono controllati mandando dei pacchetti di tipo \emph{channel voice} o di tipo \emph{channel mode}. + +\subsubsection{Channel mode} +Un messaggio con status \texttt{0xBn} se il primo dato \(D_0 \geq 120\) \`e detto un pacchetto \emph{channel mode}. Il pacchetto viene interpretato come un impostazione del \emph{base channel}, ossia modifica le impostazioni dell'intero canale. +\begin{figure}[H] +\centering +\begin{tikzpicture}[scale=2] + \timing at (0, 0) {L5D{1000 nnnn}5D{0111 1011}5D{ 0000 0000 }L}; +\end{tikzpicture} +\caption{Esempio di messaggio channel mode ANO (all notes off) che ha \(D_0 = 123\) (\(\geq 120\))} +\end{figure} + +\subsubsection{Channel voice} +I messaggi con status tra \texttt{0x8n} e \texttt{0xEn}, esclusi i pacchetti channel voice, sono detti pacchetti \emph{channel voice} e servono per indicare al dispositivo come deve suonare una nota (controllo della voce). +\begin{figure}[H] +\centering +\begin{tikzpicture}[scale=2] + \timing at (0, 0) {L5D{1000 nnnn}5D{ 0111 0xxx }L}; +\end{tikzpicture} +\end{figure} + +\subsection{Protocollo -- Messaggi di sistema} +I messaggi di sistema generalmente sono utilizzati per impostare la configurazione del dispositivo ricevente e non sono quindi utilizzati per riprodurre suoni o note. +I messaggi di sistema sono a loro volta suddivisi in 3 tipi. + +\subsubsection{System Exclusive} +\subsubsection{System Common} +\subsubsection{System Real Time} + +\subsection{Messaggi di interesse per il progetto} + +\section{Implementazione dell'API MIDI} +\subsection{API multipiattaforma} +Per il progetto \`e stato implementato un API (Application Programming Interface) che permette di generare in maniera conveniente dei messaggi MIDI. +La struttura dati \texttt{midi\_message\_t} \`e allineata con dei bit-fields\cite[P.150]{xc8} ed un flexible array member (\texttt{data[]}) in modo da poter essere mandata direttamente come \texttt{void*} (void pointer) attraverso la seriale. + +% replace with lstings? +\begin{minipage}{\linewidth} +\begin{verbatim} +typedef struct { + unsigned status :4; + unsigned channel :4; + uint8_t data[]; +} midi_message_t; +\end{verbatim} +\end{minipage} + +Sono definite in oltre le seguenti enumerazioni per migliorare la leggibilit\`a del codice. + +\begin{minipage}{\linewidth} +\begin{verbatim} +typedef enum { + C = 0, // Do + D = 1, // Re + E = 2, // Mi + F = 3, // Fa + G = 4, // Sol + A = 5, // La + B = 6, // Si +} midi_note_t; +\end{verbatim} +\end{minipage} + +\begin{minipage}{\linewidth} +\begin{verbatim} +typedef enum { + NOTE_ON = 0x8, + NOTE_OFF = 0x9, + POLYPHONIC_KEYPRESS = 0xA, + CONTROLLER = 0xB, + PROGRAM_CHANGE = 0xC, + CHANNEL_PRESSURE = 0xD, + PITCH_BLEND = 0xF +} midi_status_t; +\end{verbatim} +\end{minipage} + +\subsection{API per dispositivi senza allocazione di memoria dinamica} +Purtroppo alcuni microcontrollori, tra cui il PIC18F45K22 non supportano l'allocazione di memoria dinamica necessaria per instanziare il flexible array member della struttura \texttt{midi\_message\_t}. Dunque la libreria MIDI \`e stata modificata per utilizzare la struttura dati come segue. + +\begin{minipage}{\linewidth} +\begin{verbatim} +typedef struct { + unsigned status :4; + unsigned channel :4; + size_t data_size; + uint8_t data[MIDI_DATA_MAX_SIZE]; +} midi_message_t; +\end{verbatim} +\end{minipage} + +Nello specifico, nel file header si presenta nel seguente modo. +La macro \texttt{MIDI\_DYNAMIC\_MEMORY\_ALLOC}, normalmente non definita, indica all'API che pu\`o usufruire dell'allocazione dinamica. Quindi che le funzioni \texttt{malloc} e \texttt{free} siano implementate. + +\begin{minipage}{\linewidth} +\begin{verbatim} +typedef struct { + unsigned status :4; + unsigned channel :4; + +#ifdef MIDI_DYNAMIC_MEMORY_ALLOC + uint8_t data[]; +#else + size_t data_size; + uint8_t data[MIDI_DATA_MAX_SIZE]; +#endif +} midi_message_t; +\end{verbatim} +\end{minipage} + +Lo svantaggio di questa interfaccia \`e che non rende possibile mandare direttamente i pacchetti MIDI come un qualsiasi buffer. \`E necessario infatti implementare una funzione specifica per ogni piattaforma. + +\begin{minipage}{\linewidth} +\begin{verbatim} +int eusart_write_midi(midi_message_t *pkt) +{ + if (pkt == NULL) { + return -1; + } + + if (pkt->data == NULL) { + return -2; + } + + size_t length = pkt->data_size; + uint8_t *data = pkt->data; + + putch((pkt->status<<4) | pkt->channel); + + while (length--) { + putch(*(data++)); + } + + return 0; +} +\end{verbatim} +\end{minipage} + + +\begin{table*}[ht] +\caption{Sommario degli status bytes\label{tab:status-bytes}} +\centering +\begin{tabular}{>{\tt}c >{\tt}c c l} + \toprule + \multicolumn{2}{c}{\bfseries Status Byte} & \bfseries Data size & \bfseries Descrizione \\ + \footnotesize Hex & \footnotesize Bin & & \\ + \midrule + 8n & 1000 nnnn & 2 & Note off \\ + 9n & 1001 nnnn & 2 & Note on \\ + An & 1010 nnnn & 2 & Polyphonic key (Aftertouch) \\ + Bn & 1011 nnnn & 2 & Controller \( D_0 < 120 \) \\ + Cn & 1100 nnnn & 1 & Program change \\ + Dn & 1101 nnnn & 1 & Channel pressure (Aftertouch) \\ + En & 1110 nnnn & 2 & pitch bend \\ + \midrule + Bn & 1011 nnnn & 2 & Select channel mode \(D_0 \geq 120 \) \\ + \midrule + F0 & 1111 0000 & variable & System exclusive \\ + Fx & 1111 0xxx & 0 to 2 & System common \\ + Fx & 1111 1xxx & 0 & System real time \\ + \bottomrule +\end{tabular} +\end{table*} + +\begin{thebibliography}{9} +\bibitem{wiki:midi} + \textit{Musical Instrument Digital Interface}, + [online], (visitato il 18.01.2018) \\ + \url{https://it.wikipedia.org/w/index.php?title=Musical_Instrument_Digital_Interface} + +\bibitem{somascape} + \textit{Guide to the MIDI Software Specification}, + [online], (visitato il 18.01.2018) \\ + \url{http://www.somascape.org/midi/tech/spec.html} + +\bibitem{gweep} + \textit{The MIDI Specification}, + [online], (visistato il 22.01.2018) \\ + \url{http://www.gweep.net/~prefect/eng/reference/protocol/midispec.html} +\bibitem{xc8} + \textit{MPLAB® XC8 C Compiler User’s Guide}, + 2012 Microchip Technology Inc, + ISBN: 978-1-62076-375-9, + http://ww1.microchip.com/downloads/en/DeviceDoc/52053B.pdf +\end{thebibliography} \end{document} \ No newline at end of file diff --git a/hw/Mids.PcbDoc b/hw/Mids.PcbDoc new file mode 100644 index 0000000..ac70cda Binary files /dev/null and b/hw/Mids.PcbDoc differ diff --git a/hw/Mids.PrjPcb b/hw/Mids.PrjPcb new file mode 100644 index 0000000..a650e60 --- /dev/null +++ b/hw/Mids.PrjPcb @@ -0,0 +1,1099 @@ +[Design] +Version=1.0 +HierarchyMode=0 +ChannelRoomNamingStyle=0 +ReleasesFolder= +ChannelDesignatorFormatString=$Component_$RoomName +ChannelRoomLevelSeperator=_ +OpenOutputs=1 +ArchiveProject=0 +TimestampOutput=0 +SeparateFolders=0 +TemplateLocationPath= +PinSwapBy_Netlabel=1 +PinSwapBy_Pin=1 +AllowPortNetNames=0 +AllowSheetEntryNetNames=0 +AppendSheetNumberToLocalNets=0 +NetlistSinglePinNets=0 +DefaultConfiguration=Sources +UserID=0xFFFFFFFF +DefaultPcbProtel=1 +DefaultPcbPcad=0 +ReorderDocumentsOnCompile=1 +NameNetsHierarchically=1 +PowerPortNamesTakePriority=0 +PushECOToAnnotationFile=1 +DItemRevisionGUID= +ReportSuppressedErrorsInMessages=0 +FSMCodingStyle=eFMSDropDownList_OneProcess +FSMEncodingStyle=eFMSDropDownList_OneHot +OutputPath= +LogFolderPath= +ManagedProjectGUID= +LinkedManagedProjectGUID= +IncludeDesignInRelease=0 + +[Preferences] +PrefsVaultGUID= +PrefsRevisionGUID= + +[Document1] +DocumentPath=Piezo.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=VJJUNBIE + +[Document2] +DocumentPath=Mids.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=ABPFCPLB + +[Document3] +DocumentPath=TestPad.SchLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document4] +DocumentPath=Mids.SchLib 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+PageOptions18=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType19=Text Print +OutputName19=Text Print +OutputDocumentPath19= +OutputVariantName19= +OutputDefault19=0 +PageOptions19=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType20=Text Print +OutputName20=Text Print +OutputDocumentPath20= +OutputVariantName20= +OutputDefault20=0 +PageOptions20=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType21=Text Print +OutputName21=Text Print +OutputDocumentPath21= +OutputVariantName21= +OutputDefault21=0 +PageOptions21=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType22=Text Print +OutputName22=Text Print +OutputDocumentPath22= +OutputVariantName22= +OutputDefault22=0 +PageOptions22=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType23=Text Print +OutputName23=Text Print +OutputDocumentPath23= +OutputVariantName23= +OutputDefault23=0 +PageOptions23=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType24=Text Print +OutputName24=Text Print +OutputDocumentPath24= +OutputVariantName24= +OutputDefault24=0 +PageOptions24=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType25=Text Print +OutputName25=Text Print +OutputDocumentPath25= +OutputVariantName25= +OutputDefault25=0 +PageOptions25=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType26=Text Print +OutputName26=Text Print +OutputDocumentPath26= +OutputVariantName26= +OutputDefault26=0 +PageOptions26=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType27=Text Print +OutputName27=Text Print +OutputDocumentPath27= +OutputVariantName27= +OutputDefault27=0 +PageOptions27=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType28=Text Print +OutputName28=Text Print +OutputDocumentPath28= +OutputVariantName28= +OutputDefault28=0 +PageOptions28=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType29=Text Print +OutputName29=Text Print +OutputDocumentPath29= +OutputVariantName29= +OutputDefault29=0 +PageOptions29=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 + +[OutputGroup8] +Name=Validation Outputs +Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=Component states check +OutputName1=Vault's components states check +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=Configuration compliance +OutputName2=Environment configuration compliance check +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=Design Rules Check +OutputName3=Design Rules Check +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType4=Differences Report +OutputName4=Differences Report +OutputDocumentPath4= +OutputVariantName4= +OutputDefault4=0 +PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType5=Electrical Rules Check +OutputName5=Electrical Rules Check +OutputDocumentPath5= +OutputVariantName5= +OutputDefault5=0 +PageOptions5=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType6=Footprint Comparison Report +OutputName6=Footprint Comparison Report +OutputDocumentPath6= +OutputVariantName6= +OutputDefault6=0 + +[OutputGroup9] +Name=Export Outputs +Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=AutoCAD dwg/dxf PCB +OutputName1=AutoCAD dwg/dxf File PCB +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=AutoCAD dwg/dxf Schematic +OutputName2=AutoCAD dwg/dxf File Schematic +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=ExportIDF +OutputName3=Export IDF +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +OutputType4=ExportPARASOLID +OutputName4=Export PARASOLID +OutputDocumentPath4= +OutputVariantName4=[No Variations] +OutputDefault4=0 +OutputType5=ExportSTEP +OutputName5=Export STEP +OutputDocumentPath5= +OutputVariantName5=[No Variations] +OutputDefault5=0 +OutputType6=ExportVRML +OutputName6=Export VRML +OutputDocumentPath6= +OutputVariantName6=[No Variations] +OutputDefault6=0 +OutputType7=Save As/Export PCB +OutputName7=Save As/Export PCB +OutputDocumentPath7= +OutputVariantName7= +OutputDefault7=0 +OutputType8=Save As/Export Schematic +OutputName8=Save As/Export Schematic +OutputDocumentPath8= +OutputVariantName8= +OutputDefault8=0 +OutputType9=Specctra Design PCB +OutputName9=Specctra Design PCB +OutputDocumentPath9= +OutputVariantName9= +OutputDefault9=0 + +[OutputGroup10] +Name=PostProcess Outputs +Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=Copy Files +OutputName1=Copy Files +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 + +[Modification Levels] +Type1=1 +Type2=1 +Type3=1 +Type4=1 +Type5=1 +Type6=1 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=1 +Type12=1 +Type13=1 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=1 +Type26=1 +Type27=1 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=1 +Type33=1 +Type34=1 +Type35=1 +Type36=1 +Type37=1 +Type38=1 +Type39=1 +Type40=1 +Type41=1 +Type42=1 +Type43=1 +Type44=1 +Type45=1 +Type46=1 +Type47=1 +Type48=1 +Type49=1 +Type50=1 +Type51=1 +Type52=1 +Type53=1 +Type54=1 +Type55=1 +Type56=1 +Type57=1 +Type58=1 +Type59=1 +Type60=1 +Type61=1 +Type62=1 +Type63=1 +Type64=1 +Type65=1 +Type66=1 +Type67=1 +Type68=1 +Type69=1 +Type70=1 +Type71=1 +Type72=1 +Type73=1 +Type74=1 +Type75=1 +Type76=1 +Type77=1 +Type78=1 +Type79=1 +Type80=1 +Type81=1 +Type82=1 +Type83=1 +Type84=1 +Type85=1 +Type86=1 +Type87=1 +Type88=1 +Type89=1 +Type90=1 + +[Difference Levels] +Type1=1 +Type2=1 +Type3=1 +Type4=1 +Type5=1 +Type6=1 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=1 +Type12=1 +Type13=1 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=1 +Type26=1 +Type27=1 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=1 +Type33=1 +Type34=1 +Type35=1 +Type36=1 +Type37=1 +Type38=1 +Type39=1 +Type40=1 +Type41=1 +Type42=1 +Type43=1 +Type44=1 +Type45=1 +Type46=1 +Type47=1 +Type48=1 +Type49=1 + +[Electrical Rules Check] +Type1=1 +Type2=1 +Type3=2 +Type4=1 +Type5=2 +Type6=2 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=2 +Type12=2 +Type13=2 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=2 +Type26=2 +Type27=2 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=2 +Type33=2 +Type34=2 +Type35=1 +Type36=2 +Type37=1 +Type38=2 +Type39=2 +Type40=2 +Type41=0 +Type42=2 +Type43=1 +Type44=1 +Type45=2 +Type46=1 +Type47=2 +Type48=2 +Type49=1 +Type50=2 +Type51=1 +Type52=1 +Type53=1 +Type54=1 +Type55=1 +Type56=2 +Type57=1 +Type58=1 +Type59=2 +Type60=1 +Type61=2 +Type62=2 +Type63=1 +Type64=0 +Type65=2 +Type66=3 +Type67=2 +Type68=2 +Type69=2 +Type70=2 +Type71=2 +Type72=2 +Type73=2 +Type74=1 +Type75=2 +Type76=1 +Type77=1 +Type78=1 +Type79=1 +Type80=2 +Type81=3 +Type82=3 +Type83=3 +Type84=3 +Type85=3 +Type86=2 +Type87=2 +Type88=2 +Type89=1 +Type90=1 +Type91=3 +Type92=3 +Type93=2 +Type94=2 +Type95=2 +Type96=2 +Type97=2 +Type98=0 +Type99=1 +Type100=2 +Type101=1 +Type102=2 +Type103=2 +Type104=1 +Type105=2 +Type106=2 +Type107=2 +Type108=2 +Type109=1 +Type110=1 +Type111=1 +Type112=1 +Type113=1 +MultiChannelAlternate=2 + +[ERC Connection Matrix] +L1=NNNNNNNNNNNWNNNWW +L2=NNWNNNNWWWNWNWNWN +L3=NWEENEEEENEWNEEWN +L4=NNENNNWEENNWNENWN +L5=NNNNNNNNNNNNNNNNN +L6=NNENNNNEENNWNENWN +L7=NNEWNNWEENNWNENWN +L8=NWEENEENEEENNEENN +L9=NWEENEEEENEWNEEWW +L10=NWNNNNNENNEWNNEWN +L11=NNENNNNEEENWNENWN +L12=WWWWNWWNWWWNWWWNN +L13=NNNNNNNNNNNWNNNWW +L14=NWEENEEEENEWNEEWW +L15=NNENNNNEEENWNENWW +L16=WWWWNWWNWWWNWWWNW +L17=WNNNNNNNWNNNWWWWN + +[Annotate] +SortOrder=3 +SortLocation=0 +MatchParameter1=Comment +MatchStrictly1=1 +MatchParameter2=Library Reference +MatchStrictly2=1 +PhysicalNamingFormat=$Component_$RoomName +GlobalIndexSortOrder=3 +GlobalIndexSortLocation=0 + +[PrjClassGen] +CompClassManualEnabled=0 +CompClassManualRoomEnabled=0 +NetClassAutoBusEnabled=1 +NetClassAutoCompEnabled=0 +NetClassAutoNamedHarnessEnabled=0 +NetClassManualEnabled=1 +NetClassSeparateForBusSections=0 + +[LibraryUpdateOptions] +SelectedOnly=0 +UpdateVariants=1 +PartTypes=0 +FullReplace=1 +UpdateDesignatorLock=1 +UpdatePartIDLock=1 +PreserveParameterLocations=1 +PreserveParameterVisibility=1 +DoGraphics=1 +DoParameters=1 +DoModels=1 +AddParameters=0 +RemoveParameters=0 +AddModels=1 +RemoveModels=1 +UpdateCurrentModels=1 + +[DatabaseUpdateOptions] +SelectedOnly=0 +UpdateVariants=1 +PartTypes=0 + +[Comparison Options] +ComparisonOptions0=Kind=Net|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions1=Kind=Net Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions2=Kind=Component Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions3=Kind=Rule|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions4=Kind=Differential Pair|MinPercent=50|MinMatch=1|ShowMatch=0|Confirm=0|UseName=0|InclAllRules=0 +ComparisonOptions5=Kind=Structure Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 + +[SmartPDF] +PageOptions=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 + diff --git a/hw/Mids.PrjPcbStructure b/hw/Mids.PrjPcbStructure new file mode 100644 index 0000000..3a7fd6e --- /dev/null +++ b/hw/Mids.PrjPcbStructure @@ -0,0 +1,11 @@ +Record=TopLevelDocument|FileName=Mids.SchDoc +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ16|SchDesignator=PZ16|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ17|SchDesignator=PZ17|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ18|SchDesignator=PZ18|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ19|SchDesignator=PZ19|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ20|SchDesignator=PZ20|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ21|SchDesignator=PZ21|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ22|SchDesignator=PZ22|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ23|SchDesignator=PZ23|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ24|SchDesignator=PZ24|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ25|SchDesignator=PZ25|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= diff --git a/hw/Mids.SchDoc b/hw/Mids.SchDoc new file mode 100644 index 0000000..6656435 Binary files /dev/null and b/hw/Mids.SchDoc differ diff --git a/hw/Mids.SchLib b/hw/Mids.SchLib new file mode 100644 index 0000000..b64e5ed Binary files /dev/null and b/hw/Mids.SchLib differ diff --git a/hw/Piezo.SchDoc b/hw/Piezo.SchDoc index 0ea38e2..b165d1a 100644 Binary files a/hw/Piezo.SchDoc and b/hw/Piezo.SchDoc differ diff --git a/hw/Project Logs for Mids/Mids PCB ECO 22.01.2018 13-24-52.LOG b/hw/Project Logs for Mids/Mids PCB ECO 22.01.2018 13-24-52.LOG new file mode 100644 index 0000000..705396b --- /dev/null +++ b/hw/Project Logs for Mids/Mids PCB ECO 22.01.2018 13-24-52.LOG @@ -0,0 +1,686 @@ +Added Component: Designator=D1_PZ16(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ17(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ18(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ19(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ20(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ21(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ22(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ23(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ24(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ25(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ16(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ17(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ18(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ19(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ20(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ21(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ22(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ23(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ24(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ25(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=P1(HDR2X8) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ16(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ17(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ18(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ19(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ20(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ21(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ22(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ23(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ24(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ25(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ16(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ17(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ18(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ19(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ20(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ21(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ22(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ23(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ24(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ25(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ16(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ17(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ18(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ19(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ20(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ21(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ22(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ23(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ24(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ25(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Pin To Net: NetName=GND Pin=D2_PZ16-1 +Added Pin To Net: NetName=GND Pin=D2_PZ17-1 +Added Pin To Net: NetName=GND Pin=D2_PZ18-1 +Added Pin To Net: NetName=GND Pin=D2_PZ19-1 +Added Pin To Net: NetName=GND Pin=D2_PZ20-1 +Added Pin To Net: NetName=GND Pin=D2_PZ21-1 +Added Pin To Net: NetName=GND Pin=D2_PZ22-1 +Added Pin To Net: NetName=GND Pin=D2_PZ23-1 +Added Pin To Net: NetName=GND Pin=D2_PZ24-1 +Added Pin To Net: NetName=GND Pin=D2_PZ25-1 +Added Pin To Net: NetName=GND Pin=P1-11 +Added Pin To Net: NetName=GND Pin=P1-12 +Added Pin To Net: NetName=GND Pin=P1-13 +Added Pin To Net: NetName=GND Pin=R2_PZ16-1 +Added Pin To Net: NetName=GND Pin=R2_PZ17-1 +Added Pin To Net: NetName=GND Pin=R2_PZ18-1 +Added Pin To Net: NetName=GND Pin=R2_PZ19-1 +Added Pin To Net: NetName=GND Pin=R2_PZ20-1 +Added Pin To Net: NetName=GND Pin=R2_PZ21-1 +Added Pin To Net: NetName=GND Pin=R2_PZ22-1 +Added Pin To Net: NetName=GND Pin=R2_PZ23-1 +Added Pin To Net: NetName=GND Pin=R2_PZ24-1 +Added Pin To Net: NetName=GND Pin=R2_PZ25-1 +Added Pin To Net: NetName=GND Pin=Y1_PZ16-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ17-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ18-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ19-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ20-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ21-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ22-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ23-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ24-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ25-2 +Added Net: Name=GND +Added Pin To Net: NetName=NetR1_PZ16_1 Pin=R1_PZ16-1 +Added Pin To Net: NetName=NetR1_PZ16_1 Pin=R2_PZ16-2 +Added Pin To Net: NetName=NetR1_PZ16_1 Pin=Y1_PZ16-1 +Added Net: Name=NetR1_PZ16_1 +Added Pin To Net: NetName=NetR1_PZ17_1 Pin=R1_PZ17-1 +Added Pin To Net: NetName=NetR1_PZ17_1 Pin=R2_PZ17-2 +Added Pin To Net: NetName=NetR1_PZ17_1 Pin=Y1_PZ17-1 +Added Net: Name=NetR1_PZ17_1 +Added Pin To Net: NetName=NetR1_PZ18_1 Pin=R1_PZ18-1 +Added Pin To Net: NetName=NetR1_PZ18_1 Pin=R2_PZ18-2 +Added Pin To Net: NetName=NetR1_PZ18_1 Pin=Y1_PZ18-1 +Added Net: Name=NetR1_PZ18_1 +Added Pin To Net: NetName=NetR1_PZ19_1 Pin=R1_PZ19-1 +Added Pin To Net: NetName=NetR1_PZ19_1 Pin=R2_PZ19-2 +Added Pin To Net: NetName=NetR1_PZ19_1 Pin=Y1_PZ19-1 +Added Net: Name=NetR1_PZ19_1 +Added Pin To Net: NetName=NetR1_PZ20_1 Pin=R1_PZ20-1 +Added Pin To Net: NetName=NetR1_PZ20_1 Pin=R2_PZ20-2 +Added Pin To Net: NetName=NetR1_PZ20_1 Pin=Y1_PZ20-1 +Added Net: Name=NetR1_PZ20_1 +Added Pin To Net: NetName=NetR1_PZ21_1 Pin=R1_PZ21-1 +Added Pin To Net: NetName=NetR1_PZ21_1 Pin=R2_PZ21-2 +Added Pin To Net: NetName=NetR1_PZ21_1 Pin=Y1_PZ21-1 +Added Net: Name=NetR1_PZ21_1 +Added Pin To Net: NetName=NetR1_PZ22_1 Pin=R1_PZ22-1 +Added Pin To Net: NetName=NetR1_PZ22_1 Pin=R2_PZ22-2 +Added Pin To Net: NetName=NetR1_PZ22_1 Pin=Y1_PZ22-1 +Added Net: Name=NetR1_PZ22_1 +Added Pin To Net: NetName=NetR1_PZ23_1 Pin=R1_PZ23-1 +Added Pin To Net: NetName=NetR1_PZ23_1 Pin=R2_PZ23-2 +Added Pin To Net: NetName=NetR1_PZ23_1 Pin=Y1_PZ23-1 +Added Net: Name=NetR1_PZ23_1 +Added Pin To Net: NetName=NetR1_PZ24_1 Pin=R1_PZ24-1 +Added Pin To Net: NetName=NetR1_PZ24_1 Pin=R2_PZ24-2 +Added Pin To Net: NetName=NetR1_PZ24_1 Pin=Y1_PZ24-1 +Added Net: Name=NetR1_PZ24_1 +Added Pin To Net: NetName=NetR1_PZ25_1 Pin=R1_PZ25-1 +Added Pin To Net: NetName=NetR1_PZ25_1 Pin=R2_PZ25-2 +Added Pin To Net: NetName=NetR1_PZ25_1 Pin=Y1_PZ25-1 +Added Net: Name=NetR1_PZ25_1 +Added Pin To Net: NetName=PZ16 Pin=D1_PZ16-1 +Added Pin To Net: NetName=PZ16 Pin=D2_PZ16-2 +Added Pin To Net: NetName=PZ16 Pin=P1-1 +Added Pin To Net: NetName=PZ16 Pin=R1_PZ16-2 +Added Net: Name=PZ16 +Added Pin To Net: NetName=PZ17 Pin=D1_PZ17-1 +Added Pin To Net: NetName=PZ17 Pin=D2_PZ17-2 +Added Pin To Net: NetName=PZ17 Pin=P1-2 +Added Pin To Net: NetName=PZ17 Pin=R1_PZ17-2 +Added Net: Name=PZ17 +Added Pin To Net: NetName=PZ18 Pin=D1_PZ18-1 +Added Pin To Net: NetName=PZ18 Pin=D2_PZ18-2 +Added Pin To Net: NetName=PZ18 Pin=P1-3 +Added Pin To Net: NetName=PZ18 Pin=R1_PZ18-2 +Added Net: Name=PZ18 +Added Pin To Net: NetName=PZ19 Pin=D1_PZ19-1 +Added Pin To Net: NetName=PZ19 Pin=D2_PZ19-2 +Added Pin To Net: NetName=PZ19 Pin=P1-4 +Added Pin To Net: NetName=PZ19 Pin=R1_PZ19-2 +Added Net: Name=PZ19 +Added Pin To Net: NetName=PZ20 Pin=D1_PZ20-1 +Added Pin To Net: NetName=PZ20 Pin=D2_PZ20-2 +Added Pin To Net: NetName=PZ20 Pin=P1-5 +Added Pin To Net: NetName=PZ20 Pin=R1_PZ20-2 +Added Net: Name=PZ20 +Added Pin To Net: NetName=PZ21 Pin=D1_PZ21-1 +Added Pin To Net: NetName=PZ21 Pin=D2_PZ21-2 +Added Pin To Net: NetName=PZ21 Pin=P1-6 +Added Pin To Net: NetName=PZ21 Pin=R1_PZ21-2 +Added Net: Name=PZ21 +Added Pin To Net: NetName=PZ22 Pin=D1_PZ22-1 +Added Pin To Net: NetName=PZ22 Pin=D2_PZ22-2 +Added Pin To Net: NetName=PZ22 Pin=P1-7 +Added Pin To Net: NetName=PZ22 Pin=R1_PZ22-2 +Added Net: Name=PZ22 +Added Pin To Net: NetName=PZ23 Pin=D1_PZ23-1 +Added Pin To Net: NetName=PZ23 Pin=D2_PZ23-2 +Added Pin To Net: NetName=PZ23 Pin=P1-8 +Added Pin To Net: NetName=PZ23 Pin=R1_PZ23-2 +Added Net: Name=PZ23 +Added Pin To Net: NetName=PZ24 Pin=D1_PZ24-1 +Added Pin To Net: NetName=PZ24 Pin=D2_PZ24-2 +Added Pin To Net: NetName=PZ24 Pin=P1-9 +Added Pin To Net: NetName=PZ24 Pin=R1_PZ24-2 +Added Net: Name=PZ24 +Added Pin To Net: NetName=PZ25 Pin=D1_PZ25-1 +Added Pin To Net: NetName=PZ25 Pin=D2_PZ25-2 +Added Pin To Net: NetName=PZ25 Pin=P1-10 +Added Pin To Net: NetName=PZ25 Pin=R1_PZ25-2 +Added Net: Name=PZ25 +Added Pin To Net: NetName=VCC Pin=D1_PZ16-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ17-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ18-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ19-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ20-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ21-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ22-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ23-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ24-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ25-2 +Added Pin To Net: NetName=VCC Pin=P1-14 +Added Pin To Net: NetName=VCC Pin=P1-15 +Added Pin To Net: NetName=VCC Pin=P1-16 +Added Net: Name=VCC +Added Class: Name=Mids +Added Class: Name=PZ16 +Added Class: Name=PZ17 +Added Class: Name=PZ18 +Added Class: Name=PZ19 +Added Class: Name=PZ20 +Added Class: Name=PZ21 +Added Class: Name=PZ22 +Added Class: Name=PZ23 +Added Class: Name=PZ24 +Added Class: Name=PZ25 +Added Class: Name=Piezo +Added Room: Name=Mids +Added Room: Name=PZ16 +Added Room: Name=PZ17 +Added Room: Name=PZ18 +Added Room: Name=PZ19 +Added Room: Name=PZ20 +Added Room: Name=PZ21 +Added Room: Name=PZ22 +Added Room: Name=PZ23 +Added Room: Name=PZ24 +Added Room: Name=PZ25 diff --git a/hw/Project Logs for Steps/Piezo SCH ECO 22.01.2018 09-20-08.LOG b/hw/Project Logs for Steps/Piezo SCH ECO 22.01.2018 09-20-08.LOG new file mode 100644 index 0000000..528e92c --- /dev/null +++ b/hw/Project Logs for Steps/Piezo SCH ECO 22.01.2018 09-20-08.LOG @@ -0,0 +1,5 @@ +Replace Part D1 Diode BAT18 in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with Diode BAT18 from Miscellaneous Devices.IntLib +Replace Part D2 Diode BAT18 in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with Diode BAT18 from Miscellaneous Devices.IntLib +Replace Part R1 Res2 in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with Res2 from Miscellaneous Devices.IntLib +Replace Part R2 Res2 in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with Res2 from Miscellaneous Devices.IntLib +Replace Part Y1 XTAL in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with XTAL from Miscellaneous Devices.IntLib diff --git a/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-25-04.LOG b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-25-04.LOG new file mode 100644 index 0000000..17d18c2 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-25-04.LOG @@ -0,0 +1,51 @@ +Removed Pin From Net: NetName=PZ24 Pin=U1-8 +Removed Pin From Net: NetName=PZ22 Pin=U1-29 +Removed Pin From Net: NetName=PZ23 Pin=U1-30 +Added Component: Designator=P4(57PC5FS) +Add component. Clean all parameters for all variants +Added Component: Designator=R4(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=R5(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=TP10(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP11(PIN1) +Add component. Clean all parameters for all variants +Added Pin To Net: NetName=GND Pin=P4-2 +Added Pin To Net: NetName=GND Pin=P4-7 +Added Pin To Net: NetName=VCC Pin=R4-2 +Added Pin To Net: NetName=PZ22 Pin=U1-8 +Added Pin To Net: NetName=PZ23 Pin=U1-9 +Added Pin To Net: NetName=PZ24 Pin=U1-10 +Added Pin To Net: NetName=NetP4_4 Pin=P4-4 +Added Pin To Net: NetName=NetP4_4 Pin=R4-1 +Added Net: Name=NetP4_4 +Added Pin To Net: NetName=NetP4_5 Pin=P4-5 +Added Pin To Net: NetName=NetP4_5 Pin=R5-2 +Added Net: Name=NetP4_5 +Added Pin To Net: NetName=NetR5_1 Pin=R5-1 +Added Pin To Net: NetName=NetR5_1 Pin=TP10-1 +Added Pin To Net: NetName=NetR5_1 Pin=U1-29 +Added Net: Name=NetR5_1 +Added Pin To Net: NetName=NetTP11_1 Pin=TP11-1 +Added Pin To Net: NetName=NetTP11_1 Pin=U1-30 +Added Net: Name=NetTP11_1 +Added Member To Class: ClassName=Steps Member=Component P4 57PC5FS +Added Member To Class: ClassName=Steps Member=Component R4 Res2 +Added Member To Class: ClassName=Steps Member=Component R5 Res2 +Added Member To Class: ClassName=Steps Member=Component TP10 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP11 Test Pad diff --git a/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-26-23.LOG b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-26-23.LOG new file mode 100644 index 0000000..17d18c2 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-26-23.LOG @@ -0,0 +1,51 @@ +Removed Pin From Net: NetName=PZ24 Pin=U1-8 +Removed Pin From Net: NetName=PZ22 Pin=U1-29 +Removed Pin From Net: NetName=PZ23 Pin=U1-30 +Added Component: Designator=P4(57PC5FS) +Add component. Clean all parameters for all variants +Added Component: Designator=R4(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=R5(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=TP10(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP11(PIN1) +Add component. Clean all parameters for all variants +Added Pin To Net: NetName=GND Pin=P4-2 +Added Pin To Net: NetName=GND Pin=P4-7 +Added Pin To Net: NetName=VCC Pin=R4-2 +Added Pin To Net: NetName=PZ22 Pin=U1-8 +Added Pin To Net: NetName=PZ23 Pin=U1-9 +Added Pin To Net: NetName=PZ24 Pin=U1-10 +Added Pin To Net: NetName=NetP4_4 Pin=P4-4 +Added Pin To Net: NetName=NetP4_4 Pin=R4-1 +Added Net: Name=NetP4_4 +Added Pin To Net: NetName=NetP4_5 Pin=P4-5 +Added Pin To Net: NetName=NetP4_5 Pin=R5-2 +Added Net: Name=NetP4_5 +Added Pin To Net: NetName=NetR5_1 Pin=R5-1 +Added Pin To Net: NetName=NetR5_1 Pin=TP10-1 +Added Pin To Net: NetName=NetR5_1 Pin=U1-29 +Added Net: Name=NetR5_1 +Added Pin To Net: NetName=NetTP11_1 Pin=TP11-1 +Added Pin To Net: NetName=NetTP11_1 Pin=U1-30 +Added Net: Name=NetTP11_1 +Added Member To Class: ClassName=Steps Member=Component P4 57PC5FS +Added Member To Class: ClassName=Steps Member=Component R4 Res2 +Added Member To Class: ClassName=Steps Member=Component R5 Res2 +Added Member To Class: ClassName=Steps Member=Component TP10 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP11 Test Pad diff --git a/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-29.LOG b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-29.LOG new file mode 100644 index 0000000..2f12384 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-29.LOG @@ -0,0 +1,44 @@ +Removed Pin From Net: NetName=PZ24 Pin=U1-8 +Removed Pin From Net: NetName=PZ22 Pin=U1-29 +Removed Pin From Net: NetName=PZ23 Pin=U1-30 +Added Component: Designator=R4(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=R5(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=TP10(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP11(PIN1) +Add component. Clean all parameters for all variants +Added Pin To Net: NetName=VCC Pin=R4-2 +Added Pin To Net: NetName=PZ22 Pin=U1-8 +Added Pin To Net: NetName=PZ23 Pin=U1-9 +Added Pin To Net: NetName=PZ24 Pin=U1-10 +Added Pin To Net: NetName=NetP4_4 Pin=R4-1 +Added Net: Name=NetP4_4 +Added Pin To Net: NetName=NetP4_5 Pin=R5-2 +Added Net: Name=NetP4_5 +Added Pin To Net: NetName=NetR5_1 Pin=R5-1 +Added Pin To Net: NetName=NetR5_1 Pin=TP10-1 +Added Pin To Net: NetName=NetR5_1 Pin=U1-29 +Added Net: Name=NetR5_1 +Added Pin To Net: NetName=NetTP11_1 Pin=TP11-1 +Added Pin To Net: NetName=NetTP11_1 Pin=U1-30 +Added Net: Name=NetTP11_1 +Added Member To Class: ClassName=Steps Member=Component R4 Res2 +Added Member To Class: ClassName=Steps Member=Component R5 Res2 +Added Member To Class: ClassName=Steps Member=Component TP10 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP11 Test Pad diff --git a/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-59.LOG b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-59.LOG new file mode 100644 index 0000000..17d18c2 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-59.LOG @@ -0,0 +1,51 @@ +Removed Pin From Net: NetName=PZ24 Pin=U1-8 +Removed Pin From Net: NetName=PZ22 Pin=U1-29 +Removed Pin From Net: NetName=PZ23 Pin=U1-30 +Added Component: Designator=P4(57PC5FS) +Add component. Clean all parameters for all variants +Added Component: Designator=R4(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=R5(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=TP10(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP11(PIN1) +Add component. Clean all parameters for all variants +Added Pin To Net: NetName=GND Pin=P4-2 +Added Pin To Net: NetName=GND Pin=P4-7 +Added Pin To Net: NetName=VCC Pin=R4-2 +Added Pin To Net: NetName=PZ22 Pin=U1-8 +Added Pin To Net: NetName=PZ23 Pin=U1-9 +Added Pin To Net: NetName=PZ24 Pin=U1-10 +Added Pin To Net: NetName=NetP4_4 Pin=P4-4 +Added Pin To Net: NetName=NetP4_4 Pin=R4-1 +Added Net: Name=NetP4_4 +Added Pin To Net: NetName=NetP4_5 Pin=P4-5 +Added Pin To Net: NetName=NetP4_5 Pin=R5-2 +Added Net: Name=NetP4_5 +Added Pin To Net: NetName=NetR5_1 Pin=R5-1 +Added Pin To Net: NetName=NetR5_1 Pin=TP10-1 +Added Pin To Net: NetName=NetR5_1 Pin=U1-29 +Added Net: Name=NetR5_1 +Added Pin To Net: NetName=NetTP11_1 Pin=TP11-1 +Added Pin To Net: NetName=NetTP11_1 Pin=U1-30 +Added Net: Name=NetTP11_1 +Added Member To Class: ClassName=Steps Member=Component P4 57PC5FS +Added Member To Class: ClassName=Steps Member=Component R4 Res2 +Added Member To Class: ClassName=Steps Member=Component R5 Res2 +Added Member To Class: ClassName=Steps Member=Component TP10 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP11 Test Pad diff --git a/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-52-31.LOG b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-52-31.LOG new file mode 100644 index 0000000..5172025 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-52-31.LOG @@ -0,0 +1,289 @@ +Removed Pin From Net: NetName=VCC Pin=U1-1 +Removed Pin From Net: NetName=NetPZ25_D1_1 Pin=U1-8 +Removed Pin From Net: NetName=NetPZ23_D1_1 Pin=U1-29 +Removed Pin From Net: NetName=NetPZ24_D1_1 Pin=U1-30 +Removed Pin From Net: NetName=NetPZ14_D1_1 Pin=U1-38 +Removed Pin From Net: NetName=NetPZ15_D1_1 Pin=U1-39 +Removed Pin From Net: NetName=NetPZ16_D1_1 Pin=U1-40 +Change Component Designator: OldDesignator=PZ1_D1 NewDesignator=D1_PZ1 +Change Component Designator: OldDesignator=PZ1_D2 NewDesignator=D2_PZ1 +Change Component Designator: OldDesignator=PZ1_R1 NewDesignator=R1_PZ1 +Change Component Designator: OldDesignator=PZ1_R2 NewDesignator=R2_PZ1 +Change Component Designator: OldDesignator=PZ1_Y1 NewDesignator=Y1_PZ1 +Change Component Designator: OldDesignator=PZ2_D1 NewDesignator=D1_PZ2 +Change Component Designator: OldDesignator=PZ2_D2 NewDesignator=D2_PZ2 +Change Component Designator: OldDesignator=PZ2_R1 NewDesignator=R1_PZ2 +Change Component Designator: OldDesignator=PZ2_R2 NewDesignator=R2_PZ2 +Change Component Designator: OldDesignator=PZ2_Y1 NewDesignator=Y1_PZ2 +Change Component Designator: OldDesignator=PZ3_D1 NewDesignator=D1_PZ3 +Change Component Designator: OldDesignator=PZ3_D2 NewDesignator=D2_PZ3 +Change Component Designator: OldDesignator=PZ3_R1 NewDesignator=R1_PZ3 +Change Component Designator: OldDesignator=PZ3_R2 NewDesignator=R2_PZ3 +Change Component Designator: OldDesignator=PZ3_Y1 NewDesignator=Y1_PZ3 +Change Component Designator: OldDesignator=PZ4_D1 NewDesignator=D1_PZ4 +Change Component Designator: OldDesignator=PZ4_D2 NewDesignator=D2_PZ4 +Change Component Designator: OldDesignator=PZ4_R1 NewDesignator=R1_PZ4 +Change Component Designator: OldDesignator=PZ4_R2 NewDesignator=R2_PZ4 +Change Component Designator: OldDesignator=PZ4_Y1 NewDesignator=Y1_PZ4 +Change Component Designator: OldDesignator=PZ5_D1 NewDesignator=D1_PZ5 +Change Component Designator: OldDesignator=PZ5_D2 NewDesignator=D2_PZ5 +Change Component Designator: OldDesignator=PZ5_R1 NewDesignator=R1_PZ5 +Change Component Designator: OldDesignator=PZ5_R2 NewDesignator=R2_PZ5 +Change Component Designator: OldDesignator=PZ5_Y1 NewDesignator=Y1_PZ5 +Change Component Designator: OldDesignator=PZ6_D1 NewDesignator=D1_PZ6 +Change Component Designator: OldDesignator=PZ6_D2 NewDesignator=D2_PZ6 +Change Component Designator: OldDesignator=PZ6_R1 NewDesignator=R1_PZ6 +Change Component Designator: OldDesignator=PZ6_R2 NewDesignator=R2_PZ6 +Change Component Designator: OldDesignator=PZ6_Y1 NewDesignator=Y1_PZ6 +Change Component Designator: OldDesignator=PZ7_D1 NewDesignator=D1_PZ7 +Change Component Designator: OldDesignator=PZ7_D2 NewDesignator=D2_PZ7 +Change Component Designator: OldDesignator=PZ7_R1 NewDesignator=R1_PZ7 +Change Component Designator: OldDesignator=PZ7_R2 NewDesignator=R2_PZ7 +Change Component Designator: OldDesignator=PZ7_Y1 NewDesignator=Y1_PZ7 +Change Component Designator: OldDesignator=PZ8_D1 NewDesignator=D1_PZ8 +Change Component Designator: OldDesignator=PZ8_D2 NewDesignator=D2_PZ8 +Change Component Designator: OldDesignator=PZ8_R1 NewDesignator=R1_PZ8 +Change Component Designator: OldDesignator=PZ8_R2 NewDesignator=R2_PZ8 +Change Component Designator: OldDesignator=PZ8_Y1 NewDesignator=Y1_PZ8 +Change Component Designator: OldDesignator=PZ9_D1 NewDesignator=D1_PZ9 +Change Component Designator: OldDesignator=PZ9_D2 NewDesignator=D2_PZ9 +Change Component Designator: OldDesignator=PZ9_R1 NewDesignator=R1_PZ9 +Change Component Designator: OldDesignator=PZ9_R2 NewDesignator=R2_PZ9 +Change Component Designator: OldDesignator=PZ9_Y1 NewDesignator=Y1_PZ9 +Change Component Designator: OldDesignator=PZ10_D1 NewDesignator=D1_PZ10 +Change Component Designator: OldDesignator=PZ10_D2 NewDesignator=D2_PZ10 +Change Component Designator: OldDesignator=PZ10_R1 NewDesignator=R1_PZ10 +Change Component Designator: OldDesignator=PZ10_R2 NewDesignator=R2_PZ10 +Change Component Designator: OldDesignator=PZ10_Y1 NewDesignator=Y1_PZ10 +Change Component Designator: OldDesignator=PZ11_D1 NewDesignator=D1_PZ11 +Change Component Designator: OldDesignator=PZ11_D2 NewDesignator=D2_PZ11 +Change Component Designator: OldDesignator=PZ11_R1 NewDesignator=R1_PZ11 +Change Component Designator: OldDesignator=PZ11_R2 NewDesignator=R2_PZ11 +Change Component Designator: OldDesignator=PZ11_Y1 NewDesignator=Y1_PZ11 +Change Component Designator: OldDesignator=PZ12_D1 NewDesignator=D1_PZ12 +Change Component Designator: OldDesignator=PZ12_D2 NewDesignator=D2_PZ12 +Change Component Designator: OldDesignator=PZ12_R1 NewDesignator=R1_PZ12 +Change Component Designator: OldDesignator=PZ12_R2 NewDesignator=R2_PZ12 +Change Component Designator: OldDesignator=PZ12_Y1 NewDesignator=Y1_PZ12 +Change Component Designator: OldDesignator=PZ13_D1 NewDesignator=D1_PZ13 +Change Component Designator: OldDesignator=PZ13_D2 NewDesignator=D2_PZ13 +Change Component Designator: OldDesignator=PZ13_R1 NewDesignator=R1_PZ13 +Change Component Designator: OldDesignator=PZ13_R2 NewDesignator=R2_PZ13 +Change Component Designator: OldDesignator=PZ13_Y1 NewDesignator=Y1_PZ13 +Change Component Designator: OldDesignator=PZ14_D1 NewDesignator=D1_PZ14 +Change Component Designator: OldDesignator=PZ14_D2 NewDesignator=D2_PZ14 +Change Component Designator: OldDesignator=PZ14_R1 NewDesignator=R1_PZ14 +Change Component Designator: OldDesignator=PZ14_R2 NewDesignator=R2_PZ14 +Change Component Designator: OldDesignator=PZ14_Y1 NewDesignator=Y1_PZ14 +Change Component Designator: OldDesignator=PZ15_D1 NewDesignator=D1_PZ15 +Change Component Designator: OldDesignator=PZ15_D2 NewDesignator=D2_PZ15 +Change Component Designator: OldDesignator=PZ15_R1 NewDesignator=R1_PZ15 +Change Component Designator: OldDesignator=PZ15_R2 NewDesignator=R2_PZ15 +Change Component Designator: OldDesignator=PZ15_Y1 NewDesignator=Y1_PZ15 +Added Component: Designator=C1(CAPR5-4X5) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "PackageDescription"; Value = "Capacitor; 2 Leads"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "CAPR5-4X5"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "23-Sep-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "100nF"; VariantName = "[No Variations]" +Added Component: Designator=D1(LED-1) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "08-Jul-2005"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Mech Layer 1 removed."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "LED; 2 Leads"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "LED-1"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=P1(HDR2X8) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=P2(HDR1X6) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=P3(HDR1X4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=R1(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]" +Added Component: Designator=R2(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]" +Added Component: Designator=R3(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "270"; VariantName = "[No Variations]" +Added Component: Designator=S1(TL36WW15050) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.apem.com"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "05-Dec-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Dec-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Schematic revised, PCB Footprint replaced."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Switch; 4 Leads"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "TL36WW15050"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "24-Mar-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=U2(N014) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.ti.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink2Description"; Value = "Datasheet"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink2URL"; Value = "http://www-s.ti.com/sc/ds/sn74f125.pdf"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1993"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "06-Jun-2005"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Stylized 3D Model Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "DIP; 14 Leads; Row Spacing 7.62 mm; Pitch 2.54 mm"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "N014"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Oct-1995"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Pin To Net: NetName=VCC Pin=C1-1 +Added Pin To Net: NetName=GND Pin=C1-2 +Added Pin To Net: NetName=NetPZ24_R1_1 Pin=D1-1 +Added Pin To Net: NetName=GND Pin=D1-2 +Added Pin To Net: NetName=NetPZ23_R1_1 Pin=P1-1 +Added Pin To Net: NetName=GND Pin=P1-11 +Added Pin To Net: NetName=GND Pin=P1-12 +Added Pin To Net: NetName=GND Pin=P1-13 +Added Pin To Net: NetName=VCC Pin=P1-14 +Added Pin To Net: NetName=VCC Pin=P1-15 +Added Pin To Net: NetName=VCC Pin=P1-16 +Added Pin To Net: NetName=NetPZ25_R1_1 Pin=P2-1 +Added Pin To Net: NetName=VCC Pin=P2-2 +Added Pin To Net: NetName=GND Pin=P2-3 +Added Pin To Net: NetName=NetPZ23_R1_1 Pin=P2-4 +Added Pin To Net: NetName=NetPZ24_D1_1 Pin=P2-5 +Added Pin To Net: NetName=NetPZ23_D1_1 Pin=P2-6 +Added Pin To Net: NetName=VCC Pin=P3-1 +Added Pin To Net: NetName=NetPZ16_D1_1 Pin=P3-2 +Added Pin To Net: NetName=NetPZ16_R1_1 Pin=P3-3 +Added Pin To Net: NetName=GND Pin=P3-4 +Added Pin To Net: NetName=NetPZ25_R1_1 Pin=R1-1 +Added Pin To Net: NetName=VCC Pin=R1-2 +Added Pin To Net: NetName=GND Pin=R2-1 +Added Pin To Net: NetName=NetPZ23_D1_1 Pin=R2-2 +Added Pin To Net: NetName=NetPZ24_R1_1 Pin=R3-1 +Added Pin To Net: NetName=NetPZ25_D1_1 Pin=R3-2 +Added Pin To Net: NetName=VCC Pin=S1-1 +Added Pin To Net: NetName=NetPZ25_D1_1 Pin=S1-2 +Added Pin To Net: NetName=GND Pin=S1-3 +Added Pin To Net: NetName=NetPZ25_R1_1 Pin=U1-1 +Added Pin To Net: NetName=NetPZ23_R1_1 Pin=U1-19 +Added Pin To Net: NetName=NetPZ16_D1_1 Pin=U1-25 +Added Pin To Net: NetName=NetPZ16_R1_1 Pin=U1-26 +Added Pin To Net: NetName=NetPZ23_D1_1 Pin=U1-38 +Added Pin To Net: NetName=NetPZ24_D1_1 Pin=U1-39 +Added Pin To Net: NetName=NetPZ23_R1_1 Pin=U1-40 +Added Pin To Net: NetName=NetPZ25_D1_1 Pin=U2-1 +Added Pin To Net: NetName=NetPZ14_D1_1 Pin=U2-2 +Added Pin To Net: NetName=NetPZ23_R1_1 Pin=U2-3 +Added Pin To Net: NetName=NetPZ25_D1_1 Pin=U2-4 +Added Pin To Net: NetName=NetPZ15_D1_1 Pin=U2-5 +Added Pin To Net: NetName=NetPZ24_D1_1 Pin=U2-6 +Added Pin To Net: NetName=GND Pin=U2-7 +Added Pin To Net: NetName=NetPZ23_D1_1 Pin=U2-8 +Added Pin To Net: NetName=NetPZ25_D1_1 Pin=U2-10 +Added Pin To Net: NetName=VCC Pin=U2-14 +Change Net Name : Old Net Name=NetPZ1_D1_1 New Net Name=PZ1 +Change Net Name : Old Net Name=NetPZ1_R1_1 New Net Name=NetR1_PZ1_1 +Change Net Name : Old Net Name=NetPZ2_D1_1 New Net Name=PZ2 +Change Net Name : Old Net Name=NetPZ2_R1_1 New Net Name=NetR1_PZ2_1 +Change Net Name : Old Net Name=NetPZ3_D1_1 New Net Name=PZ3 +Change Net Name : Old Net Name=NetPZ3_R1_1 New Net Name=NetR1_PZ3_1 +Change Net Name : Old Net Name=NetPZ4_D1_1 New Net Name=PZ4 +Change Net Name : Old Net Name=NetPZ4_R1_1 New Net Name=NetR1_PZ4_1 +Change Net Name : Old Net Name=NetPZ5_D1_1 New Net Name=PZ5 +Change Net Name : Old Net Name=NetPZ5_R1_1 New Net Name=NetR1_PZ5_1 +Change Net Name : Old Net Name=NetPZ6_D1_1 New Net Name=PZ6 +Change Net Name : Old Net Name=NetPZ6_R1_1 New Net Name=NetR1_PZ6_1 +Change Net Name : Old Net Name=NetPZ7_D1_1 New Net Name=PZ7 +Change Net Name : Old Net Name=NetPZ7_R1_1 New Net Name=NetR1_PZ7_1 +Change Net Name : Old Net Name=NetPZ8_D1_1 New Net Name=PZ8 +Change Net Name : Old Net Name=NetPZ8_R1_1 New Net Name=NetR1_PZ8_1 +Change Net Name : Old Net Name=NetPZ9_D1_1 New Net Name=PZ9 +Change Net Name : Old Net Name=NetPZ9_R1_1 New Net Name=NetR1_PZ9_1 +Change Net Name : Old Net Name=NetPZ10_D1_1 New Net Name=PZ10 +Change Net Name : Old Net Name=NetPZ10_R1_1 New Net Name=NetR1_PZ10_1 +Change Net Name : Old Net Name=NetPZ11_D1_1 New Net Name=PZ11 +Change Net Name : Old Net Name=NetPZ11_R1_1 New Net Name=NetR1_PZ11_1 +Change Net Name : Old Net Name=NetPZ12_D1_1 New Net Name=PZ12 +Change Net Name : Old Net Name=NetPZ12_R1_1 New Net Name=NetR1_PZ12_1 +Change Net Name : Old Net Name=NetPZ13_D1_1 New Net Name=PZ13 +Change Net Name : Old Net Name=NetPZ13_R1_1 New Net Name=NetR1_PZ13_1 +Change Net Name : Old Net Name=NetPZ14_D1_1 New Net Name=NetU2_2 +Change Net Name : Old Net Name=NetPZ14_R1_1 New Net Name=NetR1_PZ14_1 +Change Net Name : Old Net Name=NetPZ15_D1_1 New Net Name=NetU2_5 +Change Net Name : Old Net Name=NetPZ15_R1_1 New Net Name=NetR1_PZ15_1 +Change Net Name : Old Net Name=NetPZ16_D1_1 New Net Name=TX +Change Net Name : Old Net Name=NetPZ16_R1_1 New Net Name=RX +Change Net Name : Old Net Name=NetPZ23_D1_1 New Net Name=PGM +Change Net Name : Old Net Name=NetPZ23_R1_1 New Net Name=PGD +Change Net Name : Old Net Name=NetPZ24_D1_1 New Net Name=PGC +Change Net Name : Old Net Name=NetPZ24_R1_1 New Net Name=NetD1_1 +Change Net Name : Old Net Name=NetPZ25_D1_1 New Net Name=NetR3_2 +Change Net Name : Old Net Name=NetPZ25_R1_1 New Net Name=M\C\L\R\ +Added Pin To Net: NetName=PZ17 Pin=P1-2 +Added Pin To Net: NetName=PZ17 Pin=U1-20 +Added Net: Name=PZ17 +Added Pin To Net: NetName=PZ18 Pin=P1-3 +Added Pin To Net: NetName=PZ18 Pin=U1-21 +Added Net: Name=PZ18 +Added Pin To Net: NetName=PZ19 Pin=P1-4 +Added Pin To Net: NetName=PZ19 Pin=U1-22 +Added Net: Name=PZ19 +Added Pin To Net: NetName=PZ20 Pin=P1-5 +Added Pin To Net: NetName=PZ20 Pin=U1-27 +Added Net: Name=PZ20 +Added Pin To Net: NetName=PZ21 Pin=P1-6 +Added Pin To Net: NetName=PZ21 Pin=U1-28 +Added Net: Name=PZ21 +Added Pin To Net: NetName=PZ22 Pin=P1-7 +Added Pin To Net: NetName=PZ22 Pin=U1-29 +Added Net: Name=PZ22 +Added Pin To Net: NetName=PZ23 Pin=P1-8 +Added Pin To Net: NetName=PZ23 Pin=U1-30 +Added Net: Name=PZ23 +Added Pin To Net: NetName=PZ24 Pin=P1-9 +Added Pin To Net: NetName=PZ24 Pin=U1-8 +Added Net: Name=PZ24 +Added Pin To Net: NetName=PZ25 Pin=P1-10 +Added Pin To Net: NetName=PZ25 Pin=U2-9 +Added Net: Name=PZ25 +Change Class Name : Old Net Name=Xilofono New Net Name=Steps +Added Member To Class: ClassName=Steps Member=Component C1 Cap2 +Added Member To Class: ClassName=Steps Member=Component D1 LED1 +Added Member To Class: ClassName=Steps Member=Component P1 Bridge +Added Member To Class: ClassName=Steps Member=Component P2 LVISP +Added Member To Class: ClassName=Steps Member=Component P3 RS232 +Added Member To Class: ClassName=Steps Member=Component R1 Res2 +Added Member To Class: ClassName=Steps Member=Component R2 Res2 +Added Member To Class: ClassName=Steps Member=Component R3 Res2 +Added Member To Class: ClassName=Steps Member=Component S1 SW-SPDT +Added Member To Class: ClassName=Steps Member=Component U2 SN74F125N +Change Room Name: Old Name=Xilofono New Name=Steps +Change Room Scope: Old Scope=InComponentClass('Xilofono') New Scope=InComponentClass('Steps') diff --git a/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-58-00.LOG b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-58-00.LOG new file mode 100644 index 0000000..4428861 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-58-00.LOG @@ -0,0 +1 @@ +Change Component Footprint: Designator=S1 Old Footprint=TL36WW15050 New Footprint=HDR1X3 diff --git a/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-59-52.LOG b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-59-52.LOG new file mode 100644 index 0000000..62991c3 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-59-52.LOG @@ -0,0 +1 @@ +Change Component Footprint: Designator=D1 Old Footprint=LED-1 New Footprint=BAT-2 diff --git a/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG new file mode 100644 index 0000000..60e5407 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG @@ -0,0 +1,33 @@ +Removed Pin From Net: NetName=M\C\L\R\ Pin=P2-1 +Removed Pin From Net: NetName=VCC Pin=P2-2 +Removed Pin From Net: NetName=GND Pin=P2-3 +Removed Pin From Net: NetName=PGD Pin=P2-4 +Removed Pin From Net: NetName=PGC Pin=P2-5 +Removed Pin From Net: NetName=PGM Pin=P2-6 +Removed Member From Class: ClassName=Steps Member=P2 +Added Component: Designator=J1(95001-2661) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.molex.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink2Description"; Value = "Datasheet"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink2URL"; Value = "http://www.molex.com/cmc_upload/common_files/1222003_mx95001b.pdf"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink3Description"; Value = "Iges Model"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink3URL"; Value = "http://www.molex.com/pdm_docs/igs/95001-2441_igs.zip"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetDocument"; Value = "17-Dec-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DrillSize"; Value = "Nominal, Rounded to nearest 0.05mm"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDocument"; Value = "17-Dec-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "95001-2661"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PCB_Layout"; Value = "Complies with Manufacturer's Recommendation."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PCB_Mounting"; Value = "Thru-Hole"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PerformanceCategory"; Value = "3"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Ports"; Value = "1"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Positions/Loaded"; Value = "Port1 - 6/6"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "25-Jun-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Pin To Net: NetName=M\C\L\R\ Pin=J1-1 +Added Pin To Net: NetName=VCC Pin=J1-2 +Added Pin To Net: NetName=GND Pin=J1-3 +Added Pin To Net: NetName=PGD Pin=J1-4 +Added Pin To Net: NetName=PGC Pin=J1-5 +Added Pin To Net: NetName=PGM Pin=J1-6 +Added Member To Class: ClassName=Steps Member=Component J1 95001-2661 diff --git a/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-16-32.LOG b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-16-32.LOG new file mode 100644 index 0000000..580a188 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-16-32.LOG @@ -0,0 +1,37 @@ +Change Component Comment : Designator=J1 Old Comment=95001-2661 New Comment=LVPICSP +Change Component Designator: OldDesignator=P1 NewDesignator=P2 +Added Component: Designator=P1(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=TP1(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP2(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP3(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP4(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP5(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP6(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP7(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP8(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP9(PIN1) +Add component. Clean all parameters for all variants +Added Pin To Net: NetName=VCC Pin=P1-1 +Added Pin To Net: NetName=GND Pin=P1-2 +Added Member To Class: ClassName=Steps Member=Component P2 Bridge +Added Member To Class: ClassName=Steps Member=Component TP1 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP2 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP3 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP4 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP5 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP6 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP7 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP8 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP9 Test Pad diff --git a/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-17-29.LOG b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-17-29.LOG new file mode 100644 index 0000000..693d813 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-17-29.LOG @@ -0,0 +1 @@ +Added Member To Class: ClassName=Steps Member=Component P1 PWR diff --git a/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-22-54.LOG b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-22-54.LOG new file mode 100644 index 0000000..d54f779 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-22-54.LOG @@ -0,0 +1,10 @@ +Added Pin To Net: NetName=VCC Pin=TP1-1 +Added Pin To Net: NetName=GND Pin=TP2-1 +Added Pin To Net: NetName=NetR3_2 Pin=TP3-1 +Added Pin To Net: NetName=TX Pin=TP4-1 +Added Pin To Net: NetName=M\C\L\R\ Pin=TP5-1 +Added Pin To Net: NetName=RX Pin=TP6-1 +Added Pin To Net: NetName=PGD Pin=TP7-1 +Added Pin To Net: NetName=PGC Pin=TP8-1 +Added Pin To Net: NetName=PGM Pin=TP9-1 +Added Member To Class: ClassName=Steps Member=Component P1 PWR diff --git a/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 11-47-37.LOG b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 11-47-37.LOG new file mode 100644 index 0000000..c93373f --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 11-47-37.LOG @@ -0,0 +1 @@ +Change Component Footprint: Designator=P1 Old Footprint=HDR1X2 New Footprint=RT01502HDWC diff --git a/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 08-59-04.LOG b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 08-59-04.LOG new file mode 100644 index 0000000..5c94d4e --- /dev/null +++ b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 08-59-04.LOG @@ -0,0 +1,9 @@ +Change Component Designator: Old Designator=TP? New Designator=TP1 +Change Component Designator: Old Designator=TP? New Designator=TP2 +Change Component Designator: Old Designator=TP? New Designator=TP3 +Change Component Designator: Old Designator=TP? New Designator=TP4 +Change Component Designator: Old Designator=TP? New Designator=TP5 +Change Component Designator: Old Designator=TP? New Designator=TP6 +Change Component Designator: Old Designator=TP? New Designator=TP7 +Change Component Designator: Old Designator=TP? New Designator=TP8 +Change Component Designator: Old Designator=TP? New Designator=TP9 diff --git a/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-10-29.LOG b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-10-29.LOG new file mode 100644 index 0000000..5c94d4e --- /dev/null +++ b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-10-29.LOG @@ -0,0 +1,9 @@ +Change Component Designator: Old Designator=TP? New Designator=TP1 +Change Component Designator: Old Designator=TP? New Designator=TP2 +Change Component Designator: Old Designator=TP? New Designator=TP3 +Change Component Designator: Old Designator=TP? New Designator=TP4 +Change Component Designator: Old Designator=TP? New Designator=TP5 +Change Component Designator: Old Designator=TP? New Designator=TP6 +Change Component Designator: Old Designator=TP? New Designator=TP7 +Change Component Designator: Old Designator=TP? New Designator=TP8 +Change Component Designator: Old Designator=TP? New Designator=TP9 diff --git a/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-20-08.LOG b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-20-08.LOG new file mode 100644 index 0000000..5838463 --- /dev/null +++ b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-20-08.LOG @@ -0,0 +1,21 @@ +Replace Part C1 Cap2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Cap2 from Miscellaneous Devices.IntLib +Replace Part D1 LED1 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with LED1 from Miscellaneous Devices.IntLib +Replace Part J1 95001-2661 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with 95001-2661 from Molex Modular Jack Right Angle.IntLib +Replace Part P1 Header 2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Header 2 from Miscellaneous Connectors.IntLib +Replace Part P2 Header 16 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Header 16 from Miscellaneous Connectors.IntLib +Replace Part P3 Header 4 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Header 4 from Miscellaneous Connectors.IntLib +Replace Part R1 Res2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Res2 from Miscellaneous Devices.IntLib +Replace Part R2 Res2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Res2 from Miscellaneous Devices.IntLib +Replace Part R3 Res2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Res2 from Miscellaneous Devices.IntLib +Replace Part S1 SW-SPDT in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with SW-SPDT from Miscellaneous Devices.IntLib +Replace Part TP1 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP2 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP3 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP4 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP5 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP6 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP7 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP8 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP9 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part U1 PIC18F44K20-I/P in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with PIC18F44K20-I/P from Microchip Microcontroller 8-Bit PIC18.IntLib +Replace Part U2 SN74F125N in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with SN74F125N from TI Logic Buffer Line Driver.IntLib diff --git a/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-21-22.LOG b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-21-22.LOG new file mode 100644 index 0000000..4bc089f --- /dev/null +++ b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-21-22.LOG @@ -0,0 +1,9 @@ +Replace Part TP1 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP2 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP3 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP4 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP5 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP6 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP7 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP8 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP9 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib diff --git a/hw/Project Outputs for Steps/Design Rule Check - Steps.drc b/hw/Project Outputs for Steps/Design Rule Check - Steps.drc new file mode 100644 index 0000000..ccf2b9a --- /dev/null +++ b/hw/Project Outputs for Steps/Design Rule Check - Steps.drc @@ -0,0 +1,286 @@ +Protel Design System Design Rule Check +PCB File : Z:\SAMB_4\projects\xilofono\hw\Steps.PcbDoc +Date : 02.02.2018 +Time : 12:09:52 + +Processing Rule : Clearance Constraint (Gap=0.254mm) (All),(All) + Violation between Clearance Constraint: (Collision < 0.254mm) Between Track (374.65mm,24.13mm)(377.19mm,26.67mm) on Bottom Layer And Pad J1-1(374.65mm,24.13mm) on Multi-Layer + Violation between Clearance Constraint: (Collision < 0.254mm) Between Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer And Pad TP5-1(377.19mm,29.21mm) on Multi-Layer + Violation between Clearance Constraint: (Collision < 0.254mm) Between Track (377.19mm,29.21mm)(378.968mm,30.988mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer + Violation between Clearance Constraint: (Collision < 0.254mm) Between Track (364.49mm,41.91mm)(377.19mm,29.21mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer +Rule Violations :4 + +Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All) + Violation between Short-Circuit Constraint: Between Track (374.65mm,24.13mm)(377.19mm,26.67mm) on Bottom Layer And Pad J1-1(374.65mm,24.13mm) on Multi-Layer Location : [X = 374.96mm][Y = 24.44mm] + Violation between Short-Circuit Constraint: Between Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer And Pad TP5-1(377.19mm,29.21mm) on Multi-Layer Location : [X = 377.19mm][Y = 28.9mm] + Violation between Short-Circuit Constraint: Between Track (377.19mm,29.21mm)(378.968mm,30.988mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer Location : [X = 377.19mm][Y = 29.21mm] + Violation between Short-Circuit Constraint: Between Track (364.49mm,41.91mm)(377.19mm,29.21mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer Location : [X = 377.19mm][Y = 29.21mm] +Rule Violations :4 + +Processing Rule : Un-Routed Net Constraint ( (All) ) + Violation between Un-Routed Net Constraint: Net NetR5_1 Between Pad R5-1(201.422mm,34.544mm) on Multi-Layer And Pad TP10-1(307.34mm,33.02mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net NetP4_4 Between Pad P4-4(231.826mm,31.953mm) on Multi-Layer And Track (439.344mm,25.349mm)(439.42mm,25.425mm) on Top Layer + Violation between Un-Routed Net Constraint: Net PZ23 Between Pad P2-8(323.85mm,21.59mm) on Multi-Layer And Pad U1-9(344.17mm,44.45mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net PZ22 Between Pad P2-7(323.85mm,19.05mm) on Multi-Layer And Pad U1-8(346.71mm,44.45mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net PZ17 Between Pad P2-2(316.23mm,21.59mm) on Multi-Layer And Pad U1-20(316.23mm,44.45mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net VCC Between Pad R4-2(231.902mm,45.974mm) on Multi-Layer And Pad D1_PZ1-2(245.86mm,54.61mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad P2-11(328.93mm,19.05mm) on Multi-Layer And Pad P2-12(328.93mm,21.59mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad P2-11(328.93mm,19.05mm) on Multi-Layer And Pad P2-13(331.47mm,19.05mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ4-1(280.67mm,72.39mm) on Multi-Layer And Pad Y1_PZ4-2(280.67mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ7-1(322.58mm,72.39mm) on Multi-Layer And Pad Y1_PZ7-2(322.58mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ1-1(238.76mm,72.39mm) on Multi-Layer And Pad Y1_PZ1-2(238.76mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ3-1(266.7mm,72.39mm) on Multi-Layer And Pad Y1_PZ3-2(266.7mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ5-1(294.64mm,72.39mm) on Multi-Layer And Pad Y1_PZ5-2(294.64mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ2-1(252.73mm,72.39mm) on Multi-Layer And Pad Y1_PZ2-2(252.73mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ12-1(392.43mm,72.39mm) on Multi-Layer And Pad Y1_PZ12-2(392.43mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ10-1(364.49mm,72.39mm) on Multi-Layer And Pad Y1_PZ10-2(364.49mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ9-1(350.52mm,72.39mm) on Multi-Layer And Pad Y1_PZ9-2(350.52mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ6-1(308.61mm,72.39mm) on Multi-Layer And Pad Y1_PZ6-2(308.61mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ8-1(336.55mm,72.39mm) on Multi-Layer And Pad Y1_PZ8-2(336.55mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ15-1(434.34mm,72.39mm) on Multi-Layer And Pad Y1_PZ15-2(434.34mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ13-1(406.4mm,72.39mm) on Multi-Layer And Pad Y1_PZ13-2(406.4mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ14-1(420.37mm,72.39mm) on Multi-Layer And Pad Y1_PZ14-2(420.37mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ11-1(378.46mm,72.39mm) on Multi-Layer And Pad Y1_PZ11-2(378.46mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D1-2(400.05mm,17.78mm) on Multi-Layer And Pad S1-3(405.13mm,20.32mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad C1-2(339.09mm,24.13mm) on Multi-Layer And Pad U1-31(341.63mm,29.21mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad P1-2(417.75mm,13.97mm) on Multi-Layer And Pad TP2-1(419.1mm,20.32mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad C1-2(339.09mm,24.13mm) on Multi-Layer And Pad U2-7(349.25mm,24.13mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ4-1(280.67mm,60.325mm) on Multi-Layer And Pad R2_PZ4-1(280.67mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ7-1(322.58mm,60.325mm) on Multi-Layer And Pad R2_PZ7-1(322.58mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ6-1(308.61mm,60.325mm) on Multi-Layer And Pad R2_PZ6-1(308.61mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ5-1(294.64mm,60.325mm) on Multi-Layer And Pad R2_PZ5-1(294.64mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ3-1(266.7mm,60.325mm) on Multi-Layer And Pad R2_PZ3-1(266.7mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ1-1(238.76mm,60.325mm) on Multi-Layer And Pad R2_PZ1-1(238.76mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ15-1(434.34mm,60.325mm) on Multi-Layer And Pad R2_PZ15-1(434.34mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ2-1(252.73mm,60.325mm) on Multi-Layer And Pad R2_PZ2-1(252.73mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer And Pad R2_PZ8-1(336.55mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ12-1(392.43mm,60.325mm) on Multi-Layer And Pad R2_PZ12-1(392.43mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ14-1(420.37mm,60.325mm) on Multi-Layer And Pad R2_PZ14-1(420.37mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ9-1(350.52mm,60.325mm) on Multi-Layer And Pad R2_PZ9-1(350.52mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ10-1(364.49mm,60.325mm) on Multi-Layer And Pad R2_PZ10-1(364.49mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ13-1(406.4mm,60.325mm) on Multi-Layer And Pad R2_PZ13-1(406.4mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ11-1(378.46mm,60.325mm) on Multi-Layer And Pad R2_PZ11-1(378.46mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad P4-2(226.822mm,29.464mm) on Multi-Layer And Pad P4-7(229.324mm,19.456mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad J1-3(377.19mm,24.13mm) on Multi-Layer And Pad R2-1(391.16mm,24.13mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad U1-12(336.55mm,44.45mm) on Multi-Layer And Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad P3-4(306.07mm,19.05mm) on Multi-Layer And Pad P2-11(328.93mm,19.05mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad P2-13(331.47mm,19.05mm) on Multi-Layer And Pad C1-2(339.09mm,24.13mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ10-1(364.49mm,60.325mm) on Multi-Layer And Pad D2_PZ11-1(378.46mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ12-1(392.43mm,60.325mm) on Multi-Layer And Pad D2_PZ13-1(406.4mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer And Pad D2_PZ9-1(350.52mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ13-1(406.4mm,60.325mm) on Multi-Layer And Pad D2_PZ14-1(420.37mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad S1-3(405.13mm,20.32mm) on Multi-Layer And Pad TP2-1(419.1mm,20.32mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ2-1(252.73mm,60.325mm) on Multi-Layer And Pad D2_PZ3-1(266.7mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ14-1(420.37mm,60.325mm) on Multi-Layer And Pad D2_PZ15-1(434.34mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ1-1(238.76mm,60.325mm) on Multi-Layer And Pad D2_PZ2-1(252.73mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ4-1(280.67mm,60.325mm) on Multi-Layer And Pad D2_PZ5-1(294.64mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ5-1(294.64mm,60.325mm) on Multi-Layer And Pad D2_PZ6-1(308.61mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ6-1(308.61mm,60.325mm) on Multi-Layer And Pad D2_PZ7-1(322.58mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2-1(391.16mm,24.13mm) on Multi-Layer And Pad D1-2(400.05mm,17.78mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad P4-2(226.822mm,29.464mm) on Multi-Layer And Pad D2_PZ1-1(238.76mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ11-1(378.46mm,60.325mm) on Multi-Layer And Pad D2_PZ12-1(392.43mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ7-1(322.58mm,60.325mm) on Multi-Layer And Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ3-1(266.7mm,60.325mm) on Multi-Layer And Pad D2_PZ4-1(280.67mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad U1-12(336.55mm,44.45mm) on Multi-Layer And Pad U1-31(341.63mm,29.21mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad U2-7(349.25mm,24.13mm) on Multi-Layer And Pad J1-3(377.19mm,24.13mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ9-1(350.52mm,60.325mm) on Multi-Layer And Pad D2_PZ10-1(364.49mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net NetR3_2 Between Pad U2-4(356.87mm,24.13mm) on Multi-Layer And Pad U2-1(364.49mm,24.13mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net M\C\L\R\ Between Pad J1-1(374.65mm,24.13mm) on Multi-Layer And Pad TP5-1(377.19mm,29.21mm) on Multi-Layer +Rule Violations :68 + +Processing Rule : Modified Polygon (Allow modified: No), (Allow shelved: No) +Rule Violations :0 + +Processing Rule : Width Constraint (Min=0.254mm) (Max=1.524mm) (Preferred=0.254mm) (All) +Rule Violations :0 + +Processing Rule : Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All) +Rule Violations :0 + +Processing Rule : Hole Size Constraint (Min=0.025mm) (Max=10mm) (All) +Rule Violations :0 + +Processing Rule : Hole To Hole Clearance (Gap=0.254mm) (All),(All) +Rule Violations :0 + +Processing Rule : Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All) +Rule Violations :0 + +Processing Rule : Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All) + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,32.512mm)(236.982mm,32.512mm) on Top Overlay And Pad P4-4(231.826mm,31.953mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,32.512mm)(236.982mm,32.512mm) on Top Overlay And Pad P4-5(221.818mm,31.953mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,29.464mm)(236.982mm,29.464mm) on Top Overlay And Pad P4-1(234.328mm,29.464mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,29.464mm)(236.982mm,29.464mm) on Top Overlay And Pad P4-3(219.316mm,29.464mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,29.464mm)(236.982mm,29.464mm) on Top Overlay And Pad P4-2(226.822mm,29.464mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (231.902mm,36.83mm)(231.902mm,37.846mm) on Top Overlay And Pad R4-1(231.902mm,35.814mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (231.902mm,43.942mm)(231.902mm,44.958mm) on Top Overlay And Pad R4-2(231.902mm,45.974mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (202.438mm,34.544mm)(203.454mm,34.544mm) on Top Overlay And Pad R5-1(201.422mm,34.544mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (209.55mm,34.544mm)(210.566mm,34.544mm) on Top Overlay And Pad R5-2(211.582mm,34.544mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (442.468mm,72.39mm)(443.484mm,72.39mm) on Top Overlay And Pad R2_PZ15-2(444.5mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (435.356mm,72.39mm)(436.372mm,72.39mm) on Top Overlay And Pad R2_PZ15-1(434.34mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (442.468mm,66.04mm)(443.484mm,66.04mm) on Top Overlay And Pad R1_PZ15-2(444.5mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (435.356mm,66.04mm)(436.372mm,66.04mm) on Top Overlay And Pad R1_PZ15-1(434.34mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (428.498mm,72.39mm)(429.514mm,72.39mm) on Top Overlay And Pad R2_PZ14-2(430.53mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (421.386mm,72.39mm)(422.402mm,72.39mm) on Top Overlay And Pad R2_PZ14-1(420.37mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (428.498mm,66.04mm)(429.514mm,66.04mm) on Top Overlay And Pad R1_PZ14-2(430.53mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (421.386mm,66.04mm)(422.402mm,66.04mm) on Top Overlay And Pad R1_PZ14-1(420.37mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (414.528mm,72.39mm)(415.544mm,72.39mm) on Top Overlay And Pad R2_PZ13-2(416.56mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (407.416mm,72.39mm)(408.432mm,72.39mm) on Top Overlay And Pad R2_PZ13-1(406.4mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (414.528mm,66.04mm)(415.544mm,66.04mm) on Top Overlay And Pad R1_PZ13-2(416.56mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (407.416mm,66.04mm)(408.432mm,66.04mm) on Top Overlay And Pad R1_PZ13-1(406.4mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (400.558mm,72.39mm)(401.574mm,72.39mm) on Top Overlay And Pad R2_PZ12-2(402.59mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (393.446mm,72.39mm)(394.462mm,72.39mm) on Top Overlay And Pad R2_PZ12-1(392.43mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (400.558mm,66.04mm)(401.574mm,66.04mm) on Top Overlay And Pad R1_PZ12-2(402.59mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (393.446mm,66.04mm)(394.462mm,66.04mm) on Top Overlay And Pad R1_PZ12-1(392.43mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (386.588mm,72.39mm)(387.604mm,72.39mm) on Top Overlay And Pad R2_PZ11-2(388.62mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (379.476mm,72.39mm)(380.492mm,72.39mm) on Top Overlay And Pad R2_PZ11-1(378.46mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (386.588mm,66.04mm)(387.604mm,66.04mm) on Top Overlay And Pad R1_PZ11-2(388.62mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (379.476mm,66.04mm)(380.492mm,66.04mm) on Top Overlay And Pad R1_PZ11-1(378.46mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (302.768mm,72.39mm)(303.784mm,72.39mm) on Top Overlay And Pad R2_PZ5-2(304.8mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (295.656mm,72.39mm)(296.672mm,72.39mm) on Top Overlay And Pad R2_PZ5-1(294.64mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (302.768mm,66.04mm)(303.784mm,66.04mm) on Top Overlay And Pad R1_PZ5-2(304.8mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (295.656mm,66.04mm)(296.672mm,66.04mm) on Top Overlay And Pad R1_PZ5-1(294.64mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (316.738mm,72.39mm)(317.754mm,72.39mm) on Top Overlay And Pad R2_PZ6-2(318.77mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (309.626mm,72.39mm)(310.642mm,72.39mm) on Top Overlay And Pad R2_PZ6-1(308.61mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (316.738mm,66.04mm)(317.754mm,66.04mm) on Top Overlay And Pad R1_PZ6-2(318.77mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (309.626mm,66.04mm)(310.642mm,66.04mm) on Top Overlay And Pad R1_PZ6-1(308.61mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (330.708mm,72.39mm)(331.724mm,72.39mm) on Top Overlay And Pad R2_PZ7-2(332.74mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (323.596mm,72.39mm)(324.612mm,72.39mm) on Top Overlay And Pad R2_PZ7-1(322.58mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (330.708mm,66.04mm)(331.724mm,66.04mm) on Top Overlay And Pad R1_PZ7-2(332.74mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (323.596mm,66.04mm)(324.612mm,66.04mm) on Top Overlay And Pad R1_PZ7-1(322.58mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (344.678mm,72.39mm)(345.694mm,72.39mm) on Top Overlay And Pad R2_PZ8-2(346.71mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (337.566mm,72.39mm)(338.582mm,72.39mm) on Top Overlay And Pad R2_PZ8-1(336.55mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (344.678mm,66.04mm)(345.694mm,66.04mm) on Top Overlay And Pad R1_PZ8-2(346.71mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (337.566mm,66.04mm)(338.582mm,66.04mm) on Top Overlay And Pad R1_PZ8-1(336.55mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (358.648mm,72.39mm)(359.664mm,72.39mm) on Top Overlay And Pad R2_PZ9-2(360.68mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (351.536mm,72.39mm)(352.552mm,72.39mm) on Top Overlay And Pad R2_PZ9-1(350.52mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (358.648mm,66.04mm)(359.664mm,66.04mm) on Top Overlay And Pad R1_PZ9-2(360.68mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (351.536mm,66.04mm)(352.552mm,66.04mm) on Top Overlay And Pad R1_PZ9-1(350.52mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (246.888mm,72.39mm)(247.904mm,72.39mm) on Top Overlay And Pad R2_PZ1-2(248.92mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (239.776mm,72.39mm)(240.792mm,72.39mm) on Top Overlay And Pad R2_PZ1-1(238.76mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (246.888mm,66.04mm)(247.904mm,66.04mm) on Top Overlay And Pad R1_PZ1-2(248.92mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (239.776mm,66.04mm)(240.792mm,66.04mm) on Top Overlay And Pad R1_PZ1-1(238.76mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (260.858mm,72.39mm)(261.874mm,72.39mm) on Top Overlay And Pad R2_PZ2-2(262.89mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (253.746mm,72.39mm)(254.762mm,72.39mm) on Top Overlay And Pad R2_PZ2-1(252.73mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (260.858mm,66.04mm)(261.874mm,66.04mm) on Top Overlay And Pad R1_PZ2-2(262.89mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (253.746mm,66.04mm)(254.762mm,66.04mm) on Top Overlay And Pad R1_PZ2-1(252.73mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (274.828mm,72.39mm)(275.844mm,72.39mm) on Top Overlay And Pad R2_PZ3-2(276.86mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (267.716mm,72.39mm)(268.732mm,72.39mm) on Top Overlay And Pad R2_PZ3-1(266.7mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (274.828mm,66.04mm)(275.844mm,66.04mm) on Top Overlay And Pad R1_PZ3-2(276.86mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (267.716mm,66.04mm)(268.732mm,66.04mm) on Top Overlay And Pad R1_PZ3-1(266.7mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (288.798mm,72.39mm)(289.814mm,72.39mm) on Top Overlay And Pad R2_PZ4-2(290.83mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (281.686mm,72.39mm)(282.702mm,72.39mm) on Top Overlay And Pad R2_PZ4-1(280.67mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (288.798mm,66.04mm)(289.814mm,66.04mm) on Top Overlay And Pad R1_PZ4-2(290.83mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (281.686mm,66.04mm)(282.702mm,66.04mm) on Top Overlay And Pad R1_PZ4-1(280.67mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (372.618mm,72.39mm)(373.634mm,72.39mm) on Top Overlay And Pad R2_PZ10-2(374.65mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (365.506mm,72.39mm)(366.522mm,72.39mm) on Top Overlay And Pad R2_PZ10-1(364.49mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (372.618mm,66.04mm)(373.634mm,66.04mm) on Top Overlay And Pad R1_PZ10-2(374.65mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (365.506mm,66.04mm)(366.522mm,66.04mm) on Top Overlay And Pad R1_PZ10-1(364.49mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (394.97mm,22.098mm)(394.97mm,23.114mm) on Top Overlay And Pad R3-1(394.97mm,24.13mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (394.97mm,14.986mm)(394.97mm,16.002mm) on Top Overlay And Pad R3-2(394.97mm,13.97mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (391.16mm,22.098mm)(391.16mm,23.114mm) on Top Overlay And Pad R2-1(391.16mm,24.13mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (391.16mm,14.986mm)(391.16mm,16.002mm) on Top Overlay And Pad R2-2(391.16mm,13.97mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (387.35mm,22.098mm)(387.35mm,23.114mm) on Top Overlay And Pad R1-1(387.35mm,24.13mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (387.35mm,14.986mm)(387.35mm,16.002mm) on Top Overlay And Pad R1-2(387.35mm,13.97mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] +Rule Violations :75 + +Processing Rule : Silk to Silk (Clearance=0.254mm) (All),(All) + Violation between Silk To Silk Clearance Constraint: (0.052mm < 0.254mm) Between Text "15" (335.534mm,18.542mm) on Top Overlay And Track (335.28mm,17.78mm)(335.28mm,22.86mm) on Top Overlay Silk Text to Silk Clearance [0.052mm] + Violation between Silk To Silk Clearance Constraint: (0.052mm < 0.254mm) Between Text "16" (335.534mm,21.082mm) on Top Overlay And Track (335.28mm,17.78mm)(335.28mm,22.86mm) on Top Overlay Silk Text to Silk Clearance [0.052mm] + Violation between Silk To Silk Clearance Constraint: (0.222mm < 0.254mm) Between Text "2" (313.69mm,21.082mm) on Top Overlay And Track (314.96mm,17.78mm)(314.96mm,22.86mm) on Top Overlay Silk Text to Silk Clearance [0.222mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ15" (434.975mm,80.645mm) on Top Overlay And Track (438.15mm,77.47mm)(438.15mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ15" (434.975mm,80.645mm) on Top Overlay And Track (433.07mm,80.01mm)(438.15mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ14" (421.005mm,80.645mm) on Top Overlay And Track (424.18mm,77.47mm)(424.18mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ14" (421.005mm,80.645mm) on Top Overlay And Track (419.1mm,80.01mm)(424.18mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ13" (407.035mm,80.645mm) on Top Overlay And Track (410.21mm,77.47mm)(410.21mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ13" (407.035mm,80.645mm) on Top Overlay And Track (405.13mm,80.01mm)(410.21mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ12" (393.065mm,80.645mm) on Top Overlay And Track (396.24mm,77.47mm)(396.24mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ12" (393.065mm,80.645mm) on Top Overlay And Track (391.16mm,80.01mm)(396.24mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ11" (379.095mm,80.645mm) on Top Overlay And Track (382.27mm,77.47mm)(382.27mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ11" (379.095mm,80.645mm) on Top Overlay And Track (377.19mm,80.01mm)(382.27mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ5" (295.275mm,80.645mm) on Top Overlay And Track (298.45mm,77.47mm)(298.45mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ5" (295.275mm,80.645mm) on Top Overlay And Track (293.37mm,80.01mm)(298.45mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ6" (309.245mm,80.645mm) on Top Overlay And Track (312.42mm,77.47mm)(312.42mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ6" (309.245mm,80.645mm) on Top Overlay And Track (307.34mm,80.01mm)(312.42mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ7" (323.215mm,80.645mm) on Top Overlay And Track (326.39mm,77.47mm)(326.39mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ7" (323.215mm,80.645mm) on Top Overlay And Track (321.31mm,80.01mm)(326.39mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ8" (337.185mm,80.645mm) on Top Overlay And Track (340.36mm,77.47mm)(340.36mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ8" (337.185mm,80.645mm) on Top Overlay And Track (335.28mm,80.01mm)(340.36mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ9" (351.155mm,80.645mm) on Top Overlay And Track (354.33mm,77.47mm)(354.33mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ9" (351.155mm,80.645mm) on Top Overlay And Track (349.25mm,80.01mm)(354.33mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ1" (239.395mm,80.645mm) on Top Overlay And Track (242.57mm,77.47mm)(242.57mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ1" (239.395mm,80.645mm) on Top Overlay And Track (237.49mm,80.01mm)(242.57mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ2" (253.365mm,80.645mm) on Top Overlay And Track (256.54mm,77.47mm)(256.54mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ2" (253.365mm,80.645mm) on Top Overlay And Track (251.46mm,80.01mm)(256.54mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ3" (267.335mm,80.645mm) on Top Overlay And Track (270.51mm,77.47mm)(270.51mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ3" (267.335mm,80.645mm) on Top Overlay And Track (265.43mm,80.01mm)(270.51mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ4" (281.305mm,80.645mm) on Top Overlay And Track (284.48mm,77.47mm)(284.48mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ4" (281.305mm,80.645mm) on Top Overlay And Track (279.4mm,80.01mm)(284.48mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ10" (365.125mm,80.645mm) on Top Overlay And Track (368.3mm,77.47mm)(368.3mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ10" (365.125mm,80.645mm) on Top Overlay And Track (363.22mm,80.01mm)(368.3mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.189mm < 0.254mm) Between Text "+" (399.473mm,22.72mm) on Top Overlay And Track (398.78mm,21.59mm)(401.32mm,21.59mm) on Top Overlay Silk Text to Silk Clearance [0.189mm] +Rule Violations :34 + +Processing Rule : Net Antennae (Tolerance=0mm) (All) + Violation between Net Antennae: Track (439.344mm,25.349mm)(439.42mm,25.425mm) on Top Layer + Violation between Net Antennae: Track (439.344mm,25.349mm)(439.42mm,25.425mm) on Top Layer +Rule Violations :2 + +Processing Rule : Room PZ9 (Bounding Region = (348.234mm, 52.07mm, 361.95mm, 82.55mm) (InComponentClass('PZ9')) +Rule Violations :0 + +Processing Rule : Room PZ10 (Bounding Region = (362.204mm, 52.07mm, 375.92mm, 82.55mm) (InComponentClass('PZ10')) +Rule Violations :0 + +Processing Rule : Room PZ8 (Bounding Region = (334.264mm, 52.07mm, 347.98mm, 82.55mm) (InComponentClass('PZ8')) +Rule Violations :0 + +Processing Rule : Room PZ7 (Bounding Region = (320.294mm, 52.07mm, 334.01mm, 82.55mm) (InComponentClass('PZ7')) +Rule Violations :0 + +Processing Rule : Room PZ11 (Bounding Region = (376.174mm, 52.07mm, 389.89mm, 82.55mm) (InComponentClass('PZ11')) +Rule Violations :0 + +Processing Rule : Room PZ13 (Bounding Region = (404.114mm, 52.07mm, 417.83mm, 82.55mm) (InComponentClass('PZ13')) +Rule Violations :0 + +Processing Rule : Room PZ14 (Bounding Region = (418.084mm, 52.07mm, 431.8mm, 82.55mm) (InComponentClass('PZ14')) +Rule Violations :0 + +Processing Rule : Room PZ12 (Bounding Region = (390.144mm, 52.07mm, 403.86mm, 82.55mm) (InComponentClass('PZ12')) +Rule Violations :0 + +Processing Rule : Room PZ15 (Bounding Region = (432.054mm, 52.07mm, 445.77mm, 82.55mm) (InComponentClass('PZ15')) +Rule Violations :0 + +Processing Rule : Room PZ2 (Bounding Region = (250.444mm, 52.07mm, 264.16mm, 82.55mm) (InComponentClass('PZ2')) +Rule Violations :0 + +Processing Rule : Room PZ1 (Bounding Region = (236.474mm, 52.07mm, 250.19mm, 82.55mm) (InComponentClass('PZ1')) +Rule Violations :0 + +Processing Rule : Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps')) + Violation between Room Definition: Between Small Component R5-Res2 (206.502mm,34.544mm) on Top Layer And Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps')) + Violation between Room Definition: Between Small Component R4-Res2 (231.902mm,40.894mm) on Top Layer And Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps')) + Violation between Room Definition: Between Component P4-57PC5FS (226.822mm,24.46mm) on Top Layer And Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps')) +Rule Violations :3 + +Processing Rule : Room PZ3 (Bounding Region = (264.414mm, 52.07mm, 278.13mm, 82.55mm) (InComponentClass('PZ3')) +Rule Violations :0 + +Processing Rule : Room PZ6 (Bounding Region = (306.324mm, 52.07mm, 320.04mm, 82.55mm) (InComponentClass('PZ6')) +Rule Violations :0 + +Processing Rule : Room PZ5 (Bounding Region = (292.354mm, 52.07mm, 306.07mm, 82.55mm) (InComponentClass('PZ5')) +Rule Violations :0 + +Processing Rule : Room PZ4 (Bounding Region = (278.384mm, 52.07mm, 292.1mm, 82.55mm) (InComponentClass('PZ4')) +Rule Violations :0 + +Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All) +Rule Violations :0 + + +Violations Detected : 190 +Waived Violations : 0 +Time Elapsed : 00:00:02 \ No newline at end of file diff --git a/hw/Project Outputs for Steps/Design Rule Check - Steps.html b/hw/Project Outputs for Steps/Design Rule Check - Steps.html new file mode 100644 index 0000000..b024cae --- /dev/null +++ b/hw/Project Outputs for Steps/Design Rule Check - Steps.html @@ -0,0 +1,986 @@ + + + +Design Rule Verification Report + +Altium

Design Rule Verification Report

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Date:02.02.2018
Time:12:09:52
Elapsed Time:00:00:02
Filename:Z:\SAMB_4\projects\xilofono\hw\Steps.PcbDoc
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Warnings:0
Rule Violations:190
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Summary

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WarningsCount
Total0

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Rule ViolationsCount
Clearance Constraint (Gap=0.254mm) (All),(All)4
Short-Circuit Constraint (Allowed=No) (All),(All)4
Un-Routed Net Constraint ( (All) )68
Modified Polygon (Allow modified: No), (Allow shelved: No)0
Width Constraint (Min=0.254mm) (Max=1.524mm) (Preferred=0.254mm) (All)0
Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)0
Hole Size Constraint (Min=0.025mm) (Max=10mm) (All)0
Hole To Hole Clearance (Gap=0.254mm) (All),(All)0
Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)0
Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)75
Silk to Silk (Clearance=0.254mm) (All),(All)34
Net Antennae (Tolerance=0mm) (All)2
Room PZ9 (Bounding Region = (348.234mm, 52.07mm, 361.95mm, 82.55mm) (InComponentClass('PZ9'))0
Room PZ10 (Bounding Region = (362.204mm, 52.07mm, 375.92mm, 82.55mm) (InComponentClass('PZ10'))0
Room PZ8 (Bounding Region = (334.264mm, 52.07mm, 347.98mm, 82.55mm) (InComponentClass('PZ8'))0
Room PZ7 (Bounding Region = (320.294mm, 52.07mm, 334.01mm, 82.55mm) (InComponentClass('PZ7'))0
Room PZ11 (Bounding Region = (376.174mm, 52.07mm, 389.89mm, 82.55mm) (InComponentClass('PZ11'))0
Room PZ13 (Bounding Region = (404.114mm, 52.07mm, 417.83mm, 82.55mm) (InComponentClass('PZ13'))0
Room PZ14 (Bounding Region = (418.084mm, 52.07mm, 431.8mm, 82.55mm) (InComponentClass('PZ14'))0
Room PZ12 (Bounding Region = (390.144mm, 52.07mm, 403.86mm, 82.55mm) (InComponentClass('PZ12'))0
Room PZ15 (Bounding Region = (432.054mm, 52.07mm, 445.77mm, 82.55mm) (InComponentClass('PZ15'))0
Room PZ2 (Bounding Region = (250.444mm, 52.07mm, 264.16mm, 82.55mm) (InComponentClass('PZ2'))0
Room PZ1 (Bounding Region = (236.474mm, 52.07mm, 250.19mm, 82.55mm) (InComponentClass('PZ1'))0
Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps'))3
Room PZ3 (Bounding Region = (264.414mm, 52.07mm, 278.13mm, 82.55mm) (InComponentClass('PZ3'))0
Room PZ6 (Bounding Region = (306.324mm, 52.07mm, 320.04mm, 82.55mm) (InComponentClass('PZ6'))0
Room PZ5 (Bounding Region = (292.354mm, 52.07mm, 306.07mm, 82.55mm) (InComponentClass('PZ5'))0
Room PZ4 (Bounding Region = (278.384mm, 52.07mm, 292.1mm, 82.55mm) (InComponentClass('PZ4'))0
Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)0
Total190

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Clearance Constraint (Gap=0.254mm) (All),(All)
Clearance Constraint: (Collision < 0.254mm) Between Track (374.65mm,24.13mm)(377.19mm,26.67mm) on Bottom Layer And Pad J1-1(374.65mm,24.13mm) on Multi-Layer
Clearance Constraint: (Collision < 0.254mm) Between Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer And Pad TP5-1(377.19mm,29.21mm) on Multi-Layer
Clearance Constraint: (Collision < 0.254mm) Between Track (377.19mm,29.21mm)(378.968mm,30.988mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer
Clearance Constraint: (Collision < 0.254mm) Between Track (364.49mm,41.91mm)(377.19mm,29.21mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer
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Short-Circuit Constraint (Allowed=No) (All),(All)
Short-Circuit Constraint: Between Track (374.65mm,24.13mm)(377.19mm,26.67mm) on Bottom Layer And Pad J1-1(374.65mm,24.13mm) on Multi-Layer Location : [X = 374.96mm][Y = 24.44mm]
Short-Circuit Constraint: Between Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer And Pad TP5-1(377.19mm,29.21mm) on Multi-Layer Location : [X = 377.19mm][Y = 28.9mm]
Short-Circuit Constraint: Between Track (377.19mm,29.21mm)(378.968mm,30.988mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer Location : [X = 377.19mm][Y = 29.21mm]
Short-Circuit Constraint: Between Track (364.49mm,41.91mm)(377.19mm,29.21mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer Location : [X = 377.19mm][Y = 29.21mm]
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Un-Routed Net Constraint ( (All) )
Un-Routed Net Constraint: Net NetR5_1 Between Pad R5-1(201.422mm,34.544mm) on Multi-Layer And Pad TP10-1(307.34mm,33.02mm) on Multi-Layer
Un-Routed Net Constraint: Net NetP4_4 Between Pad P4-4(231.826mm,31.953mm) on Multi-Layer And Track (439.344mm,25.349mm)(439.42mm,25.425mm) on Top Layer
Un-Routed Net Constraint: Net PZ23 Between Pad P2-8(323.85mm,21.59mm) on Multi-Layer And Pad U1-9(344.17mm,44.45mm) on Multi-Layer
Un-Routed Net Constraint: Net PZ22 Between Pad P2-7(323.85mm,19.05mm) on Multi-Layer And Pad U1-8(346.71mm,44.45mm) on Multi-Layer
Un-Routed Net Constraint: Net PZ17 Between Pad P2-2(316.23mm,21.59mm) on Multi-Layer And Pad U1-20(316.23mm,44.45mm) on Multi-Layer
Un-Routed Net Constraint: Net VCC Between Pad R4-2(231.902mm,45.974mm) on Multi-Layer And Pad D1_PZ1-2(245.86mm,54.61mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad P2-11(328.93mm,19.05mm) on Multi-Layer And Pad P2-12(328.93mm,21.59mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad P2-11(328.93mm,19.05mm) on Multi-Layer And Pad P2-13(331.47mm,19.05mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ4-1(280.67mm,72.39mm) on Multi-Layer And Pad Y1_PZ4-2(280.67mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ7-1(322.58mm,72.39mm) on Multi-Layer And Pad Y1_PZ7-2(322.58mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ1-1(238.76mm,72.39mm) on Multi-Layer And Pad Y1_PZ1-2(238.76mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ3-1(266.7mm,72.39mm) on Multi-Layer And Pad Y1_PZ3-2(266.7mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ5-1(294.64mm,72.39mm) on Multi-Layer And Pad Y1_PZ5-2(294.64mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ2-1(252.73mm,72.39mm) on Multi-Layer And Pad Y1_PZ2-2(252.73mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ12-1(392.43mm,72.39mm) on Multi-Layer And Pad Y1_PZ12-2(392.43mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ10-1(364.49mm,72.39mm) on Multi-Layer And Pad Y1_PZ10-2(364.49mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ9-1(350.52mm,72.39mm) on Multi-Layer And Pad Y1_PZ9-2(350.52mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ6-1(308.61mm,72.39mm) on Multi-Layer And Pad Y1_PZ6-2(308.61mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ8-1(336.55mm,72.39mm) on Multi-Layer And Pad Y1_PZ8-2(336.55mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ15-1(434.34mm,72.39mm) on Multi-Layer And Pad Y1_PZ15-2(434.34mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ13-1(406.4mm,72.39mm) on Multi-Layer And Pad Y1_PZ13-2(406.4mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ14-1(420.37mm,72.39mm) on Multi-Layer And Pad Y1_PZ14-2(420.37mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ11-1(378.46mm,72.39mm) on Multi-Layer And Pad Y1_PZ11-2(378.46mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D1-2(400.05mm,17.78mm) on Multi-Layer And Pad S1-3(405.13mm,20.32mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad C1-2(339.09mm,24.13mm) on Multi-Layer And Pad U1-31(341.63mm,29.21mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad P1-2(417.75mm,13.97mm) on Multi-Layer And Pad TP2-1(419.1mm,20.32mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad C1-2(339.09mm,24.13mm) on Multi-Layer And Pad U2-7(349.25mm,24.13mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ4-1(280.67mm,60.325mm) on Multi-Layer And Pad R2_PZ4-1(280.67mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ7-1(322.58mm,60.325mm) on Multi-Layer And Pad R2_PZ7-1(322.58mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ6-1(308.61mm,60.325mm) on Multi-Layer And Pad R2_PZ6-1(308.61mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ5-1(294.64mm,60.325mm) on Multi-Layer And Pad R2_PZ5-1(294.64mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ3-1(266.7mm,60.325mm) on Multi-Layer And Pad R2_PZ3-1(266.7mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ1-1(238.76mm,60.325mm) on Multi-Layer And Pad R2_PZ1-1(238.76mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ15-1(434.34mm,60.325mm) on Multi-Layer And Pad R2_PZ15-1(434.34mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ2-1(252.73mm,60.325mm) on Multi-Layer And Pad R2_PZ2-1(252.73mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer And Pad R2_PZ8-1(336.55mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ12-1(392.43mm,60.325mm) on Multi-Layer And Pad R2_PZ12-1(392.43mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ14-1(420.37mm,60.325mm) on Multi-Layer And Pad R2_PZ14-1(420.37mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ9-1(350.52mm,60.325mm) on Multi-Layer And Pad R2_PZ9-1(350.52mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ10-1(364.49mm,60.325mm) on Multi-Layer And Pad R2_PZ10-1(364.49mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ13-1(406.4mm,60.325mm) on Multi-Layer And Pad R2_PZ13-1(406.4mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ11-1(378.46mm,60.325mm) on Multi-Layer And Pad R2_PZ11-1(378.46mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad P4-2(226.822mm,29.464mm) on Multi-Layer And Pad P4-7(229.324mm,19.456mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad J1-3(377.19mm,24.13mm) on Multi-Layer And Pad R2-1(391.16mm,24.13mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad U1-12(336.55mm,44.45mm) on Multi-Layer And Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad P3-4(306.07mm,19.05mm) on Multi-Layer And Pad P2-11(328.93mm,19.05mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad P2-13(331.47mm,19.05mm) on Multi-Layer And Pad C1-2(339.09mm,24.13mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ10-1(364.49mm,60.325mm) on Multi-Layer And Pad D2_PZ11-1(378.46mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ12-1(392.43mm,60.325mm) on Multi-Layer And Pad D2_PZ13-1(406.4mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer And Pad D2_PZ9-1(350.52mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ13-1(406.4mm,60.325mm) on Multi-Layer And Pad D2_PZ14-1(420.37mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad S1-3(405.13mm,20.32mm) on Multi-Layer And Pad TP2-1(419.1mm,20.32mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ2-1(252.73mm,60.325mm) on Multi-Layer And Pad D2_PZ3-1(266.7mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ14-1(420.37mm,60.325mm) on Multi-Layer And Pad D2_PZ15-1(434.34mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ1-1(238.76mm,60.325mm) on Multi-Layer And Pad D2_PZ2-1(252.73mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ4-1(280.67mm,60.325mm) on Multi-Layer And Pad D2_PZ5-1(294.64mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ5-1(294.64mm,60.325mm) on Multi-Layer And Pad D2_PZ6-1(308.61mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ6-1(308.61mm,60.325mm) on Multi-Layer And Pad D2_PZ7-1(322.58mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2-1(391.16mm,24.13mm) on Multi-Layer And Pad D1-2(400.05mm,17.78mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad P4-2(226.822mm,29.464mm) on Multi-Layer And Pad D2_PZ1-1(238.76mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ11-1(378.46mm,60.325mm) on Multi-Layer And Pad D2_PZ12-1(392.43mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ7-1(322.58mm,60.325mm) on Multi-Layer And Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ3-1(266.7mm,60.325mm) on Multi-Layer And Pad D2_PZ4-1(280.67mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad U1-12(336.55mm,44.45mm) on Multi-Layer And Pad U1-31(341.63mm,29.21mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad U2-7(349.25mm,24.13mm) on Multi-Layer And Pad J1-3(377.19mm,24.13mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ9-1(350.52mm,60.325mm) on Multi-Layer And Pad D2_PZ10-1(364.49mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net NetR3_2 Between Pad U2-4(356.87mm,24.13mm) on Multi-Layer And Pad U2-1(364.49mm,24.13mm) on Multi-Layer
Un-Routed Net Constraint: Net M\C\L\R\ Between Pad J1-1(374.65mm,24.13mm) on Multi-Layer And Pad TP5-1(377.19mm,29.21mm) on Multi-Layer
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Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,32.512mm)(236.982mm,32.512mm) on Top Overlay And Pad P4-4(231.826mm,31.953mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,32.512mm)(236.982mm,32.512mm) on Top Overlay And Pad P4-5(221.818mm,31.953mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,29.464mm)(236.982mm,29.464mm) on Top Overlay And Pad P4-1(234.328mm,29.464mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,29.464mm)(236.982mm,29.464mm) on Top Overlay And Pad P4-3(219.316mm,29.464mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,29.464mm)(236.982mm,29.464mm) on Top Overlay And Pad P4-2(226.822mm,29.464mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (231.902mm,36.83mm)(231.902mm,37.846mm) on Top Overlay And Pad R4-1(231.902mm,35.814mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (231.902mm,43.942mm)(231.902mm,44.958mm) on Top Overlay And Pad R4-2(231.902mm,45.974mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (202.438mm,34.544mm)(203.454mm,34.544mm) on Top Overlay And Pad R5-1(201.422mm,34.544mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (209.55mm,34.544mm)(210.566mm,34.544mm) on Top Overlay And Pad R5-2(211.582mm,34.544mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (442.468mm,72.39mm)(443.484mm,72.39mm) on Top Overlay And Pad R2_PZ15-2(444.5mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (435.356mm,72.39mm)(436.372mm,72.39mm) on Top Overlay And Pad R2_PZ15-1(434.34mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (442.468mm,66.04mm)(443.484mm,66.04mm) on Top Overlay And Pad R1_PZ15-2(444.5mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (435.356mm,66.04mm)(436.372mm,66.04mm) on Top Overlay And Pad R1_PZ15-1(434.34mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (428.498mm,72.39mm)(429.514mm,72.39mm) on Top Overlay And Pad R2_PZ14-2(430.53mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (421.386mm,72.39mm)(422.402mm,72.39mm) on Top Overlay And Pad R2_PZ14-1(420.37mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (428.498mm,66.04mm)(429.514mm,66.04mm) on Top Overlay And Pad R1_PZ14-2(430.53mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (421.386mm,66.04mm)(422.402mm,66.04mm) on Top Overlay And Pad R1_PZ14-1(420.37mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (414.528mm,72.39mm)(415.544mm,72.39mm) on Top Overlay And Pad R2_PZ13-2(416.56mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (407.416mm,72.39mm)(408.432mm,72.39mm) on Top Overlay And Pad R2_PZ13-1(406.4mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (414.528mm,66.04mm)(415.544mm,66.04mm) on Top Overlay And Pad R1_PZ13-2(416.56mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (407.416mm,66.04mm)(408.432mm,66.04mm) on Top Overlay And Pad R1_PZ13-1(406.4mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (400.558mm,72.39mm)(401.574mm,72.39mm) on Top Overlay And Pad R2_PZ12-2(402.59mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (393.446mm,72.39mm)(394.462mm,72.39mm) on Top Overlay And Pad R2_PZ12-1(392.43mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (400.558mm,66.04mm)(401.574mm,66.04mm) on Top Overlay And Pad R1_PZ12-2(402.59mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (393.446mm,66.04mm)(394.462mm,66.04mm) on Top Overlay And Pad R1_PZ12-1(392.43mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (386.588mm,72.39mm)(387.604mm,72.39mm) on Top Overlay And Pad R2_PZ11-2(388.62mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (379.476mm,72.39mm)(380.492mm,72.39mm) on Top Overlay And Pad R2_PZ11-1(378.46mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (386.588mm,66.04mm)(387.604mm,66.04mm) on Top Overlay And Pad R1_PZ11-2(388.62mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (379.476mm,66.04mm)(380.492mm,66.04mm) on Top Overlay And Pad R1_PZ11-1(378.46mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (302.768mm,72.39mm)(303.784mm,72.39mm) on Top Overlay And Pad R2_PZ5-2(304.8mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (295.656mm,72.39mm)(296.672mm,72.39mm) on Top Overlay And Pad R2_PZ5-1(294.64mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (302.768mm,66.04mm)(303.784mm,66.04mm) on Top Overlay And Pad R1_PZ5-2(304.8mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (295.656mm,66.04mm)(296.672mm,66.04mm) on Top Overlay And Pad R1_PZ5-1(294.64mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (316.738mm,72.39mm)(317.754mm,72.39mm) on Top Overlay And Pad R2_PZ6-2(318.77mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (309.626mm,72.39mm)(310.642mm,72.39mm) on Top Overlay And Pad R2_PZ6-1(308.61mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (316.738mm,66.04mm)(317.754mm,66.04mm) on Top Overlay And Pad R1_PZ6-2(318.77mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (309.626mm,66.04mm)(310.642mm,66.04mm) on Top Overlay And Pad R1_PZ6-1(308.61mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (330.708mm,72.39mm)(331.724mm,72.39mm) on Top Overlay And Pad R2_PZ7-2(332.74mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (323.596mm,72.39mm)(324.612mm,72.39mm) on Top Overlay And Pad R2_PZ7-1(322.58mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (330.708mm,66.04mm)(331.724mm,66.04mm) on Top Overlay And Pad R1_PZ7-2(332.74mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (323.596mm,66.04mm)(324.612mm,66.04mm) on Top Overlay And Pad R1_PZ7-1(322.58mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (344.678mm,72.39mm)(345.694mm,72.39mm) on Top Overlay And Pad R2_PZ8-2(346.71mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (337.566mm,72.39mm)(338.582mm,72.39mm) on Top Overlay And Pad R2_PZ8-1(336.55mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (344.678mm,66.04mm)(345.694mm,66.04mm) on Top Overlay And Pad R1_PZ8-2(346.71mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (337.566mm,66.04mm)(338.582mm,66.04mm) on Top Overlay And Pad R1_PZ8-1(336.55mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (358.648mm,72.39mm)(359.664mm,72.39mm) on Top Overlay And Pad R2_PZ9-2(360.68mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (351.536mm,72.39mm)(352.552mm,72.39mm) on Top Overlay And Pad R2_PZ9-1(350.52mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (358.648mm,66.04mm)(359.664mm,66.04mm) on Top Overlay And Pad R1_PZ9-2(360.68mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (351.536mm,66.04mm)(352.552mm,66.04mm) on Top Overlay And Pad R1_PZ9-1(350.52mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (246.888mm,72.39mm)(247.904mm,72.39mm) on Top Overlay And Pad R2_PZ1-2(248.92mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (239.776mm,72.39mm)(240.792mm,72.39mm) on Top Overlay And Pad R2_PZ1-1(238.76mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (246.888mm,66.04mm)(247.904mm,66.04mm) on Top Overlay And Pad R1_PZ1-2(248.92mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (239.776mm,66.04mm)(240.792mm,66.04mm) on Top Overlay And Pad R1_PZ1-1(238.76mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (260.858mm,72.39mm)(261.874mm,72.39mm) on Top Overlay And Pad R2_PZ2-2(262.89mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (253.746mm,72.39mm)(254.762mm,72.39mm) on Top Overlay And Pad R2_PZ2-1(252.73mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (260.858mm,66.04mm)(261.874mm,66.04mm) on Top Overlay And Pad R1_PZ2-2(262.89mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (253.746mm,66.04mm)(254.762mm,66.04mm) on Top Overlay And Pad R1_PZ2-1(252.73mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (274.828mm,72.39mm)(275.844mm,72.39mm) on Top Overlay And Pad R2_PZ3-2(276.86mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (267.716mm,72.39mm)(268.732mm,72.39mm) on Top Overlay And Pad R2_PZ3-1(266.7mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (274.828mm,66.04mm)(275.844mm,66.04mm) on Top Overlay And Pad R1_PZ3-2(276.86mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (267.716mm,66.04mm)(268.732mm,66.04mm) on Top Overlay And Pad R1_PZ3-1(266.7mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (288.798mm,72.39mm)(289.814mm,72.39mm) on Top Overlay And Pad R2_PZ4-2(290.83mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (281.686mm,72.39mm)(282.702mm,72.39mm) on Top Overlay And Pad R2_PZ4-1(280.67mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (288.798mm,66.04mm)(289.814mm,66.04mm) on Top Overlay And Pad R1_PZ4-2(290.83mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (281.686mm,66.04mm)(282.702mm,66.04mm) on Top Overlay And Pad R1_PZ4-1(280.67mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (372.618mm,72.39mm)(373.634mm,72.39mm) on Top Overlay And Pad R2_PZ10-2(374.65mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (365.506mm,72.39mm)(366.522mm,72.39mm) on Top Overlay And Pad R2_PZ10-1(364.49mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (372.618mm,66.04mm)(373.634mm,66.04mm) on Top Overlay And Pad R1_PZ10-2(374.65mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (365.506mm,66.04mm)(366.522mm,66.04mm) on Top Overlay And Pad R1_PZ10-1(364.49mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (394.97mm,22.098mm)(394.97mm,23.114mm) on Top Overlay And Pad R3-1(394.97mm,24.13mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (394.97mm,14.986mm)(394.97mm,16.002mm) on Top Overlay And Pad R3-2(394.97mm,13.97mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (391.16mm,22.098mm)(391.16mm,23.114mm) on Top Overlay And Pad R2-1(391.16mm,24.13mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (391.16mm,14.986mm)(391.16mm,16.002mm) on Top Overlay And Pad R2-2(391.16mm,13.97mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (387.35mm,22.098mm)(387.35mm,23.114mm) on Top Overlay And Pad R1-1(387.35mm,24.13mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (387.35mm,14.986mm)(387.35mm,16.002mm) on Top Overlay And Pad R1-2(387.35mm,13.97mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
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Silk to Silk (Clearance=0.254mm) (All),(All)
Silk To Silk Clearance Constraint: (0.052mm < 0.254mm) Between Text "15" (335.534mm,18.542mm) on Top Overlay And Track (335.28mm,17.78mm)(335.28mm,22.86mm) on Top Overlay Silk Text to Silk Clearance [0.052mm]
Silk To Silk Clearance Constraint: (0.052mm < 0.254mm) Between Text "16" (335.534mm,21.082mm) on Top Overlay And Track (335.28mm,17.78mm)(335.28mm,22.86mm) on Top Overlay Silk Text to Silk Clearance [0.052mm]
Silk To Silk Clearance Constraint: (0.222mm < 0.254mm) Between Text "2" (313.69mm,21.082mm) on Top Overlay And Track (314.96mm,17.78mm)(314.96mm,22.86mm) on Top Overlay Silk Text to Silk Clearance [0.222mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ15" (434.975mm,80.645mm) on Top Overlay And Track (438.15mm,77.47mm)(438.15mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ15" (434.975mm,80.645mm) on Top Overlay And Track (433.07mm,80.01mm)(438.15mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ14" (421.005mm,80.645mm) on Top Overlay And Track (424.18mm,77.47mm)(424.18mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ14" (421.005mm,80.645mm) on Top Overlay And Track (419.1mm,80.01mm)(424.18mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ13" (407.035mm,80.645mm) on Top Overlay And Track (410.21mm,77.47mm)(410.21mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ13" (407.035mm,80.645mm) on Top Overlay And Track (405.13mm,80.01mm)(410.21mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ12" (393.065mm,80.645mm) on Top Overlay And Track (396.24mm,77.47mm)(396.24mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ12" (393.065mm,80.645mm) on Top Overlay And Track (391.16mm,80.01mm)(396.24mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ11" (379.095mm,80.645mm) on Top Overlay And Track (382.27mm,77.47mm)(382.27mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ11" (379.095mm,80.645mm) on Top Overlay And Track (377.19mm,80.01mm)(382.27mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ5" (295.275mm,80.645mm) on Top Overlay And Track (298.45mm,77.47mm)(298.45mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ5" (295.275mm,80.645mm) on Top Overlay And Track (293.37mm,80.01mm)(298.45mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ6" (309.245mm,80.645mm) on Top Overlay And Track (312.42mm,77.47mm)(312.42mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ6" (309.245mm,80.645mm) on Top Overlay And Track (307.34mm,80.01mm)(312.42mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ7" (323.215mm,80.645mm) on Top Overlay And Track (326.39mm,77.47mm)(326.39mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ7" (323.215mm,80.645mm) on Top Overlay And Track (321.31mm,80.01mm)(326.39mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ8" (337.185mm,80.645mm) on Top Overlay And Track (340.36mm,77.47mm)(340.36mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ8" (337.185mm,80.645mm) on Top Overlay And Track (335.28mm,80.01mm)(340.36mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ9" (351.155mm,80.645mm) on Top Overlay And Track (354.33mm,77.47mm)(354.33mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ9" (351.155mm,80.645mm) on Top Overlay And Track (349.25mm,80.01mm)(354.33mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ1" (239.395mm,80.645mm) on Top Overlay And Track (242.57mm,77.47mm)(242.57mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ1" (239.395mm,80.645mm) on Top Overlay And Track (237.49mm,80.01mm)(242.57mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ2" (253.365mm,80.645mm) on Top Overlay And Track (256.54mm,77.47mm)(256.54mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ2" (253.365mm,80.645mm) on Top Overlay And Track (251.46mm,80.01mm)(256.54mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ3" (267.335mm,80.645mm) on Top Overlay And Track (270.51mm,77.47mm)(270.51mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ3" (267.335mm,80.645mm) on Top Overlay And Track (265.43mm,80.01mm)(270.51mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ4" (281.305mm,80.645mm) on Top Overlay And Track (284.48mm,77.47mm)(284.48mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ4" (281.305mm,80.645mm) on Top Overlay And Track (279.4mm,80.01mm)(284.48mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ10" (365.125mm,80.645mm) on Top Overlay And Track (368.3mm,77.47mm)(368.3mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ10" (365.125mm,80.645mm) on Top Overlay And Track (363.22mm,80.01mm)(368.3mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.189mm < 0.254mm) Between Text "+" (399.473mm,22.72mm) on Top Overlay And Track (398.78mm,21.59mm)(401.32mm,21.59mm) on Top Overlay Silk Text to Silk Clearance [0.189mm]
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Net Antennae (Tolerance=0mm) (All)
Net Antennae: Track (439.344mm,25.349mm)(439.42mm,25.425mm) on Top Layer
Net Antennae: Track (439.344mm,25.349mm)(439.42mm,25.425mm) on Top Layer
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Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps'))
Room Definition: Between Small Component R5-Res2 (206.502mm,34.544mm) on Top Layer And Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps'))
Room Definition: Between Small Component R4-Res2 (231.902mm,40.894mm) on Top Layer And Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps'))
Room Definition: Between Component P4-57PC5FS (226.822mm,24.46mm) on Top Layer And Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps'))
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+ diff --git a/hw/Project Outputs for Xilofono/Xilofono.PDF b/hw/Project Outputs for Xilofono/Xilofono.PDF new file mode 100644 index 0000000..864876f Binary files /dev/null and b/hw/Project Outputs for Xilofono/Xilofono.PDF differ diff --git a/hw/Steps.IntLib b/hw/Steps.IntLib new file mode 100644 index 0000000..23e1ccb Binary files /dev/null and b/hw/Steps.IntLib differ diff --git a/hw/Steps.PcbDoc b/hw/Steps.PcbDoc index 076a67d..4b34018 100644 Binary files a/hw/Steps.PcbDoc and b/hw/Steps.PcbDoc differ diff --git a/hw/Steps.PcbLib b/hw/Steps.PcbLib new file mode 100644 index 0000000..6b26914 Binary files /dev/null and b/hw/Steps.PcbLib differ diff --git a/hw/Steps.PrjPcb b/hw/Steps.PrjPcb new file mode 100644 index 0000000..94afb0b --- /dev/null +++ b/hw/Steps.PrjPcb @@ -0,0 +1,1385 @@ +[Design] +Version=1.0 +HierarchyMode=0 +ChannelRoomNamingStyle=0 +ReleasesFolder= +ChannelDesignatorFormatString=$Component_$RoomName +ChannelRoomLevelSeperator=_ +OpenOutputs=1 +ArchiveProject=0 +TimestampOutput=0 +SeparateFolders=0 +TemplateLocationPath= +PinSwapBy_Netlabel=1 +PinSwapBy_Pin=1 +AllowPortNetNames=0 +AllowSheetEntryNetNames=0 +AppendSheetNumberToLocalNets=0 +NetlistSinglePinNets=0 +DefaultConfiguration=Sources +UserID=0xFFFFFFFF +DefaultPcbProtel=1 +DefaultPcbPcad=0 +ReorderDocumentsOnCompile=1 +NameNetsHierarchically=1 +PowerPortNamesTakePriority=1 +PushECOToAnnotationFile=1 +DItemRevisionGUID= +ReportSuppressedErrorsInMessages=0 +FSMCodingStyle=eFMSDropDownList_OneProcess +FSMEncodingStyle=eFMSDropDownList_OneHot +OutputPath= +LogFolderPath= +ManagedProjectGUID= +LinkedManagedProjectGUID= +IncludeDesignInRelease=0 + +[Preferences] +PrefsVaultGUID= +PrefsRevisionGUID= + +[Document1] +DocumentPath=Steps.PcbDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=CYIUPGSB + +[Document2] +DocumentPath=Piezo.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=0 +DoLibraryUpdate=0 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=VJJUNBIE + +[Document3] +DocumentPath=Steps.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=RUXBFIEP + +[Document4] +DocumentPath=TestPad.SchLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document5] +DocumentPath=Steps.SCHLIB +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document6] +DocumentPath=Steps.IntLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document7] +DocumentPath=Steps.PcbLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=FBXSRCJC + +[Document8] +DocumentPath=Switchcraft.PcbLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[GeneratedDocument1] +DocumentPath=Project Outputs for Steps\Design Rule Check - Steps.html +DItemRevisionGUID= + +[Configuration1] +Name=Sources +ParameterCount=0 +ConstraintFileCount=0 +ReleaseItemId= +Variant=[No Variations] +OutputJobsCount=0 +ContentTypeGUID=CB6F2064-E317-11DF-B822-12313F0024A2 +ConfigurationType=Source + +[OutputGroup1] +Name=Netlist Outputs +Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=CadnetixNetlist +OutputName1=Cadnetix Netlist +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=CalayNetlist +OutputName2=Calay Netlist +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=EDIF +OutputName3=EDIF for PCB +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +OutputType4=EESofNetlist +OutputName4=EESof Netlist +OutputDocumentPath4= +OutputVariantName4= +OutputDefault4=0 +OutputType5=IntergraphNetlist +OutputName5=Intergraph Netlist +OutputDocumentPath5= +OutputVariantName5= +OutputDefault5=0 +OutputType6=MentorBoardStationNetlist +OutputName6=Mentor BoardStation Netlist +OutputDocumentPath6= +OutputVariantName6= +OutputDefault6=0 +OutputType7=MultiWire +OutputName7=MultiWire +OutputDocumentPath7= +OutputVariantName7= +OutputDefault7=0 +OutputType8=OrCadPCB2Netlist +OutputName8=Orcad/PCB2 Netlist +OutputDocumentPath8= +OutputVariantName8= +OutputDefault8=0 +OutputType9=PADSNetlist +OutputName9=PADS ASCII Netlist +OutputDocumentPath9= +OutputVariantName9= +OutputDefault9=0 +OutputType10=Pcad +OutputName10=Pcad for PCB +OutputDocumentPath10= +OutputVariantName10= +OutputDefault10=0 +OutputType11=PCADNetlist +OutputName11=PCAD Netlist +OutputDocumentPath11= +OutputVariantName11= +OutputDefault11=0 +OutputType12=PCADnltNetlist +OutputName12=PCADnlt Netlist +OutputDocumentPath12= +OutputVariantName12= +OutputDefault12=0 +OutputType13=Protel2Netlist +OutputName13=Protel2 Netlist +OutputDocumentPath13= +OutputVariantName13= +OutputDefault13=0 +OutputType14=ProtelNetlist +OutputName14=Protel +OutputDocumentPath14= +OutputVariantName14= +OutputDefault14=0 +OutputType15=RacalNetlist +OutputName15=Racal Netlist +OutputDocumentPath15= +OutputVariantName15= +OutputDefault15=0 +OutputType16=RINFNetlist +OutputName16=RINF Netlist +OutputDocumentPath16= +OutputVariantName16= +OutputDefault16=0 +OutputType17=SciCardsNetlist +OutputName17=SciCards Netlist +OutputDocumentPath17= +OutputVariantName17= +OutputDefault17=0 +OutputType18=SIMetrixNetlist +OutputName18=SIMetrix +OutputDocumentPath18= +OutputVariantName18= +OutputDefault18=0 +OutputType19=SIMPLISNetlist +OutputName19=SIMPLIS +OutputDocumentPath19= +OutputVariantName19= +OutputDefault19=0 +OutputType20=TangoNetlist +OutputName20=Tango Netlist +OutputDocumentPath20= +OutputVariantName20= +OutputDefault20=0 +OutputType21=TelesisNetlist +OutputName21=Telesis Netlist +OutputDocumentPath21= +OutputVariantName21= +OutputDefault21=0 +OutputType22=WireListNetlist +OutputName22=WireList Netlist +OutputDocumentPath22= +OutputVariantName22= +OutputDefault22=0 +OutputType23=XSpiceNetlist +OutputName23=XSpice Netlist +OutputDocumentPath23= +OutputVariantName23= +OutputDefault23=0 + +[OutputGroup2] +Name=Simulator Outputs +Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=AdvSimNetlist +OutputName1=Mixed Sim +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=SIMetrixSimulation +OutputName2=SIMetrix +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=SIMPLISSimulation +OutputName3=SIMPLIS +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 + +[OutputGroup3] +Name=Documentation Outputs +Description= +TargetPrinter=Virtual Printer +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=Composite +OutputName1=Composite Drawing +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType2=PCB 3D Print +OutputName2=PCB 3D Print +OutputDocumentPath2= +OutputVariantName2=[No Variations] +OutputDefault2=0 +PageOptions2=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType3=PCB 3D Video +OutputName3=PCB 3D Video +OutputDocumentPath3= +OutputVariantName3=[No Variations] +OutputDefault3=0 +PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType4=PCB Print +OutputName4=PCB Prints +OutputDocumentPath4= +OutputVariantName4= +OutputDefault4=0 +PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType5=PCBDrawing +OutputName5=Draftsman +OutputDocumentPath5= +OutputVariantName5=[No Variations] +OutputDefault5=0 +PageOptions5=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType6=PCBLIB Print +OutputName6=PCBLIB Prints +OutputDocumentPath6= +OutputVariantName6= +OutputDefault6=0 +PageOptions6=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType7=PDF3D +OutputName7=PDF3D +OutputDocumentPath7= +OutputVariantName7=[No Variations] +OutputDefault7=0 +PageOptions7=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType8=Report Print +OutputName8=Report Prints +OutputDocumentPath8= +OutputVariantName8= +OutputDefault8=0 +PageOptions8=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType9=Schematic Print +OutputName9=Schematic Prints +OutputDocumentPath9= +OutputVariantName9= +OutputDefault9=0 +PageOptions9=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType10=SimView Print +OutputName10=SimView Prints +OutputDocumentPath10= +OutputVariantName10= +OutputDefault10=0 +PageOptions10=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType11=Wave Print +OutputName11=Wave Prints +OutputDocumentPath11= +OutputVariantName11= +OutputDefault11=0 +PageOptions11=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType12=WaveSim Print +OutputName12=WaveSim Prints +OutputDocumentPath12= +OutputVariantName12= +OutputDefault12=0 +PageOptions12=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 + +[OutputGroup4] +Name=Assembly Outputs +Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=Assembly +OutputName1=Assembly Drawings +OutputDocumentPath1= +OutputVariantName1=[No Variations] +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType2=Pick Place +OutputName2=Generates pick and place files +OutputDocumentPath2= +OutputVariantName2=[No Variations] +OutputDefault2=0 +OutputType3=Test Points For Assembly +OutputName3=Test Point Report +OutputDocumentPath3= +OutputVariantName3=[No Variations] +OutputDefault3=0 + +[OutputGroup5] +Name=Fabrication Outputs +Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=Board Stack Report +OutputName1=Report Board Stack +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType2=CompositeDrill +OutputName2=Composite Drill Drawing +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 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+PageOptions24=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType25=Text Print +OutputName25=Text Print +OutputDocumentPath25= +OutputVariantName25= +OutputDefault25=0 +PageOptions25=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType26=Text Print +OutputName26=Text Print +OutputDocumentPath26= +OutputVariantName26= +OutputDefault26=0 +PageOptions26=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType27=Text Print +OutputName27=Text Print +OutputDocumentPath27= +OutputVariantName27= +OutputDefault27=0 +PageOptions27=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType28=Text Print +OutputName28=Text Print +OutputDocumentPath28= +OutputVariantName28= +OutputDefault28=0 +PageOptions28=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType29=Text Print +OutputName29=Text Print +OutputDocumentPath29= +OutputVariantName29= +OutputDefault29=0 +PageOptions29=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 + +[OutputGroup8] +Name=Validation Outputs +Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=Component states check +OutputName1=Vault's components states check +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=Configuration compliance +OutputName2=Environment configuration compliance check +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=Design Rules Check +OutputName3=Design Rules Check +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType4=Differences Report +OutputName4=Differences Report +OutputDocumentPath4= +OutputVariantName4= +OutputDefault4=0 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+Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=AutoCAD dwg/dxf PCB +OutputName1=AutoCAD dwg/dxf File PCB +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=AutoCAD dwg/dxf Schematic +OutputName2=AutoCAD dwg/dxf File Schematic +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=ExportIDF +OutputName3=Export IDF +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +OutputType4=ExportPARASOLID +OutputName4=Export PARASOLID +OutputDocumentPath4= +OutputVariantName4=[No Variations] +OutputDefault4=0 +OutputType5=ExportSTEP +OutputName5=Export STEP +OutputDocumentPath5= +OutputVariantName5=[No Variations] +OutputDefault5=0 +OutputType6=ExportVRML +OutputName6=Export VRML +OutputDocumentPath6= +OutputVariantName6=[No Variations] +OutputDefault6=0 +OutputType7=Save As/Export PCB +OutputName7=Save As/Export PCB +OutputDocumentPath7= +OutputVariantName7= +OutputDefault7=0 +OutputType8=Save As/Export Schematic +OutputName8=Save As/Export Schematic +OutputDocumentPath8= +OutputVariantName8= +OutputDefault8=0 +OutputType9=Specctra Design PCB +OutputName9=Specctra Design PCB +OutputDocumentPath9= +OutputVariantName9= +OutputDefault9=0 + +[OutputGroup10] +Name=PostProcess Outputs +Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=Copy Files +OutputName1=Copy Files +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 + +[Modification Levels] +Type1=1 +Type2=1 +Type3=1 +Type4=1 +Type5=1 +Type6=1 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=1 +Type12=1 +Type13=1 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=1 +Type26=1 +Type27=1 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=1 +Type33=1 +Type34=1 +Type35=1 +Type36=1 +Type37=1 +Type38=1 +Type39=1 +Type40=1 +Type41=1 +Type42=1 +Type43=1 +Type44=1 +Type45=1 +Type46=1 +Type47=1 +Type48=1 +Type49=1 +Type50=1 +Type51=1 +Type52=1 +Type53=1 +Type54=1 +Type55=1 +Type56=1 +Type57=1 +Type58=1 +Type59=1 +Type60=1 +Type61=1 +Type62=1 +Type63=1 +Type64=1 +Type65=1 +Type66=1 +Type67=1 +Type68=1 +Type69=1 +Type70=1 +Type71=1 +Type72=1 +Type73=1 +Type74=1 +Type75=1 +Type76=1 +Type77=1 +Type78=1 +Type79=1 +Type80=1 +Type81=1 +Type82=1 +Type83=1 +Type84=1 +Type85=1 +Type86=1 +Type87=1 +Type88=1 +Type89=1 +Type90=1 + +[Difference Levels] +Type1=1 +Type2=1 +Type3=1 +Type4=1 +Type5=1 +Type6=1 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=1 +Type12=1 +Type13=1 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=1 +Type26=1 +Type27=1 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=1 +Type33=1 +Type34=1 +Type35=1 +Type36=1 +Type37=1 +Type38=1 +Type39=1 +Type40=1 +Type41=1 +Type42=1 +Type43=1 +Type44=1 +Type45=1 +Type46=1 +Type47=1 +Type48=1 +Type49=1 + +[Electrical Rules Check] +Type1=1 +Type2=1 +Type3=2 +Type4=1 +Type5=2 +Type6=2 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=2 +Type12=2 +Type13=2 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=2 +Type26=2 +Type27=2 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=2 +Type33=2 +Type34=2 +Type35=1 +Type36=2 +Type37=1 +Type38=2 +Type39=2 +Type40=2 +Type41=0 +Type42=2 +Type43=1 +Type44=1 +Type45=2 +Type46=1 +Type47=2 +Type48=2 +Type49=1 +Type50=2 +Type51=1 +Type52=1 +Type53=1 +Type54=1 +Type55=1 +Type56=2 +Type57=1 +Type58=1 +Type59=2 +Type60=1 +Type61=2 +Type62=2 +Type63=1 +Type64=0 +Type65=2 +Type66=3 +Type67=2 +Type68=2 +Type69=2 +Type70=2 +Type71=2 +Type72=2 +Type73=2 +Type74=1 +Type75=2 +Type76=1 +Type77=1 +Type78=1 +Type79=1 +Type80=2 +Type81=3 +Type82=3 +Type83=3 +Type84=3 +Type85=3 +Type86=2 +Type87=2 +Type88=2 +Type89=1 +Type90=1 +Type91=3 +Type92=3 +Type93=2 +Type94=2 +Type95=2 +Type96=2 +Type97=2 +Type98=0 +Type99=1 +Type100=2 +Type101=1 +Type102=2 +Type103=2 +Type104=1 +Type105=2 +Type106=2 +Type107=2 +Type108=2 +Type109=1 +Type110=1 +Type111=1 +Type112=1 +Type113=1 +MultiChannelAlternate=2 + +[ERC Connection Matrix] +L1=NNNNNNNNNNNWNNNWW +L2=NNWNNNNWWWNWNWNWN +L3=NWEENEEEENEWNEEWN +L4=NNENNNWEENNWNENWN +L5=NNNNNNNNNNNNNNNNN +L6=NNENNNNEENNWNENWN +L7=NNEWNNWEENNWNENWN +L8=NWEENEENEEENNEENN +L9=NWEENEEEENEWNEEWW +L10=NWNNNNNENNEWNNEWN +L11=NNENNNNEEENWNENWN +L12=WWWWNWWNWWWNWWWNN +L13=NNNNNNNNNNNWNNNWW +L14=NWEENEEEENEWNEEWW +L15=NNENNNNEEENWNENWW +L16=WWWWNWWNWWWNWWWNW +L17=WNNNNNNNWNNNWWWWN + +[Annotate] +SortOrder=3 +SortLocation=0 +MatchParameter1=Comment +MatchStrictly1=1 +MatchParameter2=Library Reference +MatchStrictly2=1 +PhysicalNamingFormat=$Component_$RoomName +GlobalIndexSortOrder=3 +GlobalIndexSortLocation=0 + +[PrjClassGen] +CompClassManualEnabled=0 +CompClassManualRoomEnabled=0 +NetClassAutoBusEnabled=1 +NetClassAutoCompEnabled=0 +NetClassAutoNamedHarnessEnabled=0 +NetClassManualEnabled=1 +NetClassSeparateForBusSections=0 + +[LibraryUpdateOptions] +SelectedOnly=0 +UpdateVariants=1 +PartTypes=0 +ComponentLibIdentifierKind0=Library Name And Type +ComponentLibraryIdentifier0=Microchip Microcontroller 8-Bit PIC18.IntLib +ComponentDesignItemID0=PIC18F44K20-I/P +ComponentSymbolReference0=PIC18F44K20-I/P +ComponentUpdate0=0 +ComponentIsDeviceSheet0=0 +ComponentLibIdentifierKind1=Library Name And Type +ComponentLibraryIdentifier1=Miscellaneous Connectors.IntLib +ComponentDesignItemID1=Header 16 +ComponentSymbolReference1=Header 16 +ComponentUpdate1=0 +ComponentIsDeviceSheet1=0 +ComponentLibIdentifierKind2=Library Name And Type +ComponentLibraryIdentifier2=Miscellaneous Connectors.IntLib +ComponentDesignItemID2=Header 2 +ComponentSymbolReference2=Header 2 +ComponentUpdate2=0 +ComponentIsDeviceSheet2=0 +ComponentLibIdentifierKind3=Library Name And Type +ComponentLibraryIdentifier3=Miscellaneous Connectors.IntLib +ComponentDesignItemID3=Header 4 +ComponentSymbolReference3=Header 4 +ComponentUpdate3=0 +ComponentIsDeviceSheet3=0 +ComponentLibIdentifierKind4=Library Name And Type +ComponentLibraryIdentifier4=Miscellaneous Devices.IntLib +ComponentDesignItemID4=Cap2 +ComponentSymbolReference4=Cap2 +ComponentUpdate4=0 +ComponentIsDeviceSheet4=0 +ComponentLibIdentifierKind5=Library Name And Type +ComponentLibraryIdentifier5=Miscellaneous Devices.IntLib +ComponentDesignItemID5=Diode BAT18 +ComponentSymbolReference5=Diode BAT18 +ComponentUpdate5=1 +ComponentIsDeviceSheet5=0 +ComponentLibIdentifierKind6=Library Name And Type +ComponentLibraryIdentifier6=Miscellaneous Devices.IntLib +ComponentDesignItemID6=LED1 +ComponentSymbolReference6=LED1 +ComponentUpdate6=0 +ComponentIsDeviceSheet6=0 +ComponentLibIdentifierKind7=Library Name And Type +ComponentLibraryIdentifier7=Miscellaneous Devices.IntLib +ComponentDesignItemID7=Res2 +ComponentSymbolReference7=Res2 +ComponentUpdate7=0 +ComponentIsDeviceSheet7=0 +ComponentLibIdentifierKind8=Library Name And Type +ComponentLibraryIdentifier8=Miscellaneous Devices.IntLib +ComponentDesignItemID8=SW-SPDT +ComponentSymbolReference8=SW-SPDT +ComponentUpdate8=0 +ComponentIsDeviceSheet8=0 +ComponentLibIdentifierKind9=Library Name And Type +ComponentLibraryIdentifier9=Miscellaneous Devices.IntLib +ComponentDesignItemID9=XTAL +ComponentSymbolReference9=XTAL +ComponentUpdate9=1 +ComponentIsDeviceSheet9=0 +ComponentLibIdentifierKind10=Library Name And Type +ComponentLibraryIdentifier10=Molex Modular Jack Right Angle.IntLib +ComponentDesignItemID10=95001-2661 +ComponentSymbolReference10=95001-2661 +ComponentUpdate10=0 +ComponentIsDeviceSheet10=0 +ComponentLibIdentifierKind11=Library Name And Type +ComponentLibraryIdentifier11=TestPad.SchLib +ComponentDesignItemID11=TestPad +ComponentSymbolReference11=TestPad +ComponentUpdate11=1 +ComponentIsDeviceSheet11=0 +ComponentLibIdentifierKind12=Library Name And Type +ComponentLibraryIdentifier12=TI Logic Buffer Line Driver.IntLib +ComponentDesignItemID12=SN74F125N +ComponentSymbolReference12=SN74F125N +ComponentUpdate12=0 +ComponentIsDeviceSheet12=0 +FullReplace=1 +UpdateDesignatorLock=1 +UpdatePartIDLock=1 +PreserveParameterLocations=1 +PreserveParameterVisibility=1 +DoGraphics=1 +DoParameters=1 +DoModels=1 +AddParameters=0 +RemoveParameters=0 +AddModels=1 +RemoveModels=1 +UpdateCurrentModels=1 +ParameterName0=Comment +ParameterUpdate0=1 +ParameterName1=Component Kind +ParameterUpdate1=1 +ParameterName2=ComponentLink1Description +ParameterUpdate2=1 +ParameterName3=ComponentLink1URL +ParameterUpdate3=1 +ParameterName4=ComponentLink2Description +ParameterUpdate4=1 +ParameterName5=ComponentLink2URL +ParameterUpdate5=1 +ParameterName6=ComponentLink3Description +ParameterUpdate6=1 +ParameterName7=ComponentLink3URL +ParameterUpdate7=1 +ParameterName8=DatasheetDocument +ParameterUpdate8=1 +ParameterName9=DatasheetVersion +ParameterUpdate9=1 +ParameterName10=Description +ParameterUpdate10=1 +ParameterName11=DrillSize +ParameterUpdate11=1 +ParameterName12=LatestRevisionDate +ParameterUpdate12=1 +ParameterName13=LatestRevisionNote +ParameterUpdate13=1 +ParameterName14=Library Reference +ParameterUpdate14=1 +ParameterName15=Note +ParameterUpdate15=1 +ParameterName16=PackageDescription +ParameterUpdate16=1 +ParameterName17=PackageDocument +ParameterUpdate17=1 +ParameterName18=PackageReference +ParameterUpdate18=1 +ParameterName19=PackageVersion +ParameterUpdate19=1 +ParameterName20=PCB_Layout +ParameterUpdate20=1 +ParameterName21=PCB_Mounting +ParameterUpdate21=1 +ParameterName22=PerformanceCategory +ParameterUpdate22=1 +ParameterName23=Ports +ParameterUpdate23=1 +ParameterName24=Positions/Loaded +ParameterUpdate24=1 +ParameterName25=Published +ParameterUpdate25=1 +ParameterName26=Publisher +ParameterUpdate26=1 +ParameterName27=Supplier 1 +ParameterUpdate27=1 +ParameterName28=Supplier 2 +ParameterUpdate28=1 +ParameterName29=Supplier Part Number 1 +ParameterUpdate29=1 +ParameterName30=Supplier Part Number 2 +ParameterUpdate30=1 +ParameterName31=Value +ParameterUpdate31=1 +ModelTypeGroup0=PCB3DLib +ModelTypeUpdate0=1 +ModelType0=PCB3DLib +ModelName0=N014 +ModelUpdate0=1 +ModelTypeGroup1=PCBLIB +ModelTypeUpdate1=1 +ModelType1=PCBLIB +ModelName1=95001-2661 +ModelUpdate1=1 +ModelType2=PCBLIB +ModelName2=AXIAL-0.4 +ModelUpdate2=1 +ModelType3=PCBLIB +ModelName3=BAT-2 +ModelUpdate3=1 +ModelType4=PCBLIB +ModelName4=CAPR5-4X5 +ModelUpdate4=1 +ModelType5=PCBLIB +ModelName5=HDR1X2 +ModelUpdate5=1 +ModelType6=PCBLIB +ModelName6=HDR1X3 +ModelUpdate6=1 +ModelType7=PCBLIB +ModelName7=HDR1X4 +ModelUpdate7=1 +ModelType8=PCBLIB +ModelName8=HDR2X8 +ModelUpdate8=1 +ModelType9=PCBLIB +ModelName9=N014 +ModelUpdate9=1 +ModelType10=PCBLIB +ModelName10=PDIP600-P40 +ModelUpdate10=1 +ModelType11=PCBLIB +ModelName11=PIN1 +ModelUpdate11=1 +ModelType12=PCBLIB +ModelName12=R38 +ModelUpdate12=1 +ModelType13=PCBLIB +ModelName13=SOT-23_L +ModelUpdate13=1 +ModelType14=PCBLIB +ModelName14=SOT-23_M +ModelUpdate14=1 +ModelType15=PCBLIB +ModelName15=SOT-23_N +ModelUpdate15=1 +ModelTypeGroup2=SI +ModelTypeUpdate2=1 +ModelType16=SI +ModelName16=Cap +ModelUpdate16=1 +ModelType17=SI +ModelName17=Connector +ModelUpdate17=1 +ModelType18=SI +ModelName18=Modular Jack +ModelUpdate18=1 +ModelType19=SI +ModelName19=Res +ModelUpdate19=1 +ModelType20=SI +ModelName20=SN74F125N +ModelUpdate20=1 +ModelTypeGroup3=SIM +ModelTypeUpdate3=1 +ModelType21=SIM +ModelName21=BAT18 +ModelUpdate21=1 +ModelType22=SIM +ModelName22=CAP +ModelUpdate22=1 +ModelType23=SIM +ModelName23=LED1 +ModelUpdate23=1 +ModelType24=SIM +ModelName24=RESISTOR +ModelUpdate24=1 +ModelType25=SIM +ModelName25=SN74F125 +ModelUpdate25=1 +ModelType26=SIM +ModelName26=XTAL +ModelUpdate26=1 + +[DatabaseUpdateOptions] +SelectedOnly=0 +UpdateVariants=1 +PartTypes=0 + +[Comparison Options] +ComparisonOptions0=Kind=Net|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions1=Kind=Net Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions2=Kind=Component Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions3=Kind=Rule|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions4=Kind=Differential Pair|MinPercent=50|MinMatch=1|ShowMatch=0|Confirm=0|UseName=0|InclAllRules=0 +ComparisonOptions5=Kind=Structure Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 + +[SmartPDF] +PageOptions=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 + diff --git a/hw/Steps.PrjPcbStructure b/hw/Steps.PrjPcbStructure new file mode 100644 index 0000000..ad576e9 --- /dev/null +++ b/hw/Steps.PrjPcbStructure @@ -0,0 +1,16 @@ +Record=TopLevelDocument|FileName=Steps.SchDoc +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ1|SchDesignator=PZ1|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ2|SchDesignator=PZ2|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ3|SchDesignator=PZ3|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ4|SchDesignator=PZ4|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ5|SchDesignator=PZ5|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ6|SchDesignator=PZ6|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ7|SchDesignator=PZ7|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ8|SchDesignator=PZ8|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ9|SchDesignator=PZ9|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ10|SchDesignator=PZ10|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ11|SchDesignator=PZ11|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ12|SchDesignator=PZ12|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ13|SchDesignator=PZ13|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ14|SchDesignator=PZ14|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ15|SchDesignator=PZ15|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= diff --git a/hw/Steps.SchDoc b/hw/Steps.SchDoc new file mode 100644 index 0000000..669ad9c Binary files /dev/null and b/hw/Steps.SchDoc differ diff --git a/hw/Steps.SchLib b/hw/Steps.SchLib new file mode 100644 index 0000000..30e1355 Binary files /dev/null and b/hw/Steps.SchLib differ diff --git a/hw/Switchcraft.PcbLib b/hw/Switchcraft.PcbLib new file mode 100644 index 0000000..1413466 Binary files /dev/null and b/hw/Switchcraft.PcbLib differ diff --git a/hw/Switchcraft.SchLib b/hw/Switchcraft.SchLib new file mode 100644 index 0000000..039be96 Binary files /dev/null and b/hw/Switchcraft.SchLib differ diff --git a/hw/TestPad.SchLib b/hw/TestPad.SchLib new file mode 100644 index 0000000..f08c29a Binary files /dev/null and b/hw/TestPad.SchLib differ diff --git a/hw/Workspace.DsnWrk b/hw/Workspace.DsnWrk index ded8cb2..abc8099 100644 --- a/hw/Workspace.DsnWrk +++ b/hw/Workspace.DsnWrk @@ -1,4 +1,8 @@ [ProjectGroup] Version=1.0 [Project1] +ProjectPath=Mids.PrjPcb +[Project2] +ProjectPath=Steps.PrjPcb +[Project3] ProjectPath=Xilofono.PrjPcb diff --git a/hw/Xilofono.OutJob b/hw/Xilofono.OutJob new file mode 100644 index 0000000..b8a4a62 --- /dev/null +++ b/hw/Xilofono.OutJob @@ -0,0 +1,145 @@ +[OutputJobFile] +Version=1.0 +Caption= +Description= +VaultGUID= +ItemGUID= +ItemHRID= +RevisionGUID= +RevisionId= +VaultHRID= +AutoItemHRID= +NextRevId= +FolderGUID= +LifeCycleDefinitionGUID= +RevisionNamingSchemeGUID= + +[OutputGroup1] +Name=Job1.OutJob +Description= +TargetOutputMedium=PDF +VariantName=[No Variations] +VariantScope=1 +CurrentConfigurationName= +TargetPrinter=Virtual Printer +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputMedium1=Print Job +OutputMedium1_Type=Printer +OutputMedium1_Printer= +OutputMedium1_PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputMedium2=PDF +OutputMedium2_Type=Publish +OutputMedium3=Folder Structure +OutputMedium3_Type=GeneratedFiles +OutputMedium4=Video +OutputMedium4_Type=Multimedia +OutputType1=Schematic Print +OutputName1=Schematic Prints +OutputCategory1=Documentation +OutputDocumentPath1= +OutputVariantName1= +OutputEnabled1=1 +OutputEnabled1_OutputMedium1=0 +OutputEnabled1_OutputMedium2=1 +OutputEnabled1_OutputMedium3=0 +OutputEnabled1_OutputMedium4=0 +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +Configuration1_Name1=OutputConfigurationParameter1 +Configuration1_Item1=Record=SchPrintView|ShowNoERC=True|ShowParamSet=True|ShowProbe=True|ShowBlanket=True|NoERCSymbolsToShow="Thin Cross","Thick Cross","Small Cross",Checkbox,Triangle|ShowNote=True|ShowNoteCollapsed=True|ShowOpenEnds=True|ExpandDesignator=True|ExpandNetLabel=False|ExpandPort=False|ExpandSheetNum=False|ExpandDocNum=False|PrintArea=0|PrintAreaRect.X1=0|PrintAreaRect.Y1=0|PrintAreaRect.X2=0|PrintAreaRect.Y2=0 + +[PublishSettings] +OutputFilePath2=Project Outputs for Free Documents\Job1.PDF +ReleaseManaged2=1 +OutputBasePath2=Project Outputs for Free Documents +OutputPathMedia2= +OutputPathMediaValue2= +OutputPathOutputer2=[Output Type] +OutputPathOutputerPrefix2= +OutputPathOutputerValue2= +OutputFileName2=Xilofono +OutputFileNameMulti2= +UseOutputNameForMulti2=0 +OutputFileNameSpecial2= +OpenOutput2=1 +PromptOverwrite2=1 +PublishMethod2=0 +ZoomLevel2=50 +FitSCHPrintSizeToDoc2=1 +FitPCBPrintSizeToDoc2=1 +GenerateNetsInfo2=1 +MarkPins2=1 +MarkNetLabels2=1 +MarkPortsId2=1 +GenerateTOC2=1 +ShowComponentParameters2=1 +GlobalBookmarks2=0 +PDFACompliance2=Disabled +PDFVersion2=Default +OutputFilePath3= +ReleaseManaged3=1 +OutputBasePath3= +OutputPathMedia3= +OutputPathMediaValue3= +OutputPathOutputer3=[Output Type] +OutputPathOutputerPrefix3= +OutputPathOutputerValue3= +OutputFileName3= +OutputFileNameMulti3= +UseOutputNameForMulti3=1 +OutputFileNameSpecial3= +OpenOutput3=1 +OutputFilePath4= +ReleaseManaged4=1 +OutputBasePath4= +OutputPathMedia4= +OutputPathMediaValue4= +OutputPathOutputer4=[Output Type] +OutputPathOutputerPrefix4= +OutputPathOutputerValue4= +OutputFileName4= +OutputFileNameMulti4= +UseOutputNameForMulti4=1 +OutputFileNameSpecial4= +OpenOutput4=1 +PromptOverwrite4=1 +PublishMethod4=5 +ZoomLevel4=50 +FitSCHPrintSizeToDoc4=1 +FitPCBPrintSizeToDoc4=1 +GenerateNetsInfo4=1 +MarkPins4=1 +MarkNetLabels4=1 +MarkPortsId4=1 +MediaFormat4=Windows Media file (*.wmv,*.wma,*.asf) +FixedDimensions4=1 +Width4=352 +Height4=288 +MultiFile4=0 +FramesPerSecond4=25 +FramesPerSecondDenom4=1 +AviPixelFormat4=7 +AviCompression4=MP42 MS-MPEG4 V2 +AviQuality4=100 +FFmpegVideoCodecId4=13 +FFmpegPixelFormat4=0 +FFmpegQuality4=80 +WmvVideoCodecName4=Windows Media Video V7 +WmvQuality4=80 + +[GeneratedFilesSettings] +RelativeOutputPath2=Project Outputs for Free Documents\Job1.PDF +OpenOutputs2=1 +RelativeOutputPath3= +OpenOutputs3=1 +AddToProject3=1 +TimestampFolder3=0 +UseOutputName3=0 +OpenODBOutput3=0 +OpenGerberOutput3=0 +OpenNCDrillOutput3=0 +OpenIPCOutput3=0 +EnableReload3=0 +RelativeOutputPath4= +OpenOutputs4=1 + diff --git a/hw/Xilofono.PrjPcb b/hw/Xilofono.PrjPcb index 7261bc9..a21f8b3 100644 --- a/hw/Xilofono.PrjPcb +++ b/hw/Xilofono.PrjPcb @@ -13,7 +13,7 @@ TemplateLocationPath= PinSwapBy_Netlabel=1 PinSwapBy_Pin=1 AllowPortNetNames=0 -AllowSheetEntryNetNames=1 +AllowSheetEntryNetNames=0 AppendSheetNumberToLocalNets=0 NetlistSinglePinNets=0 DefaultConfiguration=Sources @@ -21,7 +21,7 @@ UserID=0xFFFFFFFF DefaultPcbProtel=1 DefaultPcbPcad=0 ReorderDocumentsOnCompile=1 -NameNetsHierarchically=0 +NameNetsHierarchically=1 PowerPortNamesTakePriority=0 PushECOToAnnotationFile=1 DItemRevisionGUID= @@ -39,13 +39,13 @@ PrefsVaultGUID= PrefsRevisionGUID= [Document1] -DocumentPath=Xilofono.SchDoc +DocumentPath=Piezo.SchDoc AnnotationEnabled=1 AnnotateStartValue=1 AnnotationIndexControlEnabled=0 AnnotateSuffix= AnnotateScope=All -AnnotateOrder=1 +AnnotateOrder=0 DoLibraryUpdate=1 DoDatabaseUpdate=1 ClassGenCCAutoEnabled=1 @@ -53,10 +53,10 @@ ClassGenCCAutoRoomEnabled=1 ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -DocumentUniqueId=RUXBFIEP +DocumentUniqueId=VJJUNBIE [Document2] -DocumentPath=Steps.PcbDoc +DocumentPath=Mids.SchDoc AnnotationEnabled=1 AnnotateStartValue=1 AnnotationIndexControlEnabled=0 @@ -70,16 +70,16 @@ ClassGenCCAutoRoomEnabled=1 ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -DocumentUniqueId=CYIUPGSB +DocumentUniqueId=ABPFCPLB [Document3] -DocumentPath=Piezo.SchDoc +DocumentPath=Steps.SchDoc AnnotationEnabled=1 AnnotateStartValue=1 AnnotationIndexControlEnabled=0 AnnotateSuffix= AnnotateScope=All -AnnotateOrder=0 +AnnotateOrder=-1 DoLibraryUpdate=1 DoDatabaseUpdate=1 ClassGenCCAutoEnabled=1 @@ -87,7 +87,75 @@ ClassGenCCAutoRoomEnabled=1 ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -DocumentUniqueId=VJJUNBIE +DocumentUniqueId=RUXBFIEP + +[Document4] +DocumentPath=Xilofono.OutJob +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document5] +DocumentPath=TestPad.SchLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=IWKHUTRL + +[Document6] +DocumentPath=Steps.SchLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document7] +DocumentPath=Mids.SchLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= [Configuration1] Name=Sources @@ -99,6 +167,9 @@ OutputJobsCount=0 ContentTypeGUID=CB6F2064-E317-11DF-B822-12313F0024A2 ConfigurationType=Source +[Generic_EDE] +OutputDir= + [OutputGroup1] Name=Netlist Outputs Description= diff --git a/hw/Xilofono.PrjPcbStructure b/hw/Xilofono.PrjPcbStructure index 1c1c712..631d012 100644 --- a/hw/Xilofono.PrjPcbStructure +++ b/hw/Xilofono.PrjPcbStructure @@ -1,26 +1,26 @@ -Record=TopLevelDocument|FileName=Xilofono.SchDoc -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ1|SchDesignator=PZ1|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ2|SchDesignator=PZ2|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ3|SchDesignator=PZ3|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ4|SchDesignator=PZ4|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ5|SchDesignator=PZ5|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ6|SchDesignator=PZ6|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ7|SchDesignator=PZ7|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ8|SchDesignator=PZ8|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ9|SchDesignator=PZ9|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ10|SchDesignator=PZ10|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ11|SchDesignator=PZ11|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ12|SchDesignator=PZ12|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ13|SchDesignator=PZ13|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ14|SchDesignator=PZ14|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ15|SchDesignator=PZ15|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ16|SchDesignator=PZ16|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ17|SchDesignator=PZ17|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ18|SchDesignator=PZ18|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ19|SchDesignator=PZ19|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ20|SchDesignator=PZ20|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ21|SchDesignator=PZ21|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ22|SchDesignator=PZ22|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ23|SchDesignator=PZ23|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ24|SchDesignator=PZ24|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ25|SchDesignator=PZ25|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=TopLevelDocument|FileName=Steps.SchDoc +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ16|SchDesignator=PZ16|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ17|SchDesignator=PZ17|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ18|SchDesignator=PZ18|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ19|SchDesignator=PZ19|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ20|SchDesignator=PZ20|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ21|SchDesignator=PZ21|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ22|SchDesignator=PZ22|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ23|SchDesignator=PZ23|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ24|SchDesignator=PZ24|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ25|SchDesignator=PZ25|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ1|SchDesignator=PZ1|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ2|SchDesignator=PZ2|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ3|SchDesignator=PZ3|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ4|SchDesignator=PZ4|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ5|SchDesignator=PZ5|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ6|SchDesignator=PZ6|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ7|SchDesignator=PZ7|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ8|SchDesignator=PZ8|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ9|SchDesignator=PZ9|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ10|SchDesignator=PZ10|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ11|SchDesignator=PZ11|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ12|SchDesignator=PZ12|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ13|SchDesignator=PZ13|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ14|SchDesignator=PZ14|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ15|SchDesignator=PZ15|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= diff --git a/hw/Xilofono.SchDoc b/hw/Xilofono.SchDoc deleted file mode 100644 index ff8a5ce..0000000 Binary files a/hw/Xilofono.SchDoc and /dev/null differ diff --git a/hw/debug.log b/hw/debug.log index e69de29..689977c 100644 --- a/hw/debug.log +++ b/hw/debug.log @@ -0,0 +1,124 @@ +[0119/140753:INFO:CONSOLE(0)] "Synchronous XMLHttpRequest on the main thread is deprecated because of its detrimental effects to the end user's experience. For more help, check https://xhr.spec.whatwg.org/.", source: (0) +[0119/140755:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: http://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2019%20Jan%202018%2013%3A07%3A55%20GMT&n=-1&b=Altium%20Design%20Platform%20Product%20Extension%20Applications%20(Third%20Party%20Integration)&.yp=429165&f=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&e=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&enc=UTF-8 (1) +[0119/140755:INFO:CONSOLE(43)] "[object Object]", source: (43) +[0119/140801:ERROR:render_media_log.cc(23)] MediaEvent: PIPELINE_ERROR demuxer: could not open +[0119/140801:INFO:CONSOLE(0)] "Refused to execute script from 'https://px.ads.linkedin.com/collect/?time=1516367279872&pid=15042&url=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&pageUrl=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&ref=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&fmt=js&s=1' because its MIME type ('image/gif') is not executable.", source: http://www.altium.com/products/extensions (0) +[0119/140801:ERROR:webrtcsession.cc(1388)] ConnectDataChannel called when data_channel_ is NULL. +[0119/140802:INFO:CONSOLE(0)] "Refused to execute script from 'https://dc.ads.linkedin.com/collect/?time=1516367279872&pid=15042&url=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&pageUrl=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&ref=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&fmt=js&s=1' because its MIME type ('image/gif') is not executable.", source: http://www.altium.com/products/extensions (0) +[0119/140802:WARNING:mediasession.cc(376)] Duplicate id found. Reassigning from 101 to 127 +[0119/140802:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: http://connect.facebook.net/en_US/fbevents.js (25) +[0119/140802:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[0035DAE0:data:1:0:local:Net[any:0.0.0.x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/140802:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[0035E6E8:data:1:0:local:Net[any:0:0:0:x:x:x:x:x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/140822:WARNING:spdy_session.cc(2427)] Received HEADERS for invalid stream 1 +[0119/140822:WARNING:spdy_session.cc(2427)] Received HEADERS for invalid stream 3 +[0119/140822:INFO:CONSOLE(241)] "No Vidyard Players found. (include this script below player embed codes)", source: https://assets.vidyard.com/play/js/v0/google-analytics-269e106b2f9f108c34a38a2a25b0dba6.js (241) +[0119/140823:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: http://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2019%20Jan%202018%2013%3A08%3A23%20GMT&n=-1&b=Downloads%20for%20PCB%20Design%20Products%20and%20EDA%20Software%20%7C%20Altium&.yp=429165&f=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fdownloads&e=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&enc=UTF-8 (1) +[0119/140823:INFO:CONSOLE(0)] "Refused to execute script from 'https://dc.ads.linkedin.com/collect/?time=1516367303745&pid=15042&url=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fdownloads&pageUrl=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fdownloads&ref=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&fmt=js&s=1' because its MIME type ('image/gif') is not executable.", source: http://www.altium.com/products/downloads (0) +[0119/140824:INFO:CONSOLE(43)] "[object Object]", source: (43) +[0119/140824:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: http://connect.facebook.net/en_US/fbevents.js (25) +[0119/140824:INFO:CONSOLE(0)] "Refused to execute script from 'https://px.ads.linkedin.com/collect/?time=1516367303745&pid=15042&url=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fdownloads&pageUrl=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fdownloads&ref=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&fmt=js&s=1' because its MIME type ('image/gif') is not executable.", source: http://www.altium.com/products/downloads (0) +[0119/140824:ERROR:render_media_log.cc(23)] MediaEvent: PIPELINE_ERROR demuxer: could not open +[0119/140824:ERROR:webrtcsession.cc(1388)] ConnectDataChannel called when data_channel_ is NULL. +[0119/140824:WARNING:mediasession.cc(376)] Duplicate id found. Reassigning from 101 to 127 +[0119/140824:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[0035E950:data:1:0:local:Net[any:0.0.0.x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/140824:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[0035D3A8:data:1:0:local:Net[any:0:0:0:x:x:x:x:x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/140826:INFO:CONSOLE(0)] "WebSocket connection to 'wss://ws.api.drift.com/ws/websocket?session_token=SFMyNTY.g3QAAAACZAAEZGF0YXQAAAAEZAACaWRtAAAAMTYwODA3LWFub246MTcyOGQ3ZWItMDk3MC00YjUwLThmMjYtMmYxNzdjMDRiYTEzLTRkAAdsZWFkX2lkbQAAACQxNzI4ZDdlYi0wOTcwLTRiNTAtOGYyNi0yZjE3N2MwNGJhMTNkAAZvcmdfaWRiAADth2QACXVzZXJfdHlwZWQABGxlYWRkAAZzaWduZWRuBgBK3IgOYQE.Wlt-P7D6rQHy5h3kKfVK1gU9rBIPaalWekLTeReZpSg&vsn=1.0.0' failed: WebSocket is closed before the connection is established.", source: https://js.driftt.com/dist/index-prod.html (0) +[0119/140828:INFO:CONSOLE(0)] "Synchronous XMLHttpRequest on the main thread is deprecated because of its detrimental effects to the end user's experience. For more help, check https://xhr.spec.whatwg.org/.", source: (0) +[0119/140829:INFO:CONSOLE(1)] "Uncaught (in promise) NotSupportedError: The element has no supported sources.", source: https://js.driftt.com/dist/assets/widget-9f0bee0ee6f6a2b82753-prod.js (1) +[0119/140831:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: https://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2019%20Jan%202018%2013%3A08%3A31%20GMT&n=-1&b=Altium%20Design%20Content&.yp=429165&f=https%3A%2F%2Fdesigncontent.live.altium.com%2F&e=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fdownloads&enc=UTF-8 (1) +[0119/140833:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: https://connect.facebook.net/en_US/fbevents.js (25) +[0119/150949:ERROR:ipc_channel_win.cc(482)] pipe error: 109 +[0119/151139:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: http://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2019%20Jan%202018%2014%3A11%3A39%20GMT&n=-1&b=Altium%20Design%20Platform%20Product%20Extension%20Applications%20(Third%20Party%20Integration)&.yp=429165&f=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&e=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&enc=UTF-8 (1) +[0119/151139:INFO:CONSOLE(43)] "[object Object]", source: (43) +[0119/151141:ERROR:render_media_log.cc(23)] MediaEvent: PIPELINE_ERROR demuxer: could not open +[0119/151141:INFO:CONSOLE(0)] "Refused to execute script from 'https://dc.ads.linkedin.com/collect/?time=1516371100003&pid=15042&url=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&pageUrl=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&ref=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&fmt=js&s=1' because its MIME type ('image/gif') is not executable.", source: http://www.altium.com/products/extensions (0) +[0119/151141:INFO:CONSOLE(0)] "Refused to execute script from 'https://px.ads.linkedin.com/collect/?time=1516371100003&pid=15042&url=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&pageUrl=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&ref=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&fmt=js&s=1' because its MIME type ('image/gif') is not executable.", source: http://www.altium.com/products/extensions (0) +[0119/151141:ERROR:webrtcsession.cc(1388)] ConnectDataChannel called when data_channel_ is NULL. +[0119/151141:WARNING:mediasession.cc(376)] Duplicate id found. Reassigning from 101 to 127 +[0119/151141:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[003A80C0:data:1:0:local:Net[any:0.0.0.x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/151141:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[003A7720:data:1:0:local:Net[any:0:0:0:x:x:x:x:x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/151141:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: http://connect.facebook.net/en_US/fbevents.js (25) +[0119/151141:INFO:CONSOLE(0)] "Synchronous XMLHttpRequest on the main thread is deprecated because of its detrimental effects to the end user's experience. For more help, check https://xhr.spec.whatwg.org/.", source: (0) +[0119/151144:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: https://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2019%20Jan%202018%2014%3A11%3A44%20GMT&n=-1&b=Altium%20Design%20Content&.yp=429165&f=https%3A%2F%2Fdesigncontent.live.altium.com%2F&e=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&enc=UTF-8 (1) +[0119/151145:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: https://connect.facebook.net/en_US/fbevents.js (25) +[0119/151236:INFO:CONSOLE(2139)] "Uncaught TypeError: Cannot read property 'id' of null", source: https://designcontent.live.altium.com/mfk_framework.js?cls=code&lng=en&xid={1CFF0F89-1BBB-4BE1-AEFB-C969D237472B} (2139) +[0119/151238:INFO:CONSOLE(0)] "Synchronous XMLHttpRequest on the main thread is deprecated because of its detrimental effects to the end user's experience. For more help, check https://xhr.spec.whatwg.org/.", source: (0) +[0119/151358:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: https://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2019%20Jan%202018%2014%3A13%3A57%20GMT&n=-1&b=Altium%20Design%20Content&.yp=429165&f=https%3A%2F%2Fdesigncontent.live.altium.com%2F%23UnifiedComponentDetail%2FMolex_Legacy%2F%3Fsearch%3Dmolex&e=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&enc=UTF-8 (1) +[0119/151358:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: https://connect.facebook.net/en_US/fbevents.js (25) +[0119/151359:ERROR:webrtcsession.cc(1388)] ConnectDataChannel called when data_channel_ is NULL. +[0119/151359:WARNING:mediasession.cc(376)] Duplicate id found. Reassigning from 101 to 127 +[0119/151359:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[0C0596C0:data:1:0:local:Net[any:0.0.0.x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/151359:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[0C059928:data:1:0:local:Net[any:0:0:0:x:x:x:x:x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/154736:WARNING:dns_config_service_win.cc(665)] Failed to read DnsConfig. +[0119/162839:ERROR:ipc_channel_win.cc(482)] pipe error: 109 +[0202/090544:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: http://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2002%20Feb%202018%2008%3A05%3A44%20GMT&n=-1&b=Altium%20Design%20Platform%20Product%20Extension%20Applications%20(Third%20Party%20Integration)&.yp=429165&f=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&e=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&enc=UTF-8 (1) +[0202/090546:INFO:CONSOLE(43)] "[object Object]", source: (43) +[0202/090546:INFO:CONSOLE(0)] "Refused to execute script from 'https://dc.ads.linkedin.com/collect/?time=1517558745347&pid=15042&url=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&pageUrl=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&ref=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&fmt=js&s=1' because its MIME type ('image/gif') is not executable.", source: http://www.altium.com/products/extensions (0) +[0202/090546:ERROR:render_media_log.cc(23)] MediaEvent: PIPELINE_ERROR demuxer: could not open +[0202/090547:ERROR:webrtcsession.cc(1388)] ConnectDataChannel called when data_channel_ is NULL. +[0202/090547:WARNING:mediasession.cc(376)] Duplicate id found. Reassigning from 101 to 127 +[0202/090548:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[00373FF0:data:1:0:local:Net[any:0.0.0.x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0202/090548:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[00373B20:data:1:0:local:Net[any:0:0:0:x:x:x:x:x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0202/090608:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: http://connect.facebook.net/en_US/fbevents.js (25) +[0202/090613:INFO:CONSOLE(0)] "Synchronous XMLHttpRequest on the main thread is deprecated because of its detrimental effects to the end user's experience. For more help, check https://xhr.spec.whatwg.org/.", source: (0) +[0202/090618:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: https://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2002%20Feb%202018%2008%3A06%3A18%20GMT&n=-1&b=Altium%20Design%20Content&.yp=429165&f=https%3A%2F%2Fdesigncontent.live.altium.com%2F&e=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&enc=UTF-8 (1) +[0202/090618:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: https://connect.facebook.net/en_US/fbevents.js (25) +[0202/090618:ERROR:webrtcsession.cc(1388)] ConnectDataChannel called when data_channel_ is NULL. +[0202/090618:WARNING:mediasession.cc(376)] Duplicate id found. Reassigning from 101 to 127 +[0202/090619:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[00373650:data:1:0:local:Net[any:0.0.0.x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0202/090619:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[00374BF8:data:1:0:local:Net[any:0:0:0:x:x:x:x:x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0202/092613:ERROR:webrtcsession.cc(1388)] ConnectDataChannel called when data_channel_ is NULL. +[0202/092613:INFO:CONSOLE(0)] "Synchronous XMLHttpRequest on the main thread is deprecated because of its detrimental effects to the end user's experience. For more help, check https://xhr.spec.whatwg.org/.", source: (0) +[0202/092613:WARNING:mediasession.cc(376)] Duplicate id found. Reassigning from 101 to 127 +[0202/092614:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[00374BF8:data:1:0:local:Net[any:0.0.0.x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0202/092614:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[00373D88:data:1:0:local:Net[any:0:0:0:x:x:x:x:x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0202/092708:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: https://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2002%20Feb%202018%2008%3A27%3A08%20GMT&n=-1&b=Altium%20Design%20Content&.yp=429165&f=https%3A%2F%2Fdesigncontent.live.altium.com%2F&enc=UTF-8 (1) +[0202/092709:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: https://connect.facebook.net/en_US/fbevents.js (25) +[0202/113231:ERROR:gles2_cmd_decoder.cc(12775)] Context lost because SwapBuffers failed. +[0202/113231:ERROR:gles2_cmd_decoder.cc(13124)] Onscreen context lost via ARB/EXT_robustness. Reset status = GL_UNKNOWN_CONTEXT_RESET_KHR +[0202/113231:ERROR:gles2_cmd_decoder.cc(4548)] Error: 5 for Command kPostSubBufferCHROMIUM +[0202/113231:ERROR:gpu_channel_manager.cc(253)] Exiting GPU process because some drivers cannot recover from problems. +[0202/113231:ERROR:gpu_channel_manager.cc(253)] Exiting GPU process because some drivers cannot recover from problems. +[0202/113231:ERROR:gpu_channel_manager.cc(253)] Exiting GPU process because some drivers cannot recover from problems. +[0202/113231:ERROR:gpu_channel_manager.cc(253)] Exiting GPU process because some drivers cannot recover from problems. +[0202/113231:ERROR:gpu_channel_manager.cc(253)] Exiting GPU process because some drivers cannot recover from problems. +[0202/113231:ERROR:gpu_channel_manager.cc(253)] Exiting GPU process because some drivers cannot recover from problems. +[0202/113231:ERROR:gpu_channel_manager.cc(253)] Exiting GPU process because some drivers cannot recover from problems. +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11526)] Trying to call glDeleteVertexArraysOES() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11465)] Trying to call glDeleteFramebuffersEXT() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11465)] Trying to call glDeleteFramebuffersEXT() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11511)] Trying to call glDeleteTextures() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context diff --git a/refs/52053B.pdf b/refs/52053B.pdf new file mode 100644 index 0000000..7f047e8 Binary files /dev/null and b/refs/52053B.pdf differ diff --git a/src/dist/default/production/memoryfile.xml b/src/dist/default/production/memoryfile.xml index 872b3c2..856a1e7 100644 --- a/src/dist/default/production/memoryfile.xml +++ b/src/dist/default/production/memoryfile.xml @@ -3,15 +3,15 @@ bytes - 16384 - 36 - 16348 + 32768 + 416 + 32352 bytes - 768 - 0 - 768 + 1536 + 20 + 1516 diff --git a/src/dist/default/production/src.production.cmf b/src/dist/default/production/src.production.cmf index 797b04a..b190b8c 100644 --- a/src/dist/default/production/src.production.cmf +++ b/src/dist/default/production/src.production.cmf @@ -11,33 +11,42 @@ # All addresses and the length are given in unqualified hexadecimal # in delta units. Any other numeric values are decimal. %PSECTS -$C:\Users\_prossn\AppData\Local\Temp\s3s8.obj +$C:\Users\_prossn\AppData\Local\Temp\s438.obj idloc IDLOC 0 200000 200000 8 1 init CODE 0 0 0 4 1 config CONFIG 0 300000 300000 E 1 $dist/default/production\src.production.obj -cinit CODE 0 3FE2 3FE2 6 1 -text0 CODE 0 3FDC 3FDC 6 1 -text1 CODE 0 3FE8 3FE8 18 1 +cinit CODE 0 7E60 7E60 6 1 +text0 CODE 0 7ED4 7ED4 2E 1 +text1 CODE 0 7F02 7F02 76 1 +text2 CODE 0 7E8A 7E8A 24 1 +text3 CODE 0 7EAE 7EAE 26 1 +text4 CODE 0 7F78 7F78 88 1 +text5 CODE 0 7E66 7E66 C 1 +text6 CODE 0 7E72 7E72 18 1 +cstackCOMRAM COMRAM 1 1 1 14 1 # %UNUSED Section # This section enumerates the unused ranges of each CLASS. Each entry # is described on a single line as follows: # # Addresses given in the range are in hexadecimal and units of delta. %UNUSED -RAM 60-2FF 1 +RAM 60-5FF 1 SFR F38-FFF 1 BANK0 60-FF 1 BANK1 100-1FF 1 BANK2 200-2FF 1 -CONST 4-3FDB 1 -STACK 60-2FF 1 -SMALLCONST 300-3FDB 1 -CODE 4-3FDB 1 -BIGRAM 1-2FF 1 -COMRAM 1-5F 1 +BANK3 300-3FF 1 +BANK4 400-4FF 1 +BANK5 500-5FF 1 +CONST 4-7E5F 1 +STACK 60-5FF 1 +SMALLCONST 600-7E5F 1 +CODE 4-7E5F 1 +BIGRAM 15-5FF 1 +COMRAM 15-5F 1 EEDATA F00000-F000FF 1 -MEDIUMCONST 300-3FDB 1 +MEDIUMCONST 600-7E5F 1 # %LINETAB Section # This section enumerates the file/line to address mappings. # The beginning of the section is indicated by %LINETAB. @@ -52,27 +61,58 @@ MEDIUMCONST 300-3FDB 1 # All other numeric values are in decimal. %LINETAB $dist/default/production\src.production.obj -3FE8 text1 CODE >4:Z:\SAMB_4\projects\xilofono\src\rs232.c -3FE8 text1 CODE >7:Z:\SAMB_4\projects\xilofono\src\rs232.c -3FEA text1 CODE >8:Z:\SAMB_4\projects\xilofono\src\rs232.c -3FEC text1 CODE >11:Z:\SAMB_4\projects\xilofono\src\rs232.c -3FEE text1 CODE >12:Z:\SAMB_4\projects\xilofono\src\rs232.c -3FF2 text1 CODE >13:Z:\SAMB_4\projects\xilofono\src\rs232.c -3FF4 text1 CODE >14:Z:\SAMB_4\projects\xilofono\src\rs232.c -3FF6 text1 CODE >17:Z:\SAMB_4\projects\xilofono\src\rs232.c -3FF8 text1 CODE >18:Z:\SAMB_4\projects\xilofono\src\rs232.c -3FFA text1 CODE >19:Z:\SAMB_4\projects\xilofono\src\rs232.c -3FFC text1 CODE >20:Z:\SAMB_4\projects\xilofono\src\rs232.c -3FFE text1 CODE >21:Z:\SAMB_4\projects\xilofono\src\rs232.c -3FDC text0 CODE >83:Z:\SAMB_4\projects\xilofono\src\main.c -3FDC text0 CODE >85:Z:\SAMB_4\projects\xilofono\src\main.c -3FE0 text0 CODE >88:Z:\SAMB_4\projects\xilofono\src\main.c -3FE2 cinit CODE >1144:C:\Users\_prossn\AppData\Local\Temp\s3s8. -3FE2 cinit CODE >1146:C:\Users\_prossn\AppData\Local\Temp\s3s8. -3FE2 cinit CODE >1149:C:\Users\_prossn\AppData\Local\Temp\s3s8. -3FE2 cinit CODE >1155:C:\Users\_prossn\AppData\Local\Temp\s3s8. -3FE2 cinit CODE >1157:C:\Users\_prossn\AppData\Local\Temp\s3s8. -3FE4 cinit CODE >1158:C:\Users\_prossn\AppData\Local\Temp\s3s8. +7E72 text6 CODE >4:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E72 text6 CODE >7:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E74 text6 CODE >8:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E76 text6 CODE >11:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E78 text6 CODE >12:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E7C text6 CODE >13:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E7E text6 CODE >14:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E80 text6 CODE >17:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E82 text6 CODE >18:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E84 text6 CODE >19:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E86 text6 CODE >20:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E88 text6 CODE >21:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E66 text5 CODE >23:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E68 text5 CODE >25:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E6C text5 CODE >26:Z:\SAMB_4\projects\xilofono\src\rs232.c +7E70 text5 CODE >27:Z:\SAMB_4\projects\xilofono\src\rs232.c +7F78 text4 CODE >81:Z:\SAMB_4\projects\xilofono\src\main.c +7F78 text4 CODE >83:Z:\SAMB_4\projects\xilofono\src\main.c +7F80 text4 CODE >87:Z:\SAMB_4\projects\xilofono\src\main.c +7F94 text4 CODE >91:Z:\SAMB_4\projects\xilofono\src\main.c +7FA8 text4 CODE >92:Z:\SAMB_4\projects\xilofono\src\main.c +7FB4 text4 CODE >94:Z:\SAMB_4\projects\xilofono\src\main.c +7FDA text4 CODE >96:Z:\SAMB_4\projects\xilofono\src\main.c +7FDC text4 CODE >97:Z:\SAMB_4\projects\xilofono\src\main.c +7FEE text4 CODE >96:Z:\SAMB_4\projects\xilofono\src\main.c +7FEE text4 CODE >98:Z:\SAMB_4\projects\xilofono\src\main.c +7EAE text3 CODE >53:Z:\SAMB_4\projects\xilofono\src\midi.c +7EAE text3 CODE >55:Z:\SAMB_4\projects\xilofono\src\midi.c +7EB6 text3 CODE >59:Z:\SAMB_4\projects\xilofono\src\midi.c +7E8A text2 CODE >42:Z:\SAMB_4\projects\xilofono\src\midi.c +7E8A text2 CODE >44:Z:\SAMB_4\projects\xilofono\src\midi.c +7E92 text2 CODE >48:Z:\SAMB_4\projects\xilofono\src\midi.c +7F02 text1 CODE >64:Z:\SAMB_4\projects\xilofono\src\midi.c +7F02 text1 CODE >66:Z:\SAMB_4\projects\xilofono\src\midi.c +7F0A text1 CODE >70:Z:\SAMB_4\projects\xilofono\src\midi.c +7F1A text1 CODE >71:Z:\SAMB_4\projects\xilofono\src\midi.c +7F2E text1 CODE >73:Z:\SAMB_4\projects\xilofono\src\midi.c +7F42 text1 CODE >77:Z:\SAMB_4\projects\xilofono\src\midi.c +7F52 text1 CODE >78:Z:\SAMB_4\projects\xilofono\src\midi.c +7F62 text1 CODE >81:Z:\SAMB_4\projects\xilofono\src\midi.c +7ED4 text0 CODE >105:Z:\SAMB_4\projects\xilofono\src\main.c +7ED4 text0 CODE >108:Z:\SAMB_4\projects\xilofono\src\main.c +7EF0 text0 CODE >110:Z:\SAMB_4\projects\xilofono\src\main.c +7EF4 text0 CODE >113:Z:\SAMB_4\projects\xilofono\src\main.c +7EF4 text0 CODE >114:Z:\SAMB_4\projects\xilofono\src\main.c +7F00 text0 CODE >113:Z:\SAMB_4\projects\xilofono\src\main.c +7E60 cinit CODE >1149:C:\Users\_prossn\AppData\Local\Temp\s438. +7E60 cinit CODE >1151:C:\Users\_prossn\AppData\Local\Temp\s438. +7E60 cinit CODE >1154:C:\Users\_prossn\AppData\Local\Temp\s438. +7E60 cinit CODE >1160:C:\Users\_prossn\AppData\Local\Temp\s438. +7E60 cinit CODE >1162:C:\Users\_prossn\AppData\Local\Temp\s438. +7E62 cinit CODE >1163:C:\Users\_prossn\AppData\Local\Temp\s438. # %SYMTAB Section # An enumeration of all symbols in the program. # The beginning of the section is indicated by %SYMTAB. @@ -87,55 +127,70 @@ $dist/default/production\src.production.obj %SYMTAB __Lmediumconst 0 0 MEDIUMCONST 0 mediumconst dist/default/production\src.production.obj __Hspace_0 30000E 0 ABS 0 - dist/default/production\src.production.obj -__Hspace_1 0 0 ABS 0 - dist/default/production\src.production.obj +__Hspace_1 15 0 ABS 0 - dist/default/production\src.production.obj __Hspace_2 0 0 ABS 0 - dist/default/production\src.production.obj __CFG_IESO$OFF 0 0 ABS 0 - dist/default/production\src.production.obj +__end_of_midi_set_status 7EAE 0 CODE 0 text2 dist/default/production\src.production.obj __Hibigdata 0 0 CODE 0 ibigdata dist/default/production\src.production.obj -__mediumconst 0 0 MEDIUMCONST 0 mediumconst C:\Users\_prossn\AppData\Local\Temp\s3s8.obj +__mediumconst 0 0 MEDIUMCONST 0 mediumconst C:\Users\_prossn\AppData\Local\Temp\s438.obj __Heeprom_data 0 0 EEDATA 0 eeprom_data dist/default/production\src.production.obj __Lsmallconst 0 0 SMALLCONST 0 smallconst dist/default/production\src.production.obj _RCIF 7CF5 0 ABS 0 - dist/default/production\src.production.obj _TXIF 7CF4 0 ABS 0 - dist/default/production\src.production.obj -___sp 0 0 STACK 2 stack C:\Users\_prossn\AppData\Local\Temp\s3s8.obj -_main 3FDC 0 CODE 0 text0 dist/default/production\src.production.obj -start 0 0 CODE 0 init C:\Users\_prossn\AppData\Local\Temp\s3s8.obj +___sp 0 0 STACK 2 stack C:\Users\_prossn\AppData\Local\Temp\s438.obj +_main 7ED4 0 CODE 0 text0 dist/default/production\src.production.obj +start 0 0 CODE 0 init C:\Users\_prossn\AppData\Local\Temp\s438.obj __size_of_main 0 0 ABS 0 - dist/default/production\src.production.obj +eusart_write_midi@data 8 0 COMRAM 1 cstackCOMRAM dist/default/production\src.production.obj __CFG_CCP2MX$PORTC1 0 0 ABS 0 - dist/default/production\src.production.obj +midi_note_on@channel 8 0 COMRAM 1 cstackCOMRAM dist/default/production\src.production.obj __Hpowerup 0 0 CODE 0 powerup dist/default/production\src.production.obj __CFG_CCP3MX$PORTB5 0 0 ABS 0 - dist/default/production\src.production.obj -__accesstop 60 0 ABS 0 - C:\Users\_prossn\AppData\Local\Temp\s3s8.obj -intlevel0 0 0 CODE 0 text C:\Users\_prossn\AppData\Local\Temp\s3s8.obj -intlevel1 0 0 CODE 0 text C:\Users\_prossn\AppData\Local\Temp\s3s8.obj -intlevel2 0 0 CODE 0 text C:\Users\_prossn\AppData\Local\Temp\s3s8.obj -intlevel3 0 0 CODE 0 text C:\Users\_prossn\AppData\Local\Temp\s3s8.obj +__size_of_eusart_write_midi 0 0 ABS 0 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dist/default/production\src.production.obj __Hclrtext 0 0 ABS 0 clrtext dist/default/production\src.production.obj __CFG_PRICLKEN$ON 0 0 ABS 0 - dist/default/production\src.production.obj -_eusart_init 3FE8 0 CODE 0 text1 dist/default/production\src.production.obj -___inthi_sp 0 0 STACK 2 stack C:\Users\_prossn\AppData\Local\Temp\s3s8.obj -___intlo_sp 0 0 STACK 2 stack C:\Users\_prossn\AppData\Local\Temp\s3s8.obj +_eusart_init 7E72 0 CODE 0 text6 dist/default/production\src.production.obj +midi_note_on@velocity B 0 COMRAM 1 cstackCOMRAM dist/default/production\src.production.obj +___inthi_sp 0 0 STACK 2 stack C:\Users\_prossn\AppData\Local\Temp\s438.obj +___intlo_sp 0 0 STACK 2 stack C:\Users\_prossn\AppData\Local\Temp\s438.obj +eusart_write_midi@length 6 0 COMRAM 1 cstackCOMRAM dist/default/production\src.production.obj __Hintcode_body 0 0 ABS 0 intcode_body dist/default/production\src.production.obj __Lintsave_regs 0 0 BIGRAM 1 intsave_regs dist/default/production\src.production.obj _BAUDCONbits FB8 0 ABS 0 - dist/default/production\src.production.obj __Hmediumconst 0 0 MEDIUMCONST 0 mediumconst dist/default/production\src.production.obj __Hintcodelo 0 0 CODE 0 intcodelo dist/default/production\src.production.obj +midi_note_on@note A 0 COMRAM 1 cstackCOMRAM dist/default/production\src.production.obj +__size_of_putch 0 0 ABS 0 - dist/default/production\src.production.obj __Lintcodelo 0 0 CODE 0 intcodelo dist/default/production\src.production.obj __CFG_FCMEN$OFF 0 0 ABS 0 - dist/default/production\src.production.obj -start_initialization 3FE2 0 CODE 0 cinit dist/default/production\src.production.obj +start_initialization 7E60 0 CODE 0 cinit dist/default/production\src.production.obj __CFG_PBADEN$ON 0 0 ABS 0 - dist/default/production\src.production.obj __HnvFARRAM 0 0 FARRAM 0 nvFARRAM dist/default/production\src.production.obj +__size_of_midi_set_status 0 0 ABS 0 - dist/default/production\src.production.obj ___rparam_used 1 0 ABS 0 - dist/default/production\src.production.obj +__end_of_eusart_write_midi 8000 0 CODE 0 text4 dist/default/production\src.production.obj __CFG_WDTPS$32768 0 0 ABS 0 - dist/default/production\src.production.obj _TRISC6 7CA6 0 ABS 0 - dist/default/production\src.production.obj _TRISC7 7CA7 0 ABS 0 - dist/default/production\src.production.obj __Hbank0 0 0 ABS 0 bank0 dist/default/production\src.production.obj __Hbank1 0 0 ABS 0 bank1 dist/default/production\src.production.obj __Hbank2 0 0 ABS 0 bank2 dist/default/production\src.production.obj +__Hbank3 0 0 ABS 0 bank3 dist/default/production\src.production.obj +__Hbank4 0 0 ABS 0 bank4 dist/default/production\src.production.obj +__Hbank5 0 0 ABS 0 bank5 dist/default/production\src.production.obj __Hcinit 0 0 ABS 0 cinit dist/default/production\src.production.obj __Hconst 0 0 CONST 0 const dist/default/production\src.production.obj __Hidata 0 0 CODE 0 idata dist/default/production\src.production.obj @@ -146,14 +201,23 @@ __Hrdata 0 0 COMRAM 1 rdata dist/default/production\src.production.obj __Hstack 0 0 STACK 2 stack dist/default/production\src.production.obj __Htext0 0 0 ABS 0 text0 dist/default/production\src.production.obj __Htext1 0 0 ABS 0 text1 dist/default/production\src.production.obj +__Htext2 0 0 ABS 0 text2 dist/default/production\src.production.obj +__Htext3 0 0 ABS 0 text3 dist/default/production\src.production.obj +__Htext4 0 0 ABS 0 text4 dist/default/production\src.production.obj +__Htext5 0 0 ABS 0 text5 dist/default/production\src.production.obj +__Htext6 0 0 ABS 0 text6 dist/default/production\src.production.obj __Hbigbss 0 0 BIGRAM 1 bigbss dist/default/production\src.production.obj __Hbigram 0 0 ABS 0 bigram dist/default/production\src.production.obj -__smallconst 0 0 SMALLCONST 0 smallconst C:\Users\_prossn\AppData\Local\Temp\s3s8.obj +__smallconst 0 0 SMALLCONST 0 smallconst C:\Users\_prossn\AppData\Local\Temp\s438.obj __Hcomram 0 0 ABS 0 comram dist/default/production\src.production.obj __Hconfig 30000E 0 CONFIG 0 config dist/default/production\src.production.obj +midi_note_on@pkt 6 0 COMRAM 1 cstackCOMRAM dist/default/production\src.production.obj __Lbank0 0 0 ABS 0 bank0 dist/default/production\src.production.obj __Lbank1 0 0 ABS 0 bank1 dist/default/production\src.production.obj __Lbank2 0 0 ABS 0 bank2 dist/default/production\src.production.obj +__Lbank3 0 0 ABS 0 bank3 dist/default/production\src.production.obj +__Lbank4 0 0 ABS 0 bank4 dist/default/production\src.production.obj +__Lbank5 0 0 ABS 0 bank5 dist/default/production\src.production.obj __Lcinit 0 0 ABS 0 cinit dist/default/production\src.production.obj __Lconst 0 0 CONST 0 const dist/default/production\src.production.obj __Lidata 0 0 CODE 0 idata dist/default/production\src.production.obj @@ -164,6 +228,11 @@ __Lrdata 0 0 COMRAM 1 rdata dist/default/production\src.production.obj __Lstack 0 0 STACK 2 stack dist/default/production\src.production.obj __Ltext0 0 0 ABS 0 text0 dist/default/production\src.production.obj __Ltext1 0 0 ABS 0 text1 dist/default/production\src.production.obj +__Ltext2 0 0 ABS 0 text2 dist/default/production\src.production.obj +__Ltext3 0 0 ABS 0 text3 dist/default/production\src.production.obj +__Ltext4 0 0 ABS 0 text4 dist/default/production\src.production.obj +__Ltext5 0 0 ABS 0 text5 dist/default/production\src.production.obj +__Ltext6 0 0 ABS 0 text6 dist/default/production\src.production.obj __Hfarbss 0 0 FARRAM 0 farbss dist/default/production\src.production.obj __Lintcode_body 0 0 ABS 0 intcode_body dist/default/production\src.production.obj __CFG_T3CMX$PORTC0 0 0 ABS 0 - dist/default/production\src.production.obj @@ -186,55 +255,69 @@ __HcstackCOMRAM 0 0 ABS 0 cstackCOMRAM dist/default/production\src.production.ob __Hintret 0 0 ABS 0 intret dist/default/production\src.production.obj __Hirdata 0 0 CODE 0 irdata dist/default/production\src.production.obj __S0 30000E 0 ABS 0 - dist/default/production\src.production.obj -__S1 0 0 ABS 0 - dist/default/production\src.production.obj +__S1 15 0 ABS 0 - dist/default/production\src.production.obj __S2 0 0 ABS 0 - dist/default/production\src.production.obj __Lbigdata 0 0 BIGRAM 1 bigdata dist/default/production\src.production.obj __Hnvrram 0 0 COMRAM 1 nvrram dist/default/production\src.production.obj +_eusart_write_midi 7F78 0 CODE 0 text4 dist/default/production\src.production.obj __CFG_BORV$190 0 0 ABS 0 - dist/default/production\src.production.obj __Lintentry 0 0 ABS 0 intentry dist/default/production\src.production.obj -__Hramtop 300 0 RAM 0 ramtop dist/default/production\src.production.obj +__Hramtop 600 0 RAM 0 ramtop dist/default/production\src.production.obj __Hrparam 0 0 COMRAM 1 rparam dist/default/production\src.production.obj +_midi_note_on 7F02 0 CODE 0 text1 dist/default/production\src.production.obj __CFG_PWRTEN$OFF 0 0 ABS 0 - dist/default/production\src.production.obj __activetblptr 0 0 ABS 0 - dist/default/production\src.production.obj __Hstruct 0 0 COMRAM 1 struct dist/default/production\src.production.obj -__end_of_eusart_init 4000 0 CODE 0 text1 dist/default/production\src.production.obj +__end_of_eusart_init 7E8A 0 CODE 0 text6 dist/default/production\src.production.obj _RCSTAbits FAB 0 ABS 0 - dist/default/production\src.production.obj __CFG_HFOFST$ON 0 0 ABS 0 - dist/default/production\src.production.obj __Lbigbss 0 0 BIGRAM 1 bigbss dist/default/production\src.production.obj __Lbigram 0 0 ABS 0 bigram dist/default/production\src.production.obj +midi_set_channel@pkt 1 0 COMRAM 1 cstackCOMRAM dist/default/production\src.production.obj __Lcomram 0 0 ABS 0 comram dist/default/production\src.production.obj __Lconfig 300000 0 CONFIG 0 config dist/default/production\src.production.obj __CFG_WDTEN$ON 0 0 ABS 0 - dist/default/production\src.production.obj __Lfarbss 0 0 FARRAM 0 farbss dist/default/production\src.production.obj __Lfardata 0 0 FARRAM 0 fardata dist/default/production\src.production.obj -stackhi 2FF 0 ABS 0 - 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ABS 0 cstackCOMRAM dist/default/production\src.production.obj -end_of_initialization 3FE2 0 CODE 0 cinit dist/default/production\src.production.obj +end_of_initialization 7E60 0 CODE 0 cinit dist/default/production\src.production.obj +__end_of_midi_note_on 7F78 0 CODE 0 text1 dist/default/production\src.production.obj __Lnvrram 0 0 COMRAM 1 nvrram dist/default/production\src.production.obj __Hintentry 0 0 ABS 0 intentry dist/default/production\src.production.obj __CFG_STVREN$ON 0 0 ABS 0 - dist/default/production\src.production.obj __Hreset_vec 0 0 CODE 0 reset_vec dist/default/production\src.production.obj -__Lramtop 300 0 RAM 0 ramtop dist/default/production\src.production.obj +__Lramtop 600 0 RAM 0 ramtop dist/default/production\src.production.obj __Lrparam 0 0 COMRAM 1 rparam dist/default/production\src.production.obj -__pcinit 3FE2 0 CODE 0 cinit dist/default/production\src.production.obj -__ptext0 3FDC 0 CODE 0 text0 dist/default/production\src.production.obj -__ptext1 3FE8 0 CODE 0 text1 dist/default/production\src.production.obj +__pcinit 7E60 0 CODE 0 cinit dist/default/production\src.production.obj +__ptext0 7ED4 0 CODE 0 text0 dist/default/production\src.production.obj +__ptext1 7F02 0 CODE 0 text1 dist/default/production\src.production.obj +__ptext2 7E8A 0 CODE 0 text2 dist/default/production\src.production.obj +__ptext3 7EAE 0 CODE 0 text3 dist/default/production\src.production.obj +__ptext4 7F78 0 CODE 0 text4 dist/default/production\src.production.obj +__ptext5 7E66 0 CODE 0 text5 dist/default/production\src.production.obj +__ptext6 7E72 0 CODE 0 text6 dist/default/production\src.production.obj __Lstruct 0 0 COMRAM 1 struct dist/default/production\src.production.obj -__ramtop 300 0 RAM 0 ramtop C:\Users\_prossn\AppData\Local\Temp\s3s8.obj +__ramtop 600 0 RAM 0 ramtop C:\Users\_prossn\AppData\Local\Temp\s438.obj +putch@c 1 0 COMRAM 1 cstackCOMRAM dist/default/production\src.production.obj __Lpowerup 0 0 CODE 0 powerup dist/default/production\src.production.obj __Leeprom_data 0 0 EEDATA 0 eeprom_data dist/default/production\src.production.obj +midi_set_status@pkt 1 0 COMRAM 1 cstackCOMRAM dist/default/production\src.production.obj __Lreset_vec 0 0 CODE 0 reset_vec dist/default/production\src.production.obj ___param_bank 0 0 ABS 0 - dist/default/production\src.production.obj __Hbigdata 0 0 BIGRAM 1 bigdata dist/default/production\src.production.obj -__end_of__initialization 3FE2 0 CODE 0 cinit dist/default/production\src.production.obj +__end_of__initialization 7E60 0 CODE 0 cinit dist/default/production\src.production.obj __CFG_WRT0$OFF 0 0 ABS 0 - dist/default/production\src.production.obj __CFG_WRT1$OFF 0 0 ABS 0 - dist/default/production\src.production.obj __CFG_WRTB$OFF 0 0 ABS 0 - dist/default/production\src.production.obj @@ -243,14 +326,17 @@ __CFG_WRTC$OFF 0 0 ABS 0 - dist/default/production\src.production.obj __CFG_WRTD$OFF 0 0 ABS 0 - dist/default/production\src.production.obj __size_of_eusart_init 0 0 ABS 0 - dist/default/production\src.production.obj __Lclrtext 0 0 ABS 0 clrtext dist/default/production\src.production.obj -__pcstackCOMRAM 0 0 COMRAM 1 cstackCOMRAM dist/default/production\src.production.obj +__end_of_midi_set_channel 7ED4 0 CODE 0 text3 dist/default/production\src.production.obj +__pcstackCOMRAM 1 0 COMRAM 1 cstackCOMRAM dist/default/production\src.production.obj __CFG_FOSC$ECHPIO6 0 0 ABS 0 - dist/default/production\src.production.obj _TXSTAbits FAC 0 ABS 0 - dist/default/production\src.production.obj +__size_of_midi_set_channel 0 0 ABS 0 - dist/default/production\src.production.obj __CFG_BOREN$SBORDIS 0 0 ABS 0 - dist/default/production\src.production.obj -__end_of_main 3FE2 0 CODE 0 text0 dist/default/production\src.production.obj +__end_of_main 7F02 0 CODE 0 text0 dist/default/production\src.production.obj _RCREG FAE 0 ABS 0 - dist/default/production\src.production.obj _SPBRG FAF 0 ABS 0 - dist/default/production\src.production.obj _TXREG FAD 0 ABS 0 - dist/default/production\src.production.obj +__end_of_putch 7E72 0 CODE 0 text5 dist/default/production\src.production.obj __CFG_CP0$OFF 0 0 ABS 0 - dist/default/production\src.production.obj __CFG_CP1$OFF 0 0 ABS 0 - dist/default/production\src.production.obj __HRAM 0 0 ABS 0 - dist/default/production\src.production.obj @@ -263,13 +349,16 @@ __Lram 0 0 ABS 0 ram dist/default/production\src.production.obj __Lsfr 0 0 ABS 0 sfr dist/default/production\src.production.obj __CFG_PLLCFG$OFF 0 0 ABS 0 - dist/default/production\src.production.obj __CFG_CPB$OFF 0 0 ABS 0 - dist/default/production\src.production.obj +_putch 7E66 0 CODE 0 text5 dist/default/production\src.production.obj __CFG_CPD$OFF 0 0 ABS 0 - dist/default/production\src.production.obj -__initialization 3FE2 0 CODE 0 cinit dist/default/production\src.production.obj +main@sample_message E 0 COMRAM 1 cstackCOMRAM dist/default/production\src.production.obj +__initialization 7E60 0 CODE 0 cinit dist/default/production\src.production.obj __Hfardata 0 0 FARRAM 0 fardata dist/default/production\src.production.obj __Hsmallconst 0 0 SMALLCONST 0 smallconst dist/default/production\src.production.obj __Lifardata 0 0 CODE 0 ifardata dist/default/production\src.production.obj __Hintsave_regs 0 0 BIGRAM 1 intsave_regs dist/default/production\src.production.obj __CFG_MCLRE$EXTMCLR 0 0 ABS 0 - dist/default/production\src.production.obj +midi_set_channel@channel 3 0 COMRAM 1 cstackCOMRAM dist/default/production\src.production.obj __Hintcode 0 0 CODE 0 intcode dist/default/production\src.production.obj # %SPLITSTAB Section # This section enumerates all the psect splits performed by the assembler. @@ -295,9 +384,15 @@ __Hintcode 0 0 CODE 0 intcode dist/default/production\src.production.obj # and size are in units of delta. The file address is in units of bytes. # All other numeric quantities are in decimal. %SEGMENTS -cinit 0 3FE2 3FE2 6 1 +cinit 0 7E60 7E60 6 1 idloc 0 200000 200000 8 1 -text0 0 3FDC 3FDC 6 1 -text1 0 3FE8 3FE8 18 1 +text0 0 7ED4 7ED4 2E 1 +text1 0 7F02 7F02 76 1 +text2 0 7E8A 7E8A 24 1 +text3 0 7EAE 7EAE 26 1 +text4 0 7F78 7F78 88 1 +text5 0 7E66 7E66 C 1 +text6 0 7E72 7E72 18 1 +cstackCOMRAM 1 1 1 14 1 reset_vec 0 0 0 4 1 config 0 300000 300000 E 1 diff --git a/src/dist/default/production/src.production.elf b/src/dist/default/production/src.production.elf index ad946ca..23490b8 100644 Binary files a/src/dist/default/production/src.production.elf and b/src/dist/default/production/src.production.elf differ diff --git a/src/dist/default/production/src.production.hex b/src/dist/default/production/src.production.hex index a2c4ce5..126724a 100644 --- a/src/dist/default/production/src.production.hex +++ b/src/dist/default/production/src.production.hex @@ -1,9 +1,32 @@ -:04000000F1EF1FF00D -:103FDC00F4EC1FF0FFD70001EEEF1FF0AC98AC9C97 -:103FEC00AB8E810EAF6EAC84B896948E948CAB88ED -:043FFC00AC8A120079 +:0400000030EF3FF0AE +:107E600000016AEF3FF0016E9EA8FED701C0ADFF92 +:107E70001200AC98AC9CAB8E810EAF6EAC84B89601 +:107E8000948E948CAB88AC8A120001500210D8B446 +:107E9000120003C004F00F0E041601C0D9FF02C087 +:107EA000DAFFDF500418F00B0418DF6E12000150E7 +:107EB0000210D8B4120003C005F00F0E051601C061 +:107EC000D9FF02C0DAFF053ADF5005180F0B05187D +:107ED000DF6E12000E0E066E000E076E000E096EAB +:107EE000000E086E3C0E0A6E7F0E0B6E81EC3FF0AA +:107EF00039EC3FF00E0E026E000E036EBCEC3FF04C +:107F0000F9D706500710D8B4120006C001F007C018 +:107F100002F0080E036E45EC3FF006C001F007C00A +:107F200002F008C003F009C004F057EC3FF0030E64 +:107F300006240C6E000E07200D6E0C500D10D8B4E8 +:107F4000120020EE03F00650D9260750DA220AC0AC +:107F5000DFFF20EE04F00650D9260750DA220BC0CE +:107F6000DFFF20EE01F00650D9260750DA22020E7C +:107F7000DE6E000EDD6E120002500310D8B4120047 +:107F8000030E0224046E000E0320056E045005103B +:107F9000D8B4120020EE01F00250D9260350DA22A4 +:107FA000DECF06F0DDCF07F0030E0224086E000ED0 +:107FB0000320096E02C0D9FF03C0DAFFDF380F0BC0 +:107FC000046E02C0D9FF03C0DAFFDF500F0B056E4D +:107FD0000538F00B041033EC3FF009D008C0D9FF8E +:107FE00009C0DAFFDF5033EC3FF0084A092A0606E1 +:107FF000D8A007060628F2E10728D8B41200EED769 :020000040020DA :08000000FFFFFFFFFFFFFFFF00 :020000040030CA -:0E000000FF251F3FFFBF85FF03C003E0034045 +:0E000000FF251F3FFFBF85FF0FC00FE00F4021 :00000001FF diff --git a/src/dist/default/production/src.production.hxl b/src/dist/default/production/src.production.hxl index c943d1e..c3f5c51 100644 --- a/src/dist/default/production/src.production.hxl +++ b/src/dist/default/production/src.production.hxl @@ -1,14 +1,14 @@ ### HEXMate logfile and output summary ### ### Memory Usage ### Unused memory ranges: - 4h - 3FDBh - 4000h - 1FFFFFh + 4h - 7E5Fh + 8000h - 1FFFFFh 200008h - 2FFFFFh 30000Eh - 30003Fh dist/default/production\src.production.hex ranges: 0h - 3h - 3FDCh - 3FFFh + 7E60h - 7FFFh 200000h - 200007h 300000h - 30000Dh @@ -25,6 +25,12 @@ X = Find & delete opcode 1 = dist/default/production\src.production.hex 00000000: 1111------------------------------------------------------------ -00003FC0: ----------------------------111111111111111111111111111111111111 +00007E40: --------------------------------11111111111111111111111111111111 +00007E80: 1111111111111111111111111111111111111111111111111111111111111111 +00007EC0: 1111111111111111111111111111111111111111111111111111111111111111 +00007F00: 1111111111111111111111111111111111111111111111111111111111111111 +00007F40: 1111111111111111111111111111111111111111111111111111111111111111 +00007F80: 1111111111111111111111111111111111111111111111111111111111111111 +00007FC0: 1111111111111111111111111111111111111111111111111111111111111111 00200000: 11111111-------------------------------------------------------- 00300000: 11111111111111-------------------------------------------------- diff --git a/src/dist/default/production/src.production.lst b/src/dist/default/production/src.production.lst index 01c9d84..fd44914 100644 --- a/src/dist/default/production/src.production.lst +++ b/src/dist/default/production/src.production.lst @@ -1,10 +1,10 @@ Microchip Technology PIC18 LITE Macro Assembler V1.44 build -154322312 - Mon Jan 08 09:28:26 2018 + Thu Feb 01 17:09:31 2018 Microchip Technology Omniscient Code Generator v1.44 (Free mode) build 201709140600 - 1 processor 18F44K22 + 1 processor 18F45K22 2 fnconf rparam,??,?,0 3 opt pw 120 4 opt lm @@ -12,202 +12,759 @@ Microchip Technology Omniscient Code Generator v1.44 (Free mode) build 201709140 6 psect cstackCOMRAM,global,class=COMRAM,space=1,delta=1,noexec 7 psect text0,global,reloc=2,class=CODE,delta=1 8 psect text1,global,reloc=2,class=CODE,delta=1 - 9 psect intsave_regs,global,class=BIGRAM,space=1,delta=1,noexec - 10 psect rparam,global,class=COMRAM,space=1,delta=1,noexec - 11 0000 - 12 ; Version 1.44 - 13 ; Generated 14/09/2017 GMT - 14 ; - 15 ; Copyright © 2017, Microchip Technology Inc. and its subsidiaries ("Microchip") - 16 ; All rights reserved. - 17 ; - 18 ; This software is developed by Microchip Technology Inc. and its subsidiaries ("Microch - + ip"). + 9 psect text2,global,reloc=2,class=CODE,delta=1 + 10 psect text3,global,reloc=2,class=CODE,delta=1 + 11 psect text4,global,reloc=2,class=CODE,delta=1 + 12 psect text5,global,reloc=2,class=CODE,delta=1 + 13 psect text6,global,reloc=2,class=CODE,delta=1 + 14 psect intsave_regs,global,class=BIGRAM,space=1,delta=1,noexec + 15 psect rparam,global,class=COMRAM,space=1,delta=1,noexec + 16 0000 + 17 ; Version 1.44 + 18 ; Generated 14/09/2017 GMT 19 ; - 20 ; Redistribution and use in source and binary forms, with or without modification, are - 21 ; permitted provided that the following conditions are met: + 20 ; Copyright © 2017, Microchip Technology Inc. and its subsidiaries ("Microchip") + 21 ; All rights reserved. 22 ; - 23 ; 1. Redistributions of source code must retain the above copyright notice, this lis + 23 ; This software is developed by Microchip Technology Inc. and its subsidiaries ("Microch + + ip"). + 24 ; + 25 ; Redistribution and use in source and binary forms, with or without modification, are + 26 ; permitted provided that the following conditions are met: + 27 ; + 28 ; 1. Redistributions of source code must retain the above copyright notice, this lis + t of - 24 ; conditions and the following disclaimer. - 25 ; - 26 ; 2. Redistributions in binary form must reproduce the above copyright notice, this + 29 ; conditions and the following disclaimer. + 30 ; + 31 ; 2. Redistributions in binary form must reproduce the above copyright notice, this + list - 27 ; of conditions and the following disclaimer in the documentation and/or other - 28 ; materials provided with the distribution. - 29 ; - 30 ; 3. Microchip's name may not be used to endorse or promote products derived from th + 32 ; of conditions and the following disclaimer in the documentation and/or other + 33 ; materials provided with the distribution. + 34 ; + 35 ; 3. Microchip's name may not be used to endorse or promote products derived from th + is - 31 ; software without specific prior written permission. - 32 ; - 33 ; THIS SOFTWARE IS PROVIDED BY MICROCHIP "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - 34 ; INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS F + 36 ; software without specific prior written permission. + 37 ; + 38 ; THIS SOFTWARE IS PROVIDED BY MICROCHIP "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + 39 ; INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS F + OR - 35 ; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MICROCHIP BE LIABLE FOR ANY DIRECT, INDIREC + 40 ; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MICROCHIP BE LIABLE FOR ANY DIRECT, INDIREC + T, - 36 ; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING BUT NOT LIMITED TO - 37 ; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA OR PROFITS; OR BUSINESS - 38 ; INTERRUPTION) HOWSOEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, ST + 41 ; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING BUT NOT LIMITED TO + 42 ; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA OR PROFITS; OR BUSINESS + 43 ; INTERRUPTION) HOWSOEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, ST + RICT - 39 ; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE U + 44 ; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE U + SE OF - 40 ; THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 41 ; - 42 ; - 43 ; Code-generator required, PIC18F44K22 Definitions - 44 ; - 45 ; SFR Addresses - 46 0000 _RCREG set 4014 - 47 0000 _TXREG set 4013 - 48 0000 _BAUDCONbits set 4024 - 49 0000 _SPBRG set 4015 - 50 0000 _RCSTAbits set 4011 - 51 0000 _TXSTAbits set 4012 - 52 0000 _RCIF set 31989 - 53 0000 _TXIF set 31988 - 54 0000 _TRISC6 set 31910 - 55 0000 _TRISC7 set 31911 - 56 - 57 ; #config settings - 58 0000 - 59 psect cinit - 60 003FE2 __pcinit: - 61 opt stack 0 - 62 003FE2 start_initialization: - 63 opt stack 0 - 64 003FE2 __initialization: - 65 opt stack 0 - 66 003FE2 end_of_initialization: - 67 opt stack 0 - 68 003FE2 __end_of__initialization: - 69 opt stack 0 - 70 003FE2 0100 movlb 0 - 71 003FE4 EFEE F01F goto _main ;jump to C main() function - 72 - 73 psect cstackCOMRAM - 74 000000 __pcstackCOMRAM: - 75 opt stack 0 - 76 000000 - 77 ; 1 bytes @ 0x0 - 78 ;; - 79 ;;Main: autosize = 0, tempsize = 0, incstack = 0, save=0 - 80 ;; - 81 ;; *************** function _main ***************** - 82 ;; Defined at: - 83 ;; line 83 in file "main.c" - 84 ;; Parameters: Size Location Type - 85 ;; None - 86 ;; Auto vars: Size Location Type - 87 ;; None - 88 ;; Return value: Size Location Type - 89 ;; 1 wreg void - 90 ;; Registers used: - 91 ;; wreg, status,2, cstack - 92 ;; Tracked objects: - 93 ;; On entry : 0/0 - 94 ;; On exit : 0/0 - 95 ;; Unchanged: 0/0 - 96 ;; Data sizes: COMRAM BANK0 BANK1 BANK2 - 97 ;; Params: 0 0 0 0 - 98 ;; Locals: 0 0 0 0 - 99 ;; Temps: 0 0 0 0 - 100 ;; Totals: 0 0 0 0 - 101 ;;Total ram usage: 0 bytes - 102 ;; Hardware stack levels required when called: 1 - 103 ;; This function calls: - 104 ;; _eusart_init - 105 ;; This function is called by: - 106 ;; Startup code after reset - 107 ;; This function uses a non-reentrant model - 108 ;; - 109 - 110 psect text0 - 111 003FDC __ptext0: + 45 ; THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + 46 ; + 47 ; + 48 ; Code-generator required, PIC18F45K22 Definitions + 49 ; + 50 ; SFR Addresses + 51 0000 _RCREG set 4014 + 52 0000 _TXREG set 4013 + 53 0000 _BAUDCONbits set 4024 + 54 0000 _SPBRG set 4015 + 55 0000 _RCSTAbits set 4011 + 56 0000 _TXSTAbits set 4012 + 57 0000 _RCIF set 31989 + 58 0000 _TXIF set 31988 + 59 0000 _TRISC6 set 31910 + 60 0000 _TRISC7 set 31911 + 61 + 62 ; #config settings + 63 0000 + 64 psect cinit + 65 007E60 __pcinit: + 66 opt stack 0 + 67 007E60 start_initialization: + 68 opt stack 0 + 69 007E60 __initialization: + 70 opt stack 0 + 71 007E60 end_of_initialization: + 72 opt stack 0 + 73 007E60 __end_of__initialization: + 74 opt stack 0 + 75 007E60 0100 movlb 0 + 76 007E62 EF6A F03F goto _main ;jump to C main() function + 77 + 78 psect cstackCOMRAM + 79 000001 __pcstackCOMRAM: + 80 opt stack 0 + 81 000001 putch@c: + 82 opt stack 0 + 83 000001 midi_set_status@pkt: + 84 opt stack 0 + 85 000001 midi_set_channel@pkt: + 86 opt stack 0 + 87 + 88 ; 2 bytes @ 0x0 + 89 000001 ds 1 + 90 000002 eusart_write_midi@pkt: + 91 opt stack 0 + 92 + 93 ; 2 bytes @ 0x1 + 94 000002 ds 1 + 95 000003 midi_set_status@status: + 96 opt stack 0 + 97 000003 midi_set_channel@channel: + 98 opt stack 0 + 99 + 100 ; 2 bytes @ 0x2 + 101 000003 ds 1 + 102 000004 ??_eusart_write_midi: + 103 000004 ??_midi_set_status: + 104 + 105 ; 1 bytes @ 0x3 + 106 000004 ds 1 + 107 000005 ??_midi_set_channel: + 108 + 109 ; 1 bytes @ 0x4 + 110 000005 ds 1 + 111 000006 eusart_write_midi@length: 112 opt stack 0 - 113 003FDC _main: - 114 opt stack 30 + 113 000006 midi_note_on@pkt: + 114 opt stack 0 115 - 116 ;main.c: 85: eusart_init(); - 117 - 118 ;incstack = 0 - 119 003FDC ECF4 F01F call _eusart_init ;wreg free - 120 003FE0 l7: - 121 003FE0 D7FF goto l7 - 122 003FE2 __end_of_main: - 123 opt stack 0 - 124 - 125 ;; *************** function _eusart_init ***************** - 126 ;; Defined at: - 127 ;; line 4 in file "rs232.c" - 128 ;; Parameters: Size Location Type - 129 ;; None - 130 ;; Auto vars: Size Location Type - 131 ;; None - 132 ;; Return value: Size Location Type - 133 ;; 1 wreg void - 134 ;; Registers used: - 135 ;; wreg, status,2 - 136 ;; Tracked objects: - 137 ;; On entry : 0/0 - 138 ;; On exit : 0/0 - 139 ;; Unchanged: 0/0 - 140 ;; Data sizes: COMRAM BANK0 BANK1 BANK2 - 141 ;; Params: 0 0 0 0 - 142 ;; Locals: 0 0 0 0 - 143 ;; Temps: 0 0 0 0 - 144 ;; Totals: 0 0 0 0 - 145 ;;Total ram usage: 0 bytes - 146 ;; Hardware stack levels used: 1 - 147 ;; This function calls: - 148 ;; Nothing - 149 ;; This function is called by: - 150 ;; _main - 151 ;; This function uses a non-reentrant model - 152 ;; - 153 - 154 psect text1 - 155 003FE8 __ptext1: - 156 opt stack 0 - 157 003FE8 _eusart_init: - 158 opt stack 30 - 159 - 160 ;rs232.c: 7: TXSTAbits.SYNC = 0; - 161 - 162 ;incstack = 0 - 163 003FE8 98AC bcf 4012,4,c ;volatile - 164 - 165 ;rs232.c: 8: TXSTAbits.TX9 = 0; - 166 003FEA 9CAC bcf 4012,6,c ;volatile - 167 - 168 ;rs232.c: 11: RCSTAbits.SPEN = 1; - 169 003FEC 8EAB bsf 4011,7,c ;volatile - 170 - 171 ;rs232.c: 12: SPBRG = 129; - 172 003FEE 0E81 movlw 129 - 173 003FF0 6EAF movwf 4015,c ;volatile - 174 - 175 ;rs232.c: 13: TXSTAbits.BRGH = 1; - 176 003FF2 84AC bsf 4012,2,c ;volatile - 177 - 178 ;rs232.c: 14: BAUDCONbits.BRG16 = 0; - 179 003FF4 96B8 bcf 4024,3,c ;volatile - 180 - 181 ;rs232.c: 17: TRISC7 = 1; - 182 003FF6 8E94 bsf 3988,7,c ;volatile - 183 - 184 ;rs232.c: 18: TRISC6 = 1; - 185 003FF8 8C94 bsf 3988,6,c ;volatile - 186 - 187 ;rs232.c: 19: RCSTAbits.CREN = 1; - 188 003FFA 88AB bsf 4011,4,c ;volatile - 189 - 190 ;rs232.c: 20: TXSTAbits.TXEN = 1; - 191 003FFC 8AAC bsf 4012,5,c ;volatile - 192 003FFE 0012 return ;funcret - 193 004000 __end_of_eusart_init: - 194 opt stack 0 - 195 0000 - 196 psect rparam + 116 ; 2 bytes @ 0x5 + 117 000006 ds 2 + 118 000008 eusart_write_midi@data: + 119 opt stack 0 + 120 000008 midi_note_on@channel: + 121 opt stack 0 + 122 + 123 ; 2 bytes @ 0x7 + 124 000008 ds 2 + 125 00000A midi_note_on@note: + 126 opt stack 0 + 127 + 128 ; 1 bytes @ 0x9 + 129 00000A ds 1 + 130 00000B midi_note_on@velocity: + 131 opt stack 0 + 132 + 133 ; 1 bytes @ 0xA + 134 00000B ds 1 + 135 00000C ??_midi_note_on: + 136 + 137 ; 1 bytes @ 0xB + 138 00000C ds 2 + 139 00000E main@sample_message: + 140 opt stack 0 + 141 + 142 ; 7 bytes @ 0xD + 143 00000E ds 7 + 144 + 145 ;; + 146 ;;Main: autosize = 0, tempsize = 0, incstack = 0, save=0 + 147 ;; + 148 ;; *************** function _main ***************** + 149 ;; Defined at: + 150 ;; line 105 in file "main.c" + 151 ;; Parameters: Size Location Type + 152 ;; None + 153 ;; Auto vars: Size Location Type + 154 ;; sample_messa 7 13[COMRAM] struct . + 155 ;; Return value: Size Location Type + 156 ;; 1 wreg void + 157 ;; Registers used: + 158 ;; wreg, fsr2l, fsr2h, status,2, status,0, cstack + 159 ;; Tracked objects: + 160 ;; On entry : 0/0 + 161 ;; On exit : 0/0 + 162 ;; Unchanged: 0/0 + 163 ;; Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 + 164 ;; Params: 0 0 0 0 0 0 0 + 165 ;; Locals: 7 0 0 0 0 0 0 + 166 ;; Temps: 0 0 0 0 0 0 0 + 167 ;; Totals: 7 0 0 0 0 0 0 + 168 ;;Total ram usage: 7 bytes + 169 ;; Hardware stack levels required when called: 2 + 170 ;; This function calls: + 171 ;; _eusart_init + 172 ;; _eusart_write_midi + 173 ;; _midi_note_on + 174 ;; This function is called by: + 175 ;; Startup code after reset + 176 ;; This function uses a non-reentrant model + 177 ;; + 178 + 179 psect text0 + 180 007ED4 __ptext0: + 181 opt stack 0 + 182 007ED4 _main: + 183 opt stack 29 + 184 + 185 ;main.c: 107: midi_message_t sample_message; + 186 ;main.c: 108: midi_note_on(&sample_message, 0x0, 0x3C, 0x7F); + 187 + 188 ;incstack = 0 + 189 007ED4 0E0E movlw low main@sample_message + 190 007ED6 6E06 movwf midi_note_on@pkt,c + 191 007ED8 0E00 movlw high main@sample_message + 192 007EDA 6E07 movwf midi_note_on@pkt+1,c + 193 007EDC 0E00 movlw 0 + 194 007EDE 6E09 movwf midi_note_on@channel+1,c + 195 007EE0 0E00 movlw 0 + 196 007EE2 6E08 movwf midi_note_on@channel,c + 197 007EE4 0E3C movlw 60 + 198 007EE6 6E0A movwf midi_note_on@note,c + 199 007EE8 0E7F movlw 127 + 200 007EEA 6E0B movwf midi_note_on@velocity,c + 201 007EEC EC81 F03F call _midi_note_on ;wreg free + 202 + 203 ;main.c: 110: eusart_init(); + 204 007EF0 EC39 F03F call _eusart_init ;wreg free + 205 007EF4 + 206 ;main.c: 114: eusart_write_midi(&sample_message); + 207 007EF4 0E0E movlw low main@sample_message + 208 007EF6 6E02 movwf eusart_write_midi@pkt,c + 209 007EF8 0E00 movlw high main@sample_message + 210 007EFA 6E03 movwf eusart_write_midi@pkt+1,c + 211 007EFC ECBC F03F call _eusart_write_midi ;wreg free + 212 007F00 D7F9 goto l19 + 213 007F02 __end_of_main: + 214 opt stack 0 + 215 + 216 ;; *************** function _midi_note_on ***************** + 217 ;; Defined at: + 218 ;; line 64 in file "midi.c" + 219 ;; Parameters: Size Location Type + 220 ;; pkt 2 5[COMRAM] PTR struct . + 221 ;; -> main@sample_message(7), + 222 ;; channel 2 7[COMRAM] unsigned int + 223 ;; note 1 9[COMRAM] enum E31 + 224 ;; velocity 1 10[COMRAM] unsigned char + 225 ;; Auto vars: Size Location Type + 226 ;; None + 227 ;; Return value: Size Location Type + 228 ;; 2 5[COMRAM] int + 229 ;; Registers used: + 230 ;; wreg, fsr2l, fsr2h, status,2, status,0, cstack + 231 ;; Tracked objects: + 232 ;; On entry : 0/0 + 233 ;; On exit : 0/0 + 234 ;; Unchanged: 0/0 + 235 ;; Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 + 236 ;; Params: 6 0 0 0 0 0 0 + 237 ;; Locals: 0 0 0 0 0 0 0 + 238 ;; Temps: 2 0 0 0 0 0 0 + 239 ;; Totals: 8 0 0 0 0 0 0 + 240 ;;Total ram usage: 8 bytes + 241 ;; Hardware stack levels used: 1 + 242 ;; Hardware stack levels required when called: 1 + 243 ;; This function calls: + 244 ;; _midi_set_channel + 245 ;; _midi_set_status + 246 ;; This function is called by: + 247 ;; _main + 248 ;; This function uses a non-reentrant model + 249 ;; + 250 + 251 psect text1 + 252 007F02 __ptext1: + 253 opt stack 0 + 254 007F02 _midi_note_on: + 255 opt stack 29 + 256 + 257 ;midi.c: 66: if (pkt == (0)) { + 258 + 259 ;incstack = 0 + 260 007F02 5006 movf midi_note_on@pkt,w,c + 261 007F04 1007 iorwf midi_note_on@pkt+1,w,c + 262 007F06 B4D8 btfsc status,2,c + 263 007F08 0012 return + 264 + 265 ;midi.c: 68: } + 266 ;midi.c: 70: midi_set_status(pkt, NOTE_ON); + 267 + 268 ;midi.c: 67: return -1; + 269 ; Return value of _midi_note_on is never used + 270 007F0A C006 F001 movff midi_note_on@pkt,midi_set_status@pkt + 271 007F0E C007 F002 movff midi_note_on@pkt+1,midi_set_status@pkt+1 + 272 007F12 0E08 movlw 8 + 273 007F14 6E03 movwf midi_set_status@status,c + 274 007F16 EC45 F03F call _midi_set_status ;wreg free + 275 + 276 ;midi.c: 71: midi_set_channel(pkt, channel); + 277 007F1A C006 F001 movff midi_note_on@pkt,midi_set_channel@pkt + 278 007F1E C007 F002 movff midi_note_on@pkt+1,midi_set_channel@pkt+1 + 279 007F22 C008 F003 movff midi_note_on@channel,midi_set_channel@channel + 280 007F26 C009 F004 movff midi_note_on@channel+1,midi_set_channel@channel+1 + 281 007F2A EC57 F03F call _midi_set_channel ;wreg free + 282 + 283 ;midi.c: 73: if (pkt->data == (0)) { + 284 007F2E 0E03 movlw 3 + 285 007F30 2406 addwf midi_note_on@pkt,w,c + 286 007F32 6E0C movwf ??_midi_note_on& (0+255),c + 287 007F34 0E00 movlw 0 + 288 007F36 2007 addwfc midi_note_on@pkt+1,w,c + 289 007F38 6E0D movwf (??_midi_note_on+1)& (0+255),c + 290 007F3A 500C movf ??_midi_note_on,w,c + 291 007F3C 100D iorwf ??_midi_note_on+1,w,c + 292 007F3E B4D8 btfsc status,2,c + 293 007F40 0012 return + 294 + 295 ;midi.c: 75: } + 296 ;midi.c: 77: pkt->data[0] = note; + 297 + 298 ;midi.c: 74: return -2; + 299 ; Return value of _midi_note_on is never used + 300 007F42 EE20 F003 lfsr 2,3 + 301 007F46 5006 movf midi_note_on@pkt,w,c + 302 007F48 26D9 addwf fsr2l,f,c + 303 007F4A 5007 movf midi_note_on@pkt+1,w,c + 304 007F4C 22DA addwfc fsr2h,f,c + 305 007F4E C00A FFDF movff midi_note_on@note,indf2 + 306 + 307 ;midi.c: 78: pkt->data[1] = velocity; + 308 007F52 EE20 F004 lfsr 2,4 + 309 007F56 5006 movf midi_note_on@pkt,w,c + 310 007F58 26D9 addwf fsr2l,f,c + 311 007F5A 5007 movf midi_note_on@pkt+1,w,c + 312 007F5C 22DA addwfc fsr2h,f,c + 313 007F5E C00B FFDF movff midi_note_on@velocity,indf2 + 314 + 315 ;midi.c: 81: pkt->data_size = 2; + 316 007F62 EE20 F001 lfsr 2,1 + 317 007F66 5006 movf midi_note_on@pkt,w,c + 318 007F68 26D9 addwf fsr2l,f,c + 319 007F6A 5007 movf midi_note_on@pkt+1,w,c + 320 007F6C 22DA addwfc fsr2h,f,c + 321 007F6E 0E02 movlw 2 + 322 007F70 6EDE movwf postinc2,c + 323 007F72 0E00 movlw 0 + 324 007F74 6EDD movwf postdec2,c + 325 007F76 0012 return + 326 007F78 __end_of_midi_note_on: + 327 opt stack 0 + 328 indf2 equ 0xFDF + 329 postinc2 equ 0xFDE + 330 postdec2 equ 0xFDD + 331 fsr2h equ 0xFDA + 332 fsr2l equ 0xFD9 + 333 status equ 0xFD8 + 334 + 335 ;; *************** function _midi_set_status ***************** + 336 ;; Defined at: + 337 ;; line 42 in file "midi.c" + 338 ;; Parameters: Size Location Type + 339 ;; pkt 2 0[COMRAM] PTR struct . + 340 ;; -> main@sample_message(7), + 341 ;; status 1 2[COMRAM] enum E40 + 342 ;; Auto vars: Size Location Type + 343 ;; None + 344 ;; Return value: Size Location Type + 345 ;; 2 0[COMRAM] int + 346 ;; Registers used: + 347 ;; wreg, fsr2l, fsr2h, status,2, status,0 + 348 ;; Tracked objects: + 349 ;; On entry : 0/0 + 350 ;; On exit : 0/0 + 351 ;; Unchanged: 0/0 + 352 ;; Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 + 353 ;; Params: 3 0 0 0 0 0 0 + 354 ;; Locals: 0 0 0 0 0 0 0 + 355 ;; Temps: 1 0 0 0 0 0 0 + 356 ;; Totals: 4 0 0 0 0 0 0 + 357 ;;Total ram usage: 4 bytes + 358 ;; Hardware stack levels used: 1 + 359 ;; This function calls: + 360 ;; Nothing + 361 ;; This function is called by: + 362 ;; _midi_note_on + 363 ;; _midi_note_off + 364 ;; This function uses a non-reentrant model + 365 ;; + 366 + 367 psect text2 + 368 007E8A __ptext2: + 369 opt stack 0 + 370 007E8A _midi_set_status: + 371 opt stack 29 + 372 + 373 ;midi.c: 44: if (pkt == (0)) { + 374 + 375 ;incstack = 0 + 376 007E8A 5001 movf midi_set_status@pkt,w,c + 377 007E8C 1002 iorwf midi_set_status@pkt+1,w,c + 378 007E8E B4D8 btfsc status,2,c + 379 007E90 0012 return + 380 + 381 ;midi.c: 46: } + 382 ;midi.c: 48: pkt->status = status & 0x0F; + 383 + 384 ;midi.c: 45: return -1; + 385 ; Return value of _midi_set_status is never used + 386 007E92 C003 F004 movff midi_set_status@status,??_midi_set_status + 387 007E96 0E0F movlw 15 + 388 007E98 1604 andwf ??_midi_set_status,f,c + 389 007E9A C001 FFD9 movff midi_set_status@pkt,fsr2l + 390 007E9E C002 FFDA movff midi_set_status@pkt+1,fsr2h + 391 007EA2 50DF movf indf2,w,c + 392 007EA4 1804 xorwf ??_midi_set_status,w,c + 393 007EA6 0BF0 andlw -16 + 394 007EA8 1804 xorwf ??_midi_set_status,w,c + 395 007EAA 6EDF movwf indf2,c + 396 007EAC 0012 return + 397 007EAE __end_of_midi_set_status: + 398 opt stack 0 + 399 indf2 equ 0xFDF + 400 postinc2 equ 0xFDE + 401 postdec2 equ 0xFDD + 402 fsr2h equ 0xFDA + 403 fsr2l equ 0xFD9 + 404 status equ 0xFD8 + 405 + 406 ;; *************** function _midi_set_channel ***************** + 407 ;; Defined at: + 408 ;; line 53 in file "midi.c" + 409 ;; Parameters: Size Location Type + 410 ;; pkt 2 0[COMRAM] PTR struct . + 411 ;; -> main@sample_message(7), + 412 ;; channel 2 2[COMRAM] unsigned int + 413 ;; Auto vars: Size Location Type + 414 ;; None + 415 ;; Return value: Size Location Type + 416 ;; 2 0[COMRAM] int + 417 ;; Registers used: + 418 ;; wreg, fsr2l, fsr2h, status,2, status,0 + 419 ;; Tracked objects: + 420 ;; On entry : 0/0 + 421 ;; On exit : 0/0 + 422 ;; Unchanged: 0/0 + 423 ;; Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 + 424 ;; Params: 4 0 0 0 0 0 0 + 425 ;; Locals: 0 0 0 0 0 0 0 + 426 ;; Temps: 1 0 0 0 0 0 0 + 427 ;; Totals: 5 0 0 0 0 0 0 + 428 ;;Total ram usage: 5 bytes + 429 ;; Hardware stack levels used: 1 + 430 ;; This function calls: + 431 ;; Nothing + 432 ;; This function is called by: + 433 ;; _midi_note_on + 434 ;; _midi_note_off + 435 ;; This function uses a non-reentrant model + 436 ;; + 437 + 438 psect text3 + 439 007EAE __ptext3: + 440 opt stack 0 + 441 007EAE _midi_set_channel: + 442 opt stack 29 + 443 + 444 ;midi.c: 55: if (pkt == (0)) { + 445 + 446 ;incstack = 0 + 447 007EAE 5001 movf midi_set_channel@pkt,w,c + 448 007EB0 1002 iorwf midi_set_channel@pkt+1,w,c + 449 007EB2 B4D8 btfsc status,2,c + 450 007EB4 0012 return + 451 + 452 ;midi.c: 57: } + 453 ;midi.c: 59: pkt->channel = channel & 0x0F; + 454 + 455 ;midi.c: 56: return -1; + 456 ; Return value of _midi_set_channel is never used + 457 007EB6 C003 F005 movff midi_set_channel@channel,??_midi_set_channel + 458 007EBA 0E0F movlw 15 + 459 007EBC 1605 andwf ??_midi_set_channel,f,c + 460 007EBE C001 FFD9 movff midi_set_channel@pkt,fsr2l + 461 007EC2 C002 FFDA movff midi_set_channel@pkt+1,fsr2h + 462 007EC6 3A05 swapf ??_midi_set_channel,f,c + 463 007EC8 50DF movf indf2,w,c + 464 007ECA 1805 xorwf ??_midi_set_channel,w,c + 465 007ECC 0B0F andlw -241 + 466 007ECE 1805 xorwf ??_midi_set_channel,w,c + 467 007ED0 6EDF movwf indf2,c + 468 007ED2 0012 return + 469 007ED4 __end_of_midi_set_channel: + 470 opt stack 0 + 471 indf2 equ 0xFDF + 472 postinc2 equ 0xFDE + 473 postdec2 equ 0xFDD + 474 fsr2h equ 0xFDA + 475 fsr2l equ 0xFD9 + 476 status equ 0xFD8 + 477 + 478 ;; *************** function _eusart_write_midi ***************** + 479 ;; Defined at: + 480 ;; line 81 in file "main.c" + 481 ;; Parameters: Size Location Type + 482 ;; pkt 2 1[COMRAM] PTR struct . + 483 ;; -> main@sample_message(7), + 484 ;; Auto vars: Size Location Type + 485 ;; data 2 7[COMRAM] PTR unsigned char + 486 ;; -> sample_message.data(4), main@sample_message(7), + 487 ;; length 2 5[COMRAM] unsigned int + 488 ;; Return value: Size Location Type + 489 ;; 2 1[COMRAM] int + 490 ;; Registers used: + 491 ;; wreg, fsr2l, fsr2h, status,2, status,0, cstack + 492 ;; Tracked objects: + 493 ;; On entry : 0/0 + 494 ;; On exit : 0/0 + 495 ;; Unchanged: 0/0 + 496 ;; Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 + 497 ;; Params: 2 0 0 0 0 0 0 + 498 ;; Locals: 4 0 0 0 0 0 0 + 499 ;; Temps: 2 0 0 0 0 0 0 + 500 ;; Totals: 8 0 0 0 0 0 0 + 501 ;;Total ram usage: 8 bytes + 502 ;; Hardware stack levels used: 1 + 503 ;; Hardware stack levels required when called: 1 + 504 ;; This function calls: + 505 ;; _putch + 506 ;; This function is called by: + 507 ;; _main + 508 ;; This function uses a non-reentrant model + 509 ;; + 510 + 511 psect text4 + 512 007F78 __ptext4: + 513 opt stack 0 + 514 007F78 _eusart_write_midi: + 515 opt stack 29 + 516 + 517 ;main.c: 83: if (pkt == (0)) { + 518 + 519 ;incstack = 0 + 520 007F78 5002 movf eusart_write_midi@pkt,w,c + 521 007F7A 1003 iorwf eusart_write_midi@pkt+1,w,c + 522 007F7C B4D8 btfsc status,2,c + 523 007F7E 0012 return + 524 + 525 ;main.c: 85: } + 526 ;main.c: 87: if (pkt->data == (0)) { + 527 + 528 ;main.c: 84: return -1; + 529 ; Return value of _eusart_write_midi is never used + 530 007F80 0E03 movlw 3 + 531 007F82 2402 addwf eusart_write_midi@pkt,w,c + 532 007F84 6E04 movwf ??_eusart_write_midi& (0+255),c + 533 007F86 0E00 movlw 0 + 534 007F88 2003 addwfc eusart_write_midi@pkt+1,w,c + 535 007F8A 6E05 movwf (??_eusart_write_midi+1)& (0+255),c + 536 007F8C 5004 movf ??_eusart_write_midi,w,c + 537 007F8E 1005 iorwf ??_eusart_write_midi+1,w,c + 538 007F90 B4D8 btfsc status,2,c + 539 007F92 0012 return + 540 + 541 ;main.c: 89: } + 542 ;main.c: 91: size_t length = pkt->data_size; + 543 + 544 ;main.c: 88: return -2; + 545 ; Return value of _eusart_write_midi is never used + 546 007F94 EE20 F001 lfsr 2,1 + 547 007F98 5002 movf eusart_write_midi@pkt,w,c + 548 007F9A 26D9 addwf fsr2l,f,c + 549 007F9C 5003 movf eusart_write_midi@pkt+1,w,c + 550 007F9E 22DA addwfc fsr2h,f,c + 551 007FA0 CFDE F006 movff postinc2,eusart_write_midi@length + 552 007FA4 CFDD F007 movff postdec2,eusart_write_midi@length+1 + 553 + 554 ;main.c: 92: uint8_t *data = pkt->data; + 555 007FA8 0E03 movlw 3 + 556 007FAA 2402 addwf eusart_write_midi@pkt,w,c + 557 007FAC 6E08 movwf eusart_write_midi@data,c + 558 007FAE 0E00 movlw 0 + 559 007FB0 2003 addwfc eusart_write_midi@pkt+1,w,c + 560 007FB2 6E09 movwf eusart_write_midi@data+1,c + 561 + 562 ;main.c: 94: putch((char)((pkt->status << 4) | pkt->channel)); + 563 007FB4 C002 FFD9 movff eusart_write_midi@pkt,fsr2l + 564 007FB8 C003 FFDA movff eusart_write_midi@pkt+1,fsr2h + 565 007FBC 38DF swapf indf2,w,c + 566 007FBE 0B0F andlw 15 + 567 007FC0 6E04 movwf ??_eusart_write_midi& (0+255),c + 568 007FC2 C002 FFD9 movff eusart_write_midi@pkt,fsr2l + 569 007FC6 C003 FFDA movff eusart_write_midi@pkt+1,fsr2h + 570 007FCA 50DF movf indf2,w,c + 571 007FCC 0B0F andlw 15 + 572 007FCE 6E05 movwf (??_eusart_write_midi+1)& (0+255),c + 573 007FD0 3805 swapf ??_eusart_write_midi+1,w,c + 574 007FD2 0BF0 andlw 240 + 575 007FD4 1004 iorwf ??_eusart_write_midi,w,c + 576 007FD6 EC33 F03F call _putch + 577 + 578 ;main.c: 96: while (length--) { + 579 007FDA D009 goto l12 + 580 007FDC l826: + 581 + 582 ;main.c: 97: putch((char) *(data++)); + 583 007FDC C008 FFD9 movff eusart_write_midi@data,fsr2l + 584 007FE0 C009 FFDA movff eusart_write_midi@data+1,fsr2h + 585 007FE4 50DF movf indf2,w,c + 586 007FE6 EC33 F03F call _putch + 587 007FEA 4A08 infsnz eusart_write_midi@data,f,c + 588 007FEC 2A09 incf eusart_write_midi@data+1,f,c + 589 007FEE l12: + 590 007FEE 0606 decf eusart_write_midi@length,f,c + 591 007FF0 A0D8 btfss status,0,c + 592 007FF2 0607 decf eusart_write_midi@length+1,f,c + 593 007FF4 2806 incf eusart_write_midi@length,w,c + 594 007FF6 E1F2 bnz l826 + 595 007FF8 2807 incf eusart_write_midi@length+1,w,c + 596 007FFA B4D8 btfsc status,2,c + 597 007FFC 0012 return + 598 007FFE D7EE goto l13 + 599 008000 __end_of_eusart_write_midi: + 600 opt stack 0 + 601 indf2 equ 0xFDF + 602 postinc2 equ 0xFDE + 603 postdec2 equ 0xFDD + 604 fsr2h equ 0xFDA + 605 fsr2l equ 0xFD9 + 606 status equ 0xFD8 + 607 + 608 ;; *************** function _putch ***************** + 609 ;; Defined at: + 610 ;; line 23 in file "rs232.c" + 611 ;; Parameters: Size Location Type + 612 ;; c 1 wreg unsigned char + 613 ;; Auto vars: Size Location Type + 614 ;; c 1 0[COMRAM] unsigned char + 615 ;; Return value: Size Location Type + 616 ;; 1 wreg void + 617 ;; Registers used: + 618 ;; wreg + 619 ;; Tracked objects: + 620 ;; On entry : 0/0 + 621 ;; On exit : 0/0 + 622 ;; Unchanged: 0/0 + 623 ;; Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 + 624 ;; Params: 0 0 0 0 0 0 0 + 625 ;; Locals: 1 0 0 0 0 0 0 + 626 ;; Temps: 0 0 0 0 0 0 0 + 627 ;; Totals: 1 0 0 0 0 0 0 + 628 ;;Total ram usage: 1 bytes + 629 ;; Hardware stack levels used: 1 + 630 ;; This function calls: + 631 ;; Nothing + 632 ;; This function is called by: + 633 ;; _eusart_write_midi + 634 ;; _getche + 635 ;; This function uses a non-reentrant model + 636 ;; + 637 + 638 psect text5 + 639 007E66 __ptext5: + 640 opt stack 0 + 641 007E66 _putch: + 642 opt stack 29 + 643 + 644 ;incstack = 0 + 645 ;putch@c stored from wreg + 646 007E66 6E01 movwf putch@c,c + 647 007E68 + 648 ;rs232.c: 25: while (!TXIF); + 649 007E68 A89E btfss 3998,4,c ;volatile + 650 007E6A D7FE goto l700 + 651 + 652 ;rs232.c: 26: TXREG = c; + 653 007E6C C001 FFAD movff putch@c,4013 ;volatile + 654 007E70 0012 return ;funcret + 655 007E72 __end_of_putch: + 656 opt stack 0 + 657 indf2 equ 0xFDF + 658 postinc2 equ 0xFDE + 659 postdec2 equ 0xFDD + 660 fsr2h equ 0xFDA + 661 fsr2l equ 0xFD9 + 662 status equ 0xFD8 + 663 + 664 ;; *************** function _eusart_init ***************** + 665 ;; Defined at: + 666 ;; line 4 in file "rs232.c" + 667 ;; Parameters: Size Location Type + 668 ;; None + 669 ;; Auto vars: Size Location Type + 670 ;; None + 671 ;; Return value: Size Location Type + 672 ;; 1 wreg void + 673 ;; Registers used: + 674 ;; wreg, status,2 + 675 ;; Tracked objects: + 676 ;; On entry : 0/0 + 677 ;; On exit : 0/0 + 678 ;; Unchanged: 0/0 + 679 ;; Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 + 680 ;; Params: 0 0 0 0 0 0 0 + 681 ;; Locals: 0 0 0 0 0 0 0 + 682 ;; Temps: 0 0 0 0 0 0 0 + 683 ;; Totals: 0 0 0 0 0 0 0 + 684 ;;Total ram usage: 0 bytes + 685 ;; Hardware stack levels used: 1 + 686 ;; This function calls: + 687 ;; Nothing + 688 ;; This function is called by: + 689 ;; _main + 690 ;; This function uses a non-reentrant model + 691 ;; + 692 + 693 psect text6 + 694 007E72 __ptext6: + 695 opt stack 0 + 696 007E72 _eusart_init: + 697 opt stack 30 + 698 + 699 ;rs232.c: 7: TXSTAbits.SYNC = 0; + 700 + 701 ;incstack = 0 + 702 007E72 98AC bcf 4012,4,c ;volatile + 703 + 704 ;rs232.c: 8: TXSTAbits.TX9 = 0; + 705 007E74 9CAC bcf 4012,6,c ;volatile + 706 + 707 ;rs232.c: 11: RCSTAbits.SPEN = 1; + 708 007E76 8EAB bsf 4011,7,c ;volatile + 709 + 710 ;rs232.c: 12: SPBRG = 129; + 711 007E78 0E81 movlw 129 + 712 007E7A 6EAF movwf 4015,c ;volatile + 713 + 714 ;rs232.c: 13: TXSTAbits.BRGH = 1; + 715 007E7C 84AC bsf 4012,2,c ;volatile + 716 + 717 ;rs232.c: 14: BAUDCONbits.BRG16 = 0; + 718 007E7E 96B8 bcf 4024,3,c ;volatile + 719 + 720 ;rs232.c: 17: TRISC7 = 1; + 721 007E80 8E94 bsf 3988,7,c ;volatile + 722 + 723 ;rs232.c: 18: TRISC6 = 1; + 724 007E82 8C94 bsf 3988,6,c ;volatile + 725 + 726 ;rs232.c: 19: RCSTAbits.CREN = 1; + 727 007E84 88AB bsf 4011,4,c ;volatile + 728 + 729 ;rs232.c: 20: TXSTAbits.TXEN = 1; + 730 007E86 8AAC bsf 4012,5,c ;volatile + 731 007E88 0012 return ;funcret + 732 007E8A __end_of_eusart_init: + 733 opt stack 0 + 734 0000 indf2 equ 0xFDF + 735 postinc2 equ 0xFDE + 736 postdec2 equ 0xFDD + 737 fsr2h equ 0xFDA + 738 fsr2l equ 0xFD9 + 739 status equ 0xFD8 + 740 indf2 equ 0xFDF + 741 postinc2 equ 0xFDE + 742 postdec2 equ 0xFDD + 743 fsr2h equ 0xFDA + 744 fsr2l equ 0xFD9 + 745 status equ 0xFD8 + 746 + 747 psect rparam + 748 0000 indf2 equ 0xFDF + 749 postinc2 equ 0xFDE + 750 postdec2 equ 0xFDD + 751 fsr2h equ 0xFDA + 752 fsr2l equ 0xFD9 + 753 status equ 0xFD8 Data Sizes: @@ -220,18 +777,37 @@ Data Sizes: Auto Spaces: Space Size Autos Used - COMRAM 95 0 0 + COMRAM 95 20 20 BANK0 160 0 0 BANK1 256 0 0 BANK2 256 0 0 + BANK3 256 0 0 + BANK4 256 0 0 + BANK5 256 0 0 Pointer List with Targets: - None. + midi_note_on@pkt PTR struct . size(2) Largest target is 7 + -> main@sample_message(COMRAM[7]), + + midi_set_channel@pkt PTR struct . size(2) Largest target is 7 + -> main@sample_message(COMRAM[7]), + + midi_set_status@pkt PTR struct . size(2) Largest target is 7 + -> main@sample_message(COMRAM[7]), + + eusart_write_midi@data PTR unsigned char size(2) Largest target is 7 + -> sample_message.data(COMRAM[4]), main@sample_message(COMRAM[7]), + + eusart_write_midi@pkt PTR struct . size(2) Largest target is 7 + -> main@sample_message(COMRAM[7]), + Critical Paths under _main in COMRAM - None. + _main->_midi_note_on + _midi_note_on->_midi_set_channel + _eusart_write_midi->_putch Critical Paths under _main in BANK0 @@ -245,23 +821,61 @@ Critical Paths under _main in BANK2 None. +Critical Paths under _main in BANK3 + + None. + +Critical Paths under _main in BANK4 + + None. + +Critical Paths under _main in BANK5 + + None. + Call Graph Tables: --------------------------------------------------------------------------------- (Depth) Function Calls Base Space Used Autos Params Refs --------------------------------------------------------------------------------- - (0) _main 0 0 0 0 + (0) _main 7 7 0 1590 + 13 COMRAM 7 7 0 _eusart_init + _eusart_write_midi + _midi_note_on + --------------------------------------------------------------------------------- + (1) _midi_note_on 8 2 6 1264 + 5 COMRAM 8 2 6 + _midi_set_channel + _midi_set_status + --------------------------------------------------------------------------------- + (2) _midi_set_status 4 1 3 370 + 0 COMRAM 4 1 3 + --------------------------------------------------------------------------------- + (2) _midi_set_channel 5 1 4 370 + 0 COMRAM 5 1 4 + --------------------------------------------------------------------------------- + (1) _eusart_write_midi 8 6 2 270 + 1 COMRAM 8 6 2 + _putch + --------------------------------------------------------------------------------- + (2) _putch 1 1 0 15 + 0 COMRAM 1 1 0 --------------------------------------------------------------------------------- (1) _eusart_init 0 0 0 0 --------------------------------------------------------------------------------- - Estimated maximum stack depth 1 + Estimated maximum stack depth 2 --------------------------------------------------------------------------------- Call Graph Graphs: _main (ROOT) _eusart_init + _eusart_write_midi + _putch + _midi_note_on + _midi_set_channel + _midi_set_status Address spaces: Name Size Autos Total Cost Usage @@ -269,17 +883,23 @@ BITCOMRAM 5F 0 0 0 0.0% EEDATA 100 0 0 0 0.0% NULL 0 0 0 0 0.0% CODE 0 0 0 0 0.0% -COMRAM 5F 0 0 1 0.0% +COMRAM 5F 14 14 1 21.1% STACK 0 0 0 2 0.0% BITBANK0 A0 0 0 3 0.0% BANK0 A0 0 0 4 0.0% -BANK1 100 0 0 5 0.0% -BITBANK2 100 0 0 6 0.0% -BANK2 100 0 0 7 0.0% -ABS 0 0 0 8 0.0% -BITBANK1 100 0 0 9 0.0% -BIGRAM 2FF 0 0 10 0.0% -DATA 0 0 0 11 0.0% +BITBANK1 100 0 0 5 0.0% +BANK1 100 0 0 6 0.0% +BITBANK2 100 0 0 7 0.0% +BANK2 100 0 0 8 0.0% +ABS 0 0 0 9 0.0% +BITBANK3 100 0 0 10 0.0% +BANK3 100 0 0 11 0.0% +BITBANK4 100 0 0 12 0.0% +BANK4 100 0 0 13 0.0% +BITBANK5 100 0 0 14 0.0% +BANK5 100 0 0 15 0.0% +BIGRAM 5FF 0 0 16 0.0% +DATA 0 0 0 17 0.0% BITSFR_1 0 0 0 200 0.0% SFR_1 0 0 0 200 0.0% BITSFR 0 0 0 200 0.0% @@ -287,29 +907,47 @@ SFR 0 0 0 200 0.0% Microchip Technology PIC18 Macro Assembler V1.44 build -154322312 -Symbol Table Mon Jan 08 09:28:26 2018 - - l7 3FE0 __CFG_CP0$OFF 000000 __CFG_CP1$OFF 000000 - __CFG_LVP$ON 000000 __CFG_CPB$OFF 000000 __CFG_CPD$OFF 000000 - _RCIF 007CF5 _TXIF 007CF4 _main 3FDC - __CFG_BORV$190 000000 start 0000 __CFG_IESO$OFF 000000 - ___param_bank 000000 ?_main 0000 __CFG_WDTEN$ON 000000 - _RCREG 000FAE _SPBRG 000FAF _TXREG 000FAD - __CFG_WRT0$OFF 000000 __CFG_WRT1$OFF 000000 __CFG_EBTR0$OFF 000000 - __CFG_FCMEN$OFF 000000 __CFG_EBTR1$OFF 000000 __CFG_WRTB$OFF 000000 - __CFG_WRTC$OFF 000000 __CFG_WRTD$OFF 000000 __CFG_EBTRB$OFF 000000 - __CFG_MCLRE$EXTMCLR 000000 ?_eusart_init 0000 __CFG_HFOFST$ON 000000 - __CFG_PBADEN$ON 000000 __initialization 3FE2 __end_of_main 3FE2 - ??_main 0000 __activetblptr 000000 _TRISC6 007CA6 - _TRISC7 007CA7 __CFG_XINST$OFF 000000 __CFG_STVREN$ON 000000 - __accesstop 0060 __end_of__initialization 3FE2 ___rparam_used 000001 - __pcstackCOMRAM 0000 __CFG_PLLCFG$OFF 000000 __size_of_eusart_init 0018 - __CFG_CCP2MX$PORTC1 000000 __CFG_CCP3MX$PORTB5 000000 __CFG_PWRTEN$OFF 000000 - __Hparam 0000 __Lparam 0000 __pcinit 3FE2 - __ramtop 0300 __ptext0 3FDC __ptext1 3FE8 - end_of_initialization 3FE2 _RCSTAbits 000FAB _TXSTAbits 000FAC - _BAUDCONbits 000FB8 start_initialization 3FE2 ??_eusart_init 0000 - __CFG_PRICLKEN$ON 000000 __end_of_eusart_init 4000 __CFG_WDTPS$32768 000000 - __Hrparam 0000 __Lrparam 0000 __CFG_BOREN$SBORDIS 000000 - __CFG_P2BMX$PORTD2 000000 _eusart_init 3FE8 __size_of_main 0006 - __CFG_T3CMX$PORTC0 000000 __CFG_FOSC$ECHPIO6 000000 +Symbol Table Thu Feb 01 17:09:31 2018 + + l12 7FEE l13 7FDC l19 7EF4 + __CFG_CP0$OFF 000000 __CFG_CP1$OFF 000000 __CFG_LVP$ON 000000 + l700 7E68 l826 7FDC __CFG_CPB$OFF 000000 + __CFG_CPD$OFF 000000 _RCIF 007CF5 _TXIF 007CF4 + _main 7ED4 midi_note_on@channel 0008 fsr2h 000FDA + indf2 000FDF fsr2l 000FD9 __CFG_BORV$190 000000 + start 0000 __CFG_IESO$OFF 000000 midi_note_on@pkt 0006 + ___param_bank 000000 ?_main 0001 __CFG_WDTEN$ON 000000 + _RCREG 000FAE _SPBRG 000FAF _TXREG 000FAD + __CFG_WRT0$OFF 000000 __CFG_WRT1$OFF 000000 __CFG_EBTR0$OFF 000000 + __CFG_FCMEN$OFF 000000 __CFG_EBTR1$OFF 000000 __CFG_WRTB$OFF 000000 + __CFG_WRTC$OFF 000000 __CFG_WRTD$OFF 000000 __CFG_EBTRB$OFF 000000 + __CFG_MCLRE$EXTMCLR 000000 ?_eusart_init 0001 _putch 7E66 + _eusart_write_midi 7F78 __end_of_midi_set_status 7EAE status 000FD8 + __CFG_HFOFST$ON 000000 ?_eusart_write_midi 0002 __CFG_PBADEN$ON 000000 + eusart_write_midi@length 0006 __initialization 7E60 midi_note_on@note 000A + __end_of_main 7F02 ??_eusart_write_midi 0004 midi_note_on@velocity 000B + ??_main 000E ?_midi_note_on 0006 __activetblptr 000000 + __end_of_eusart_write_midi 8000 ?_putch 0001 _TRISC6 007CA6 + _TRISC7 007CA7 __CFG_XINST$OFF 000000 __CFG_STVREN$ON 000000 + __end_of_midi_set_channel 7ED4 midi_set_status@status 0003 ??_midi_note_on 000C + putch@c 0001 __accesstop 0060 __end_of__initialization 7E60 + ?_midi_set_status 0001 ___rparam_used 000001 __pcstackCOMRAM 0001 + __end_of_putch 7E72 __size_of_eusart_write_midi 0088 ??_putch 0001 + __CFG_PLLCFG$OFF 000000 __size_of_eusart_init 0018 __CFG_CCP2MX$PORTC1 000000 + __CFG_CCP3MX$PORTB5 000000 __end_of_midi_note_on 7F78 eusart_write_midi@pkt 0002 + __CFG_PWRTEN$OFF 000000 __Hparam 0000 __Lparam 0000 + __pcinit 7E60 __ramtop 0600 __ptext0 7ED4 + __ptext1 7F02 __ptext2 7E8A __ptext3 7EAE + __ptext4 7F78 __ptext5 7E66 __ptext6 7E72 + end_of_initialization 7E60 _RCSTAbits 000FAB postdec2 000FDD + postinc2 000FDE ?_midi_set_channel 0001 ??_midi_set_channel 0005 + _TXSTAbits 000FAC midi_set_channel@channel 0003 _BAUDCONbits 000FB8 + start_initialization 7E60 __size_of_midi_note_on 0076 __size_of_midi_set_status 0024 + _midi_note_on 7F02 ??_eusart_init 0001 midi_set_status@pkt 0001 + __CFG_PRICLKEN$ON 000000 main@sample_message 000E __size_of_putch 000C + __end_of_eusart_init 7E8A __CFG_WDTPS$32768 000000 ??_midi_set_status 0004 + __size_of_midi_set_channel 0026 eusart_write_midi@data 0008 __Hrparam 0000 + __Lrparam 0000 __CFG_BOREN$SBORDIS 000000 __CFG_P2BMX$PORTD2 000000 + _eusart_init 7E72 __size_of_main 002E midi_set_channel@pkt 0001 + __CFG_T3CMX$PORTC0 000000 __CFG_FOSC$ECHPIO6 000000 _midi_set_channel 7EAE + _midi_set_status 7E8A diff --git a/src/dist/default/production/src.production.map b/src/dist/default/production/src.production.map index 35f3f69..8323a28 100644 --- a/src/dist/default/production/src.production.map +++ b/src/dist/default/production/src.production.map @@ -4,15 +4,16 @@ Linker command line: -W-3 --edf=C:\Program Files\Microchip\xc8\v1.44\dat\en_msgs.txt -cs \ -h+dist/default/production\src.production.sym \ - --cmf=dist/default/production\src.production.cmf -z -Q18F44K22 \ - -oC:\Users\_prossn\AppData\Local\Temp\s3s8.2 \ + --cmf=dist/default/production\src.production.cmf -z -Q18F45K22 \ + -oC:\Users\_prossn\AppData\Local\Temp\s438.2 \ -Mdist/default/production/src.production.map -E1 -ver=XC8 \ - -ASTACK=060h-02ffh -pstack=STACK -ACODE=00h-03FFFh -ACONST=00h-03FFFh \ - -ASMALLCONST=0300h-03FFhx61 -AMEDIUMCONST=0300h-03FFFh -ACOMRAM=01h-05Fh \ - -AABS1=00h-02FFh -ABIGRAM=01h-02FFh -ARAM=060h-0FFh,0100h-01FFhx2 \ + -ASTACK=060h-05ffh -pstack=STACK -ACODE=00h-07FFFh -ACONST=00h-07FFFh \ + -ASMALLCONST=0600h-06FFhx122 -AMEDIUMCONST=0600h-07FFFh -ACOMRAM=01h-05Fh \ + -AABS1=00h-05FFh -ABIGRAM=01h-05FFh -ARAM=060h-0FFh,0100h-01FFhx5 \ -ABANK0=060h-0FFh -ABANK1=0100h-01FFh -ABANK2=0200h-02FFh \ + -ABANK3=0300h-03FFh -ABANK4=0400h-04FFh -ABANK5=0500h-05FFh \ -ASFR=0F38h-0F5Fh,0F60h-0FFFh \ - -preset_vec=00h,intcode,intcodelo,powerup,init -pramtop=0300h \ + -preset_vec=00h,intcode,intcodelo,powerup,init -pramtop=0600h \ -psmallconst=SMALLCONST -pmediumconst=MEDIUMCONST -pconst=CONST \ -AFARRAM=00h-00h -ACONFIG=0300000h-030000Dh -pconfig=CONFIG \ -AIDLOC=0200000h-0200007h -pidloc=IDLOC -AEEDATA=0F00000h-0F000FFh \ @@ -21,12 +22,12 @@ Linker command line: -pfarbss=FARRAM,fardata=FARRAM,nvFARRAM=FARRAM \ -pintsave_regs=BIGRAM,bigbss=BIGRAM,bigdata=BIGRAM -pbss=RAM \ -pidata=CODE,irdata=CODE,ibigdata=CODE,ifardata=CODE -prparam=COMRAM \ - C:\Users\_prossn\AppData\Local\Temp\s3s8.obj \ + C:\Users\_prossn\AppData\Local\Temp\s438.obj \ dist/default/production\src.production.obj Object code version is 3.11 -Machine type is 18F44K22 +Machine type is 18F45K22 Call graph: (short form) @@ -34,23 +35,34 @@ Call graph: (short form) Name Link Load Length Selector Space Scale -C:\Users\_prossn\AppData\Local\Temp\s3s8.obj +C:\Users\_prossn\AppData\Local\Temp\s438.obj init 0 0 4 0 0 idloc 200000 200000 8 200000 0 config 300000 300000 E 300000 0 dist/default/production\src.production.obj - text1 3FE8 3FE8 18 1FF4 0 - text0 3FDC 3FDC 6 1FEE 0 - cinit 3FE2 3FE2 6 1FF1 0 + text6 7E72 7E72 18 3F39 0 + text5 7E66 7E66 C 3F33 0 + text4 7F78 7F78 88 3FBC 0 + text3 7EAE 7EAE 26 3F57 0 + text2 7E8A 7E8A 24 3F45 0 + text1 7F02 7F02 76 3F81 0 + text0 7ED4 7ED4 2E 3F6A 0 + cstackCOMRAM 1 1 14 1 1 + cinit 7E60 7E60 6 3F30 0 TOTAL Name Link Load Length Space CLASS STACK CLASS CODE init 0 0 4 0 - text1 3FE8 3FE8 18 0 - text0 3FDC 3FDC 6 0 - cinit 3FE2 3FE2 6 0 + text6 7E72 7E72 18 0 + text5 7E66 7E66 C 0 + text4 7F78 7F78 88 0 + text3 7EAE 7EAE 26 0 + text2 7E8A 7E8A 24 0 + text1 7F02 7F02 76 0 + text0 7ED4 7ED4 2E 0 + cinit 7E60 7E60 6 0 CLASS CONST @@ -59,6 +71,7 @@ TOTAL Name Link Load Length Sp CLASS MEDIUMCONST CLASS COMRAM + cstackCOMRAM 1 1 14 1 CLASS ABS1 @@ -72,6 +85,12 @@ TOTAL Name Link Load Length Sp CLASS BANK2 + CLASS BANK3 + + CLASS BANK4 + + CLASS BANK5 + CLASS SFR CLASS FARRAM @@ -89,9 +108,15 @@ TOTAL Name Link Load Length Sp SEGMENTS Name Load Length Top Selector Space Class reset_vec 000000 000004 000004 0 0 CODE - text0 003FDC 000006 003FE2 1FEE 0 CODE - cinit 003FE2 000006 003FE8 1FF1 0 CODE - text1 003FE8 000018 004000 1FF4 0 CODE + cstackCOMRAM 000001 000014 000015 1 1 COMRAM + cinit 007E60 000006 007E66 3F30 0 CODE + text5 007E66 00000C 007E72 3F33 0 CODE + text6 007E72 000018 007E8A 3F39 0 CODE + text2 007E8A 000024 007EAE 3F45 0 CODE + text3 007EAE 000026 007ED4 3F57 0 CODE + text0 007ED4 00002E 007F02 3F6A 0 CODE + text1 007F02 000076 007F78 3F81 0 CODE + text4 007F78 000088 008000 3FBC 0 CODE idloc 200000 000008 200008 200000 0 IDLOC config 300000 00000E 30000E 300000 0 CONFIG @@ -102,238 +127,454 @@ UNUSED ADDRESS RANGES BANK0 000060-0000FF A0 BANK1 000100-0001FF 100 BANK2 000200-0002FF 100 - BIGRAM 000001-0002FF 2FF - CODE 000004-003FDB 3FD8 - COMRAM 000001-00005F 5F - CONST 000004-003FDB 3FD8 + BANK3 000300-0003FF 100 + BANK4 000400-0004FF 100 + BANK5 000500-0005FF 100 + BIGRAM 000015-0005FF 5EB + CODE 000004-007E5F 7E5C + COMRAM 000015-00005F 4B + CONST 000004-007E5F 7E5C EEDATA F00000-F000FF 100 - MEDIUMCONST 000300-003FDB 3CDC - RAM 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+__Lram ram 000000 +__Lramtop ramtop 000600 +__Lrbit rbit 000000 +__Lrbss rbss 000000 +__Lrdata rdata 000000 +__Lreset_vec reset_vec 000000 +__Lrparam rparam 000000 +__Lsfr sfr 000000 +__Lsmallconst smallconst 000000 +__Lspace_0 (abs) 000000 +__Lspace_1 (abs) 000000 +__Lspace_2 (abs) 000000 +__Lstack stack 000000 +__Lstruct struct 000000 +__Ltemp temp 000000 +__Ltext text 000000 +__Ltext0 text0 000000 +__Ltext1 text1 000000 +__Ltext2 text2 000000 +__Ltext3 text3 000000 +__Ltext4 text4 000000 +__Ltext5 text5 000000 +__Ltext6 text6 000000 +__S0 (abs) 30000E +__S1 (abs) 000015 +__S2 (abs) 000000 +___inthi_sp stack 000000 +___intlo_sp stack 000000 +___param_bank (abs) 000000 +___rparam_used (abs) 000001 +___sp stack 000000 +__accesstop (abs) 000060 +__activetblptr (abs) 000000 +__end_of__initialization cinit 007E60 +__end_of_eusart_init text6 007E8A +__end_of_eusart_write_midi text4 008000 +__end_of_main text0 007F02 +__end_of_midi_note_on text1 007F78 +__end_of_midi_set_channel text3 007ED4 +__end_of_midi_set_status text2 007EAE +__end_of_putch text5 007E72 +__initialization cinit 007E60 +__mediumconst mediumconst 000000 +__pcinit cinit 007E60 +__pcstackCOMRAM cstackCOMRAM 000001 +__ptext0 text0 007ED4 +__ptext1 text1 007F02 +__ptext2 text2 007E8A +__ptext3 text3 007EAE +__ptext4 text4 007F78 +__ptext5 text5 007E66 +__ptext6 text6 007E72 +__ramtop ramtop 000600 +__size_of_eusart_init (abs) 000000 +__size_of_eusart_write_midi (abs) 000000 +__size_of_main (abs) 000000 +__size_of_midi_note_on (abs) 000000 +__size_of_midi_set_channel (abs) 000000 +__size_of_midi_set_status (abs) 000000 +__size_of_putch (abs) 000000 +__smallconst smallconst 000000 +_eusart_init text6 007E72 +_eusart_write_midi text4 007F78 +_main text0 007ED4 +_midi_note_on text1 007F02 +_midi_set_channel text3 007EAE +_midi_set_status text2 007E8A +_putch text5 007E66 +end_of_initialization cinit 007E60 +eusart_write_midi@data cstackCOMRAM 000008 +eusart_write_midi@length cstackCOMRAM 000006 +eusart_write_midi@pkt cstackCOMRAM 000002 +intlevel0 text 000000 +intlevel1 text 000000 +intlevel2 text 000000 +intlevel3 text 000000 +main@sample_message cstackCOMRAM 00000E +midi_note_on@channel cstackCOMRAM 000008 +midi_note_on@note cstackCOMRAM 00000A +midi_note_on@pkt cstackCOMRAM 000006 +midi_note_on@velocity cstackCOMRAM 00000B +midi_set_channel@channel cstackCOMRAM 000003 +midi_set_channel@pkt cstackCOMRAM 000001 +midi_set_status@pkt cstackCOMRAM 000001 +midi_set_status@status cstackCOMRAM 000003 +putch@c cstackCOMRAM 000001 +stackhi (abs) 0005FF +stacklo (abs) 000060 +start init 000000 +start_initialization cinit 007E60 FUNCTION INFORMATION: *************** function _main ***************** Defined at: - line 83 in file "main.c" + line 105 in file "main.c" Parameters: Size Location Type None Auto vars: Size Location Type - None + sample_messa 7 13[COMRAM] struct . Return value: Size Location Type 1 wreg void Registers used: - wreg, status,2, cstack + wreg, fsr2l, fsr2h, status,2, status,0, cstack Tracked objects: On entry : On exit : Unchanged: - Data sizes: COMRAM BANK0 BANK1 BANK2 - Params: 0 0 0 0 - Locals: 0 0 0 0 - Temps: 0 0 0 0 - Totals: 0 0 0 0 -Total ram usage: 0 bytes - Hardware stack levels required when called: 1 + Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 + Params: 0 0 0 0 0 0 0 + Locals: 7 0 0 0 0 0 0 + Temps: 0 0 0 0 0 0 0 + Totals: 7 0 0 0 0 0 0 +Total ram usage: 7 bytes + Hardware stack levels required when called: 2 This function calls: _eusart_init + _eusart_write_midi + _midi_note_on This function is called by: Startup code after reset This function uses a non-reentrant model + *************** function _midi_note_on ***************** + Defined at: + line 64 in file "midi.c" + Parameters: Size Location Type + pkt 2 5[COMRAM] PTR struct . + -> main@sample_message(7), + channel 2 7[COMRAM] unsigned int + note 1 9[COMRAM] enum E31 + velocity 1 10[COMRAM] unsigned char + Auto vars: Size Location Type + None + Return value: Size Location Type + 2 5[COMRAM] int + Registers used: + wreg, fsr2l, fsr2h, status,2, status,0, cstack + Tracked objects: + On entry : + On exit : + Unchanged: + Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 + Params: 6 0 0 0 0 0 0 + Locals: 0 0 0 0 0 0 0 + Temps: 2 0 0 0 0 0 0 + Totals: 8 0 0 0 0 0 0 +Total ram usage: 8 bytes + Hardware stack levels used: 1 + Hardware stack levels required when called: 1 + This function calls: + _midi_set_channel + _midi_set_status + This function is called by: + _main + This function uses a non-reentrant model + + + *************** function _midi_set_status ***************** + Defined at: + line 42 in file "midi.c" + Parameters: Size Location Type + pkt 2 0[COMRAM] PTR struct . + -> main@sample_message(7), + status 1 2[COMRAM] enum E40 + Auto vars: Size Location Type + None + Return value: Size Location Type + 2 0[COMRAM] int + Registers used: + wreg, fsr2l, fsr2h, status,2, status,0 + Tracked objects: + On entry : + On exit : + Unchanged: + Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 + Params: 3 0 0 0 0 0 0 + Locals: 0 0 0 0 0 0 0 + Temps: 1 0 0 0 0 0 0 + Totals: 4 0 0 0 0 0 0 +Total ram usage: 4 bytes + Hardware stack levels used: 1 + This function calls: + Nothing + This function is called by: + _midi_note_on + _midi_note_off + This function uses a non-reentrant model + + + *************** function _midi_set_channel ***************** + Defined at: + line 53 in file "midi.c" + Parameters: Size Location Type + pkt 2 0[COMRAM] PTR struct . + -> main@sample_message(7), + channel 2 2[COMRAM] unsigned int + Auto vars: Size Location Type + None + Return value: Size Location Type + 2 0[COMRAM] int + Registers used: + wreg, fsr2l, fsr2h, status,2, status,0 + Tracked objects: + On entry : + On exit : + Unchanged: + Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 + Params: 4 0 0 0 0 0 0 + Locals: 0 0 0 0 0 0 0 + Temps: 1 0 0 0 0 0 0 + Totals: 5 0 0 0 0 0 0 +Total ram usage: 5 bytes + Hardware stack levels used: 1 + This function calls: + Nothing + This function is called by: + _midi_note_on + _midi_note_off + This function uses a non-reentrant model + + + *************** function _eusart_write_midi ***************** + Defined at: + line 81 in file "main.c" + Parameters: Size Location Type + pkt 2 1[COMRAM] PTR struct . + -> main@sample_message(7), + Auto vars: Size Location Type + data 2 7[COMRAM] PTR unsigned char + -> sample_message.data(4), main@sample_message(7), + length 2 5[COMRAM] unsigned int + Return value: Size Location Type + 2 1[COMRAM] int + Registers used: + wreg, fsr2l, fsr2h, status,2, status,0, cstack + Tracked objects: + On entry : + On exit : + Unchanged: + Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 + Params: 2 0 0 0 0 0 0 + Locals: 4 0 0 0 0 0 0 + Temps: 2 0 0 0 0 0 0 + Totals: 8 0 0 0 0 0 0 +Total ram usage: 8 bytes + Hardware stack levels used: 1 + Hardware stack levels required when called: 1 + This function calls: + _putch + This function is called by: + _main + This function uses a non-reentrant model + + + *************** function _putch ***************** + Defined at: + line 23 in file "rs232.c" + Parameters: Size Location Type + c 1 wreg unsigned char + Auto vars: Size Location Type + c 1 0[COMRAM] unsigned char + Return value: Size Location Type + 1 wreg void + Registers used: + wreg + Tracked objects: + On entry : + On exit : + Unchanged: + Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 + Params: 0 0 0 0 0 0 0 + Locals: 1 0 0 0 0 0 0 + Temps: 0 0 0 0 0 0 0 + Totals: 1 0 0 0 0 0 0 +Total ram usage: 1 bytes + Hardware stack levels used: 1 + This function calls: + Nothing + This function is called by: + _eusart_write_midi + _getche + This function uses a non-reentrant model + + *************** function _eusart_init ***************** Defined at: line 4 in file "rs232.c" @@ -349,11 +590,11 @@ Total ram usage: 0 bytes On entry : On exit : Unchanged: - Data sizes: COMRAM BANK0 BANK1 BANK2 - Params: 0 0 0 0 - Locals: 0 0 0 0 - Temps: 0 0 0 0 - Totals: 0 0 0 0 + Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 + Params: 0 0 0 0 0 0 0 + Locals: 0 0 0 0 0 0 0 + Temps: 0 0 0 0 0 0 0 + Totals: 0 0 0 0 0 0 0 Total ram usage: 0 bytes Hardware stack levels used: 1 This function calls: @@ -368,17 +609,26 @@ MODULE INFORMATION Module Function Class Link Load Size rs232.c - _eusart_init CODE 3FE8 0000 25 + _putch CODE 7E66 0000 13 + _eusart_init CODE 7E72 0000 25 -rs232.c estimated size: 25 +rs232.c estimated size: 38 shared - __initialization CODE 3FE2 0000 1 + __initialization CODE 7E60 0000 1 shared estimated size: 1 +midi.c + _midi_set_channel CODE 7EAE 0000 39 + _midi_note_on CODE 7F02 0000 119 + _midi_set_status CODE 7E8A 0000 37 + +midi.c estimated size: 195 + main.c - _main CODE 3FDC 0000 7 + _eusart_write_midi CODE 7F78 0000 137 + _main CODE 7ED4 0000 47 -main.c estimated size: 7 +main.c estimated size: 184 diff --git a/src/dist/default/production/src.production.mum b/src/dist/default/production/src.production.mum index 8d87215..5bf520f 100644 --- a/src/dist/default/production/src.production.mum +++ b/src/dist/default/production/src.production.mum @@ -1,9 +1,9 @@ Memory Summary: - Program space used 24h ( 36) of 3D00h bytes ( 0.2%) - Data space used 0h ( 0) of 2FFh bytes ( 0.0%) + Program space used 1A0h ( 416) of 7A00h bytes ( 1.3%) + Data space used 14h ( 20) of 5FFh bytes ( 1.3%) Configuration bits used 7h ( 7) of 7h words (100.0%) EEPROM space used 0h ( 0) of 100h bytes ( 0.0%) ID Location space used 8h ( 8) of 8h bytes (100.0%) - Data stack space used 0h ( 0) of 2A0h bytes ( 0.0%) + Data stack space used 0h ( 0) of 5A0h bytes ( 0.0%) diff --git a/src/dist/default/production/src.production.obj b/src/dist/default/production/src.production.obj index 21635b1..50131cd 100644 Binary files a/src/dist/default/production/src.production.obj and b/src/dist/default/production/src.production.obj differ diff --git a/src/dist/default/production/src.production.rlf b/src/dist/default/production/src.production.rlf index da1b908..c5cd828 100644 Binary files a/src/dist/default/production/src.production.rlf and b/src/dist/default/production/src.production.rlf differ diff --git a/src/dist/default/production/src.production.sdb b/src/dist/default/production/src.production.sdb index 42af7a3..667b2f7 100644 --- a/src/dist/default/production/src.production.sdb +++ b/src/dist/default/production/src.production.sdb @@ -1,8 +1,38 @@ [p LITE_MODE AUTOSTATIC LFSROK EMI_WORD ] [d version 1.1 ] [d edition pro ] -[d chip 18F44K22 ] +[d chip 18F45K22 ] [d frameptr 4065 ] +"108 Z:\SAMB_4\projects\xilofono\src\main.c +[e E39 . `uc +C 0 +D 1 +E 2 +F 3 +G 4 +A 5 +B 6 +] +"43 Z:\SAMB_4\projects\xilofono\src\midi.c +[e E40 . `uc +NOTE_ON 8 +NOTE_OFF 9 +POLYPHONIC_KEYPRESS 10 +CONTROLLER 11 +PROGRAM_CHANGE 12 +CHANNEL_PRESSURE 13 +PITCH_BLEND 15 +] +"65 +[e E31 . `uc +C 0 +D 1 +E 2 +F 3 +G 4 +A 5 +B 6 +] "62 C:\Program Files\Microchip\xc8\v1.44\sources\common\float.c [v ___ftpack __ftpack `(f 1 e 3 0 ] "86 C:\Program Files\Microchip\xc8\v1.44\sources\common\ftadd.c @@ -23,15 +53,23 @@ [v ___flmul __flmul `(d 1 e 3 0 ] "15 C:\Program Files\Microchip\xc8\v1.44\sources\common\Umul32.c [v ___lmul __lmul `(ul 1 e 4 0 ] -"83 Z:\SAMB_4\projects\xilofono\src\main.c +"81 Z:\SAMB_4\projects\xilofono\src\main.c +[v _eusart_write_midi eusart_write_midi `(i 1 e 2 0 ] +"105 [v _main main `(v 1 e 1 0 ] +"42 Z:\SAMB_4\projects\xilofono\src\midi.c +[v _midi_set_status midi_set_status `(i 1 e 2 0 ] +"53 +[v _midi_set_channel midi_set_channel `(i 1 e 2 0 ] +"64 +[v _midi_note_on midi_note_on `(i 1 e 2 0 ] "4 Z:\SAMB_4\projects\xilofono\src\rs232.c [v _eusart_init eusart_init `(v 1 e 1 0 ] "23 [v _putch putch `(v 1 e 1 0 ] "29 [v _getch getch `(uc 1 e 1 0 ] -[s S79 . 1 `uc 1 RX9D 1 0 :1:0 +[s S120 . 1 `uc 1 RX9D 1 0 :1:0 `uc 1 OERR 1 0 :1:1 `uc 1 FERR 1 0 :1:2 `uc 1 ADDEN 1 0 :1:3 @@ -40,11 +78,11 @@ `uc 1 RX9 1 0 :1:6 `uc 1 SPEN 1 0 :1:7 ] -"10543 C:\Program Files\Microchip\xc8\v1.44\include\pic18f44k22.h -[s S88 . 1 `uc 1 . 1 0 :3:0 +"10543 C:\Program Files\Microchip\xc8\v1.44\include\pic18f45k22.h +[s S129 . 1 `uc 1 . 1 0 :3:0 `uc 1 ADEN 1 0 :1:3 ] -[s S91 . 1 `uc 1 RX9D1 1 0 :1:0 +[s S132 . 1 `uc 1 RX9D1 1 0 :1:0 `uc 1 OERR1 1 0 :1:1 `uc 1 FERR1 1 0 :1:2 `uc 1 ADDEN1 1 0 :1:3 @@ -53,19 +91,19 @@ `uc 1 RX91 1 0 :1:6 `uc 1 SPEN1 1 0 :1:7 ] -[s S100 . 1 `uc 1 RCD8 1 0 :1:0 +[s S141 . 1 `uc 1 RCD8 1 0 :1:0 `uc 1 . 1 0 :5:1 `uc 1 RC8_9 1 0 :1:6 ] -[s S104 . 1 `uc 1 . 1 0 :6:0 +[s S145 . 1 `uc 1 . 1 0 :6:0 `uc 1 RC9 1 0 :1:6 ] -[s S107 . 1 `uc 1 . 1 0 :5:0 +[s S148 . 1 `uc 1 . 1 0 :5:0 `uc 1 SRENA 1 0 :1:5 ] -[u S110 . 1 `S79 1 . 1 0 `S88 1 . 1 0 `S91 1 . 1 0 `S100 1 . 1 0 `S104 1 . 1 0 `S107 1 . 1 0 ] -[v _RCSTAbits RCSTAbits `VES110 1 e 1 @4011 ] -[s S30 . 1 `uc 1 TX9D 1 0 :1:0 +[u S151 . 1 `S120 1 . 1 0 `S129 1 . 1 0 `S132 1 . 1 0 `S141 1 . 1 0 `S145 1 . 1 0 `S148 1 . 1 0 ] +[v _RCSTAbits RCSTAbits `VES151 1 e 1 @4011 ] +[s S71 . 1 `uc 1 TX9D 1 0 :1:0 `uc 1 TRMT 1 0 :1:1 `uc 1 BRGH 1 0 :1:2 `uc 1 SENDB 1 0 :1:3 @@ -75,7 +113,7 @@ `uc 1 CSRC 1 0 :1:7 ] "10960 -[s S39 . 1 `uc 1 TX9D1 1 0 :1:0 +[s S80 . 1 `uc 1 TX9D1 1 0 :1:0 `uc 1 TRMT1 1 0 :1:1 `uc 1 BRGH1 1 0 :1:2 `uc 1 SENDB1 1 0 :1:3 @@ -84,19 +122,19 @@ `uc 1 TX91 1 0 :1:6 `uc 1 CSRC1 1 0 :1:7 ] -[s S48 . 1 `uc 1 TXD8 1 0 :1:0 +[s S89 . 1 `uc 1 TXD8 1 0 :1:0 `uc 1 . 1 0 :5:1 `uc 1 TX8_9 1 0 :1:6 ] -[u S52 . 1 `S30 1 . 1 0 `S39 1 . 1 0 `S48 1 . 1 0 ] -[v _TXSTAbits TXSTAbits `VES52 1 e 1 @4012 ] +[u S93 . 1 `S71 1 . 1 0 `S80 1 . 1 0 `S89 1 . 1 0 ] +[v _TXSTAbits TXSTAbits `VES93 1 e 1 @4012 ] "11179 [v _TXREG TXREG `VEuc 1 e 1 @4013 ] "11257 [v _RCREG RCREG `VEuc 1 e 1 @4014 ] "11335 [v _SPBRG SPBRG `VEuc 1 e 1 @4015 ] -[s S150 . 1 `uc 1 ABDEN 1 0 :1:0 +[s S191 . 1 `uc 1 ABDEN 1 0 :1:0 `uc 1 WUE 1 0 :1:1 `uc 1 . 1 0 :1:2 `uc 1 BRG16 1 0 :1:3 @@ -106,10 +144,10 @@ `uc 1 ABDOVF 1 0 :1:7 ] "12600 -[s S159 . 1 `uc 1 . 1 0 :4:0 +[s S200 . 1 `uc 1 . 1 0 :4:0 `uc 1 SCKP 1 0 :1:4 ] -[s S162 . 1 `uc 1 ABDEN1 1 0 :1:0 +[s S203 . 1 `uc 1 ABDEN1 1 0 :1:0 `uc 1 WUE1 1 0 :1:1 `uc 1 . 1 0 :1:2 `uc 1 BRG161 1 0 :1:3 @@ -118,24 +156,24 @@ `uc 1 RCIDL1 1 0 :1:6 `uc 1 ABDOVF1 1 0 :1:7 ] -[s S171 . 1 `uc 1 . 1 0 :4:0 +[s S212 . 1 `uc 1 . 1 0 :4:0 `uc 1 TXCKP 1 0 :1:4 `uc 1 RXDTP 1 0 :1:5 `uc 1 RCMT 1 0 :1:6 ] -[s S176 . 1 `uc 1 . 1 0 :4:0 +[s S217 . 1 `uc 1 . 1 0 :4:0 `uc 1 TXCKP1 1 0 :1:4 `uc 1 RXDTP1 1 0 :1:5 `uc 1 RCMT1 1 0 :1:6 ] -[s S181 . 1 `uc 1 . 1 0 :5:0 +[s S222 . 1 `uc 1 . 1 0 :5:0 `uc 1 RXCKP 1 0 :1:5 ] -[s S184 . 1 `uc 1 . 1 0 :1:0 +[s S225 . 1 `uc 1 . 1 0 :1:0 `uc 1 W4E 1 0 :1:1 ] -[u S187 . 1 `S150 1 . 1 0 `S159 1 . 1 0 `S162 1 . 1 0 `S171 1 . 1 0 `S176 1 . 1 0 `S181 1 . 1 0 `S184 1 . 1 0 ] -[v _BAUDCONbits BAUDCONbits `VES187 1 e 1 @4024 ] +[u S228 . 1 `S191 1 . 1 0 `S200 1 . 1 0 `S203 1 . 1 0 `S212 1 . 1 0 `S217 1 . 1 0 `S222 1 . 1 0 `S225 1 . 1 0 ] +[v _BAUDCONbits BAUDCONbits `VES228 1 e 1 @4024 ] "18768 [v _RCIF RCIF `VEb 1 e 0 @31989 ] "19440 @@ -144,12 +182,71 @@ [v _TRISC7 TRISC7 `VEb 1 e 0 @31911 ] "19540 [v _TXIF TXIF `VEb 1 e 0 @31988 ] -"83 Z:\SAMB_4\projects\xilofono\src\main.c +"105 Z:\SAMB_4\projects\xilofono\src\main.c [v _main main `(v 1 e 1 0 ] { -"90 +[s S21 . 7 `uc 1 status 1 0 :4:0 +`uc 1 channel 1 0 :4:4 +`ui 1 data_size 2 1 `[4]uc 1 data 4 3 ] +"107 +[v main@sample_message sample_message `S21 1 a 7 13 ] +"116 } 0 -"4 Z:\SAMB_4\projects\xilofono\src\rs232.c +"64 Z:\SAMB_4\projects\xilofono\src\midi.c +[v _midi_note_on midi_note_on `(i 1 e 2 0 ] +{ +[s S21 . 7 `uc 1 status 1 0 :4:0 +`uc 1 channel 1 0 :4:4 +`ui 1 data_size 2 1 `[4]uc 1 data 4 3 ] +[v midi_note_on@pkt pkt `*.39S21 1 p 2 5 ] +[v midi_note_on@channel channel `ui 1 p 2 7 ] +[v midi_note_on@note note `E31 1 p 1 9 ] +[v midi_note_on@velocity velocity `uc 1 p 1 10 ] +"85 +} 0 +"42 +[v _midi_set_status midi_set_status `(i 1 e 2 0 ] +{ +[s S21 . 7 `uc 1 status 1 0 :4:0 +`uc 1 channel 1 0 :4:4 +`ui 1 data_size 2 1 `[4]uc 1 data 4 3 ] +[v midi_set_status@pkt pkt `*.39S21 1 p 2 0 ] +[v midi_set_status@status status `E40 1 p 1 2 ] +"51 +} 0 +"53 +[v _midi_set_channel midi_set_channel `(i 1 e 2 0 ] +{ +[s S21 . 7 `uc 1 status 1 0 :4:0 +`uc 1 channel 1 0 :4:4 +`ui 1 data_size 2 1 `[4]uc 1 data 4 3 ] +[v midi_set_channel@pkt pkt `*.39S21 1 p 2 0 ] +[v midi_set_channel@channel channel `ui 1 p 2 2 ] +"62 +} 0 +"81 Z:\SAMB_4\projects\xilofono\src\main.c +[v _eusart_write_midi eusart_write_midi `(i 1 e 2 0 ] +{ +"92 +[v eusart_write_midi@data data `*.39uc 1 a 2 7 ] +"91 +[v eusart_write_midi@length length `ui 1 a 2 5 ] +[s S21 . 7 `uc 1 status 1 0 :4:0 +`uc 1 channel 1 0 :4:4 +`ui 1 data_size 2 1 `[4]uc 1 data 4 3 ] +"81 +[v eusart_write_midi@pkt pkt `*.39S21 1 p 2 1 ] +"101 +} 0 +"23 Z:\SAMB_4\projects\xilofono\src\rs232.c +[v _putch putch `(v 1 e 1 0 ] +{ +[v putch@c c `uc 1 a 1 wreg ] +[v putch@c c `uc 1 a 1 wreg ] +[v putch@c c `uc 1 a 1 0 ] +"27 +} 0 +"4 [v _eusart_init eusart_init `(v 1 e 1 0 ] { "21 diff --git a/src/dist/default/production/src.production.sym b/src/dist/default/production/src.production.sym index ebb58d4..9cb149a 100644 --- a/src/dist/default/production/src.production.sym +++ b/src/dist/default/production/src.production.sym @@ -1,17 +1,21 @@ __CFG_XINST$OFF 0 0 ABS 0 __size_of_eusart_init 0 0 ABS 0 +main@sample_message E 0 COMRAM 1 __S0 30000E 0 ABS 0 -__S1 0 0 ABS 0 +__S1 15 0 ABS 0 __S2 0 0 ABS 0 __Hintentry 0 0 ABS 0 __Lintentry 0 0 ABS 0 +midi_set_channel@pkt 1 0 COMRAM 1 __CFG_PLLCFG$OFF 0 0 ABS 0 __CFG_WDTEN$ON 0 0 ABS 0 _RCIF 7CF5 0 ABS 0 _TXIF 7CF4 0 ABS 0 -_main 3FDC 0 CODE 0 +__end_of_eusart_write_midi 8000 0 CODE 0 +_main 7ED4 0 CODE 0 ___sp 0 0 STACK 2 start 0 0 CODE 0 +eusart_write_midi@pkt 2 0 COMRAM 1 _RCREG FAE 0 ABS 0 _TXREG FAD 0 ABS 0 _SPBRG FAF 0 ABS 0 @@ -29,17 +33,21 @@ __Lrparam 0 0 COMRAM 1 __Hram 0 0 ABS 0 __Lram 0 0 ABS 0 __Hcomram 0 0 ABS 0 +_putch 7E66 0 CODE 0 __Lcomram 0 0 ABS 0 __Hsfr 0 0 ABS 0 __Lsfr 0 0 ABS 0 +eusart_write_midi@data 8 0 COMRAM 1 __Hbss 0 0 RAM 1 __CFG_STVREN$ON 0 0 ABS 0 __Lbss 0 0 RAM 1 ___param_bank 0 0 ABS 0 __Hnvrram 0 0 COMRAM 1 __Lnvrram 0 0 COMRAM 1 +__size_of_midi_note_on 0 0 ABS 0 _TRISC6 7CA6 0 ABS 0 _TRISC7 7CA7 0 ABS 0 +__end_of_putch 7E72 0 CODE 0 __Heeprom_data 0 0 EEDATA 0 __Leeprom_data 0 0 EEDATA 0 __Hintsave_regs 0 0 BIGRAM 1 @@ -48,8 +56,8 @@ __Hbigbss 0 0 BIGRAM 1 __Lbigbss 0 0 BIGRAM 1 __Hintret 0 0 ABS 0 __Lintret 0 0 ABS 0 -__Hramtop 300 0 RAM 0 -__Lramtop 300 0 RAM 0 +__Hramtop 600 0 RAM 0 +__Lramtop 600 0 RAM 0 __Hstruct 0 0 COMRAM 1 __Lstruct 0 0 COMRAM 1 __Hbigdata 0 0 BIGRAM 1 @@ -62,6 +70,7 @@ __Hintcode 0 0 CODE 0 __Lintcode 0 0 CODE 0 __Hfardata 0 0 FARRAM 0 __Lfardata 0 0 FARRAM 0 +midi_note_on@velocity B 0 COMRAM 1 __Habs1 0 0 ABS 0 __Labs1 0 0 ABS 0 __CFG_EBTR0$OFF 0 0 ABS 0 @@ -70,10 +79,11 @@ __HnvFARRAM 0 0 FARRAM 0 __LnvFARRAM 0 0 FARRAM 0 __CFG_EBTR1$OFF 0 0 ABS 0 __CFG_CCP2MX$PORTC1 0 0 ABS 0 +putch@c 1 0 COMRAM 1 __CFG_CCP3MX$PORTB5 0 0 ABS 0 __Hdata 0 0 ABS 0 __Ldata 0 0 ABS 0 -stackhi 2FF 0 ABS 0 +stackhi 5FF 0 ABS 0 __Htemp 0 0 COMRAM 1 __Ltemp 0 0 COMRAM 1 stacklo 60 0 ABS 0 @@ -84,14 +94,20 @@ __Linit 0 0 CODE 0 __Hintcodelo 0 0 CODE 0 __Lintcodelo 0 0 CODE 0 __Hrbss 0 0 COMRAM 1 -__end_of_main 3FE2 0 CODE 0 +__end_of_main 7F02 0 CODE 0 __Lrbss 0 0 COMRAM 1 __Htext 0 0 ABS 0 __Ltext 0 0 ABS 0 __CFG_LVP$ON 0 0 ABS 0 -end_of_initialization 3FE2 0 CODE 0 +end_of_initialization 7E60 0 CODE 0 +_midi_set_status 7E8A 0 CODE 0 +__end_of_midi_set_channel 7ED4 0 CODE 0 +midi_note_on@channel 8 0 COMRAM 1 +__size_of_putch 0 0 ABS 0 _RCSTAbits FAB 0 ABS 0 _TXSTAbits FAC 0 ABS 0 +_midi_set_channel 7EAE 0 CODE 0 +__size_of_eusart_write_midi 0 0 ABS 0 __Hibigdata 0 0 CODE 0 __Libigdata 0 0 CODE 0 __Hifardata 0 0 CODE 0 @@ -102,20 +118,43 @@ __Hbank1 0 0 ABS 0 __Lbank1 0 0 ABS 0 __Hbank2 0 0 ABS 0 __Lbank2 0 0 ABS 0 +__Hbank3 0 0 ABS 0 +__Lbank3 0 0 ABS 0 +__Hbank4 0 0 ABS 0 +__Lbank4 0 0 ABS 0 +__Hbank5 0 0 ABS 0 +__Lbank5 0 0 ABS 0 __Hpowerup 0 0 CODE 0 __Lpowerup 0 0 CODE 0 __Htext0 0 0 ABS 0 __Ltext0 0 0 ABS 0 +_eusart_write_midi 7F78 0 CODE 0 __Htext1 0 0 ABS 0 __Ltext1 0 0 ABS 0 -__ptext0 3FDC 0 CODE 0 -__ptext1 3FE8 0 CODE 0 +__ptext0 7ED4 0 CODE 0 +__Htext2 0 0 ABS 0 +__Ltext2 0 0 ABS 0 +__ptext1 7F02 0 CODE 0 +__end_of_midi_note_on 7F78 0 CODE 0 +__Htext3 0 0 ABS 0 +__Ltext3 0 0 ABS 0 +__ptext2 7E8A 0 CODE 0 +__Htext4 0 0 ABS 0 +__Ltext4 0 0 ABS 0 +__ptext3 7EAE 0 CODE 0 +__Htext5 0 0 ABS 0 __CFG_P2BMX$PORTD2 0 0 ABS 0 +__Ltext5 0 0 ABS 0 +__ptext4 7F78 0 CODE 0 +__Htext6 0 0 ABS 0 +__Ltext6 0 0 ABS 0 +__ptext5 7E66 0 CODE 0 +__ptext6 7E72 0 CODE 0 __CFG_T3CMX$PORTC0 0 0 ABS 0 __Hclrtext 0 0 ABS 0 __Lclrtext 0 0 ABS 0 __CFG_HFOFST$ON 0 0 ABS 0 -__end_of__initialization 3FE2 0 CODE 0 +__end_of__initialization 7E60 0 CODE 0 __CFG_PRICLKEN$ON 0 0 ABS 0 _BAUDCONbits FB8 0 ABS 0 ___rparam_used 1 0 ABS 0 @@ -123,41 +162,49 @@ __Hidata 0 0 CODE 0 __Lidata 0 0 CODE 0 __Hrdata 0 0 COMRAM 1 __Lrdata 0 0 COMRAM 1 -_eusart_init 3FE8 0 CODE 0 +_eusart_init 7E72 0 CODE 0 __Hidloc 200008 0 IDLOC 0 __Lidloc 200000 0 IDLOC 0 __CFG_PWRTEN$OFF 0 0 ABS 0 __Hstack 0 0 STACK 2 __Lstack 0 0 STACK 2 +_midi_note_on 7F02 0 CODE 0 +midi_set_channel@channel 3 0 COMRAM 1 __Hparam 0 0 COMRAM 1 __Lparam 0 0 COMRAM 1 __Hspace_0 30000E 0 ABS 0 __HcstackCOMRAM 0 0 ABS 0 __Lspace_0 0 0 ABS 0 __LcstackCOMRAM 0 0 ABS 0 -__pcstackCOMRAM 0 0 COMRAM 1 -__Hspace_1 0 0 ABS 0 +__pcstackCOMRAM 1 0 COMRAM 1 +__Hspace_1 15 0 ABS 0 __Lspace_1 0 0 ABS 0 __Hsmallconst 0 0 SMALLCONST 0 __Lsmallconst 0 0 SMALLCONST 0 +eusart_write_midi@length 6 0 COMRAM 1 __Hspace_2 0 0 ABS 0 __Lspace_2 0 0 ABS 0 __Hnvbit 0 0 COMRAM 1 __Lnvbit 0 0 COMRAM 1 __Hcinit 0 0 ABS 0 __Lcinit 0 0 ABS 0 -__pcinit 3FE2 0 CODE 0 +__pcinit 7E60 0 CODE 0 __CFG_EBTRB$OFF 0 0 ABS 0 -__ramtop 300 0 RAM 0 +__ramtop 600 0 RAM 0 __mediumconst 0 0 MEDIUMCONST 0 __size_of_main 0 0 ABS 0 __Hconst 0 0 CONST 0 __Lconst 0 0 CONST 0 __CFG_WRT0$OFF 0 0 ABS 0 __CFG_WRT1$OFF 0 0 ABS 0 +midi_note_on@pkt 6 0 COMRAM 1 __CFG_MCLRE$EXTMCLR 0 0 ABS 0 __CFG_FCMEN$OFF 0 0 ABS 0 +__size_of_midi_set_status 0 0 ABS 0 +midi_note_on@note A 0 COMRAM 1 +midi_set_status@pkt 1 0 COMRAM 1 ___inthi_sp 0 0 STACK 2 +__size_of_midi_set_channel 0 0 ABS 0 ___intlo_sp 0 0 STACK 2 __CFG_CP0$OFF 0 0 ABS 0 __smallconst 0 0 SMALLCONST 0 @@ -166,55 +213,99 @@ __Hreset_vec 0 0 CODE 0 __Lreset_vec 0 0 CODE 0 __CFG_BORV$190 0 0 ABS 0 __accesstop 60 0 ABS 0 +__end_of_midi_set_status 7EAE 0 CODE 0 __Hintcode_body 0 0 ABS 0 __Lintcode_body 0 0 ABS 0 __CFG_PBADEN$ON 0 0 ABS 0 intlevel0 0 0 CODE 0 intlevel1 0 0 CODE 0 __CFG_WRTB$OFF 0 0 ABS 0 +midi_set_status@status 3 0 COMRAM 1 intlevel2 0 0 CODE 0 intlevel3 0 0 CODE 0 __CFG_WRTC$OFF 0 0 ABS 0 -__end_of_eusart_init 4000 0 CODE 0 +__end_of_eusart_init 7E8A 0 CODE 0 __CFG_WRTD$OFF 0 0 ABS 0 __CFG_CPB$OFF 0 0 ABS 0 __CFG_CPD$OFF 0 0 ABS 0 -start_initialization 3FE2 0 CODE 0 +start_initialization 7E60 0 CODE 0 __CFG_BOREN$SBORDIS 0 0 ABS 0 __CFG_IESO$OFF 0 0 ABS 0 -__initialization 3FE2 0 CODE 0 +__initialization 7E60 0 CODE 0 __activetblptr 0 0 ABS 0 %segments reset_vec 0 3 CODE 0 0 config 300000 30000D CONFIG 300000 0 idloc 200000 200007 IDLOC 200000 0 -text1 3FE8 3FFF CODE 3FE8 0 -cinit 3FE2 3FE7 CODE 3FE2 0 -text0 3FDC 3FE1 CODE 3FDC 0 +cstackCOMRAM 1 14 COMRAM 1 1 +text4 7F78 7FFF CODE 7F78 0 +text1 7F02 7F77 CODE 7F02 0 +text0 7ED4 7F01 CODE 7ED4 0 +text3 7EAE 7ED3 CODE 7EAE 0 +text2 7E8A 7EAD CODE 7E8A 0 +text6 7E72 7E89 CODE 7E72 0 +text5 7E66 7E71 CODE 7E66 0 +cinit 7E60 7E65 CODE 7E60 0 %locals dist/default/production\src.production.obj -C:\Program Files\Microchip\xc8\v1.44\include\pic18f44k22.h -C:\Users\_prossn\AppData\Local\Temp\s3s8. -1144 3FE2 0 CODE 0 -1146 3FE2 0 CODE 0 -1149 3FE2 0 CODE 0 -1155 3FE2 0 CODE 0 -1157 3FE2 0 CODE 0 -1158 3FE4 0 CODE 0 +C:\Program Files\Microchip\xc8\v1.44\include\pic18f45k22.h +C:\Users\_prossn\AppData\Local\Temp\s438. +1149 7E60 0 CODE 0 +1151 7E60 0 CODE 0 +1154 7E60 0 CODE 0 +1160 7E60 0 CODE 0 +1162 7E60 0 CODE 0 +1163 7E62 0 CODE 0 main.c -83 3FDC 0 CODE 0 -85 3FDC 0 CODE 0 -88 3FE0 0 CODE 0 +105 7ED4 0 CODE 0 +108 7ED4 0 CODE 0 +110 7EF0 0 CODE 0 +113 7EF4 0 CODE 0 +114 7EF4 0 CODE 0 +113 7F00 0 CODE 0 +midi.c +64 7F02 0 CODE 0 +66 7F02 0 CODE 0 +70 7F0A 0 CODE 0 +71 7F1A 0 CODE 0 +73 7F2E 0 CODE 0 +77 7F42 0 CODE 0 +78 7F52 0 CODE 0 +81 7F62 0 CODE 0 +midi.c +42 7E8A 0 CODE 0 +44 7E8A 0 CODE 0 +48 7E92 0 CODE 0 +midi.c +53 7EAE 0 CODE 0 +55 7EAE 0 CODE 0 +59 7EB6 0 CODE 0 +main.c +81 7F78 0 CODE 0 +83 7F78 0 CODE 0 +87 7F80 0 CODE 0 +91 7F94 0 CODE 0 +92 7FA8 0 CODE 0 +94 7FB4 0 CODE 0 +96 7FDA 0 CODE 0 +97 7FDC 0 CODE 0 +98 7FEE 0 CODE 0 +96 7FEE 0 CODE 0 +rs232.c +23 7E66 0 CODE 0 +25 7E68 0 CODE 0 +26 7E6C 0 CODE 0 +27 7E70 0 CODE 0 rs232.c -4 3FE8 0 CODE 0 -7 3FE8 0 CODE 0 -8 3FEA 0 CODE 0 -11 3FEC 0 CODE 0 -12 3FEE 0 CODE 0 -13 3FF2 0 CODE 0 -14 3FF4 0 CODE 0 -17 3FF6 0 CODE 0 -18 3FF8 0 CODE 0 -19 3FFA 0 CODE 0 -20 3FFC 0 CODE 0 -21 3FFE 0 CODE 0 +4 7E72 0 CODE 0 +7 7E72 0 CODE 0 +8 7E74 0 CODE 0 +11 7E76 0 CODE 0 +12 7E78 0 CODE 0 +13 7E7C 0 CODE 0 +14 7E7E 0 CODE 0 +17 7E80 0 CODE 0 +18 7E82 0 CODE 0 +19 7E84 0 CODE 0 +20 7E86 0 CODE 0 +21 7E88 0 CODE 0 diff --git a/src/main.c b/src/main.c index da15d3a..4fb245a 100644 --- a/src/main.c +++ b/src/main.c @@ -1,6 +1,6 @@ /* * File: main.c - * Author: _prossn + * Author: Naoki Pross 4E * Date: 08.01.2018 * Target: PIC18F44K22 * Version 1.0 @@ -71,21 +71,47 @@ // Use project enums instead of #define for ON and OFF. #include "rs232.h" +#include "midi.h" #include #include #include #include +int eusart_write_midi(midi_message_t *pkt) +{ + if (pkt == NULL) { + return -1; + } + + if (pkt->data == NULL) { + return -2; + } + + size_t length = pkt->data_size; + uint8_t *data = pkt->data; + + putch((char)((pkt->status << 4) | pkt->channel)); + + while (length--) { + putch((char) *(data++)); + } + + return 0; +} + /* main program */ void main(void) { + midi_message_t sample_message; + midi_note_on(&sample_message, 0x0, 0x3C, 0x7F); + eusart_init(); /* main loop */ while (1) { - + eusart_write_midi(&sample_message); } } diff --git a/src/midi.c b/src/midi.c new file mode 100644 index 0000000..e82c921 --- /dev/null +++ b/src/midi.c @@ -0,0 +1,108 @@ +#include "midi.h" + +#include +#include +#include +#include + + +#ifdef MIDI_DYNAMIC_MEMORY_ALLOC +midi_message_t *midi_alloc_message(size_t data_size) +{ + return (midi_message_t *) malloc(sizeof(midi_message_t) + data_size); +} + +void midi_free_message(midi_message_t *pkt) +{ +#ifndef MIDI_UNSAFE + if (pkt == NULL) { + return; + } +#endif + + free(pkt); + pkt = NULL; +} + +size_t midi_message_size(midi_message_t *pkt) +{ + if (pkt == NULL) { + return 0; + } + + switch (pkt->status) { + case NOTE_ON: return sizeof(midi_message_t) + 2; + case NOTE_OFF: return sizeof(midi_message_t) + 1; + default: return sizeof(midi_message_t); + } +} +#endif + + +int midi_set_status(midi_message_t *pkt, midi_status_t status) +{ + if (pkt == NULL) { + return -1; + } + + pkt->status = status & 0x0F; + + return 0; +} + +int midi_set_channel(midi_message_t *pkt, unsigned channel) +{ + if (pkt == NULL) { + return -1; + } + + pkt->channel = channel & 0x0F; + + return 0; +} + +int midi_note_on(midi_message_t *pkt, unsigned channel, midi_note_t note, uint8_t velocity) +{ + if (pkt == NULL) { + return -1; + } + + if (pkt->data == NULL) { + return -2; + } + + midi_set_status(pkt, NOTE_ON); + midi_set_channel(pkt, channel); + + pkt->data[0] = note; + pkt->data[1] = velocity; + +#ifndef MIDI_DYNAMIC_MEMORY_ALLOC + pkt->data_size = 2; +#endif + + return 0; +} + +int midi_note_off(midi_message_t *pkt, unsigned channel, midi_note_t note, uint8_t velocity) +{ + if (pkt == NULL) { + return -1; + } + + if (pkt->data == NULL) { + return -2; + } + + midi_set_status(pkt, NOTE_OFF); + midi_set_channel(pkt, channel); + + pkt->data[0] = note; + pkt->data[1] = velocity; + +#ifndef MIDI_DYNAMIC_MEMORY_ALLOC + pkt->data_size = 2; +#endif + + return 0; +} diff --git a/src/midi.h b/src/midi.h new file mode 100644 index 0000000..cab35e3 --- /dev/null +++ b/src/midi.h @@ -0,0 +1,82 @@ +/* + * File: main.c + * Author: _prossn + * Date: 08.01.2018 + * Version 1.0 + * + * Description: + * C API to work with MIDI formatted data + */ + +#ifndef MIDI_H +#define MIDI_H + +#include +#include + +#ifndef MIDI_DYNAMIC_MEMORY_ALLOC +#define MIDI_DATA_MAX_SIZE 4 +#endif + + +typedef enum { + C = 0, // Do + D = 1, // Re + E = 2, // Mi + F = 3, // Fa + G = 4, // Sol + A = 5, // La + B = 6, // Si +} midi_note_t; + +typedef enum { + NOTE_ON = 0x8, + NOTE_OFF = 0x9, + POLYPHONIC_KEYPRESS = 0xA, + CONTROLLER = 0xB, + PROGRAM_CHANGE = 0xC, + CHANNEL_PRESSURE = 0xD, + PITCH_BLEND = 0xF +} midi_status_t; + + +typedef struct { + unsigned status :4; + unsigned channel :4; + +#ifdef MIDI_DYNAMIC_MEMORY_ALLOC + uint8_t data[]; + +#else + size_t data_size; + uint8_t data[MIDI_DATA_MAX_SIZE]; +#endif +} midi_message_t; + + +/* MIDI API */ +#ifdef MIDI_DYNAMIC_MEMORY_ALLOC + +// allocation / dellocation +extern midi_message_t *midi_alloc_message(size_t data_size); +extern void midi_free_message(midi_message_t *pkt); +extern size_t midi_message_size(midi_message_t *pkt); + +#endif + + +// helper functions + +extern int midi_set_status(midi_message_t *pkt, midi_status_t status); +extern int midi_set_channel(midi_message_t *pkt, unsigned channel); + +// message building +extern int midi_note_on(midi_message_t *pkt, unsigned channel, midi_note_t note, uint8_t velocity); +extern int midi_note_off(midi_message_t *pkt, unsigned channel, midi_note_t note, uint8_t velocity); + +// optimization +// extern int midi_thin_data(void *buffer, midi_message_t pkt[]); + + +#endif /* MIDI_H */ + diff --git a/src/nbproject/Makefile-default.mk b/src/nbproject/Makefile-default.mk index da7a02a..bbe49af 100644 --- a/src/nbproject/Makefile-default.mk +++ b/src/nbproject/Makefile-default.mk @@ -57,17 +57,17 @@ OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE} DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE} # Source Files Quoted if spaced -SOURCEFILES_QUOTED_IF_SPACED=main.c rs232.c +SOURCEFILES_QUOTED_IF_SPACED=main.c rs232.c midi.c # Object Files Quoted if spaced -OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/main.p1 ${OBJECTDIR}/rs232.p1 -POSSIBLE_DEPFILES=${OBJECTDIR}/main.p1.d ${OBJECTDIR}/rs232.p1.d +OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/main.p1 ${OBJECTDIR}/rs232.p1 ${OBJECTDIR}/midi.p1 +POSSIBLE_DEPFILES=${OBJECTDIR}/main.p1.d ${OBJECTDIR}/rs232.p1.d ${OBJECTDIR}/midi.p1.d # Object Files -OBJECTFILES=${OBJECTDIR}/main.p1 ${OBJECTDIR}/rs232.p1 +OBJECTFILES=${OBJECTDIR}/main.p1 ${OBJECTDIR}/rs232.p1 ${OBJECTDIR}/midi.p1 # Source Files -SOURCEFILES=main.c rs232.c +SOURCEFILES=main.c rs232.c midi.c CFLAGS= @@ -89,7 +89,7 @@ ifneq ($(INFORMATION_MESSAGE), ) endif ${MAKE} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/src.${IMAGE_TYPE}.${OUTPUT_SUFFIX} -MP_PROCESSOR_OPTION=18F44K22 +MP_PROCESSOR_OPTION=18F45K22 # ------------------------------------------------------------------------------------ # Rules for buildStep: compile ifeq ($(TYPE_IMAGE), DEBUG_RUN) @@ -109,6 +109,14 @@ ${OBJECTDIR}/rs232.p1: rs232.c nbproject/Makefile-${CND_CONF}.mk @-${MV} ${OBJECTDIR}/rs232.d ${OBJECTDIR}/rs232.p1.d @${FIXDEPS} ${OBJECTDIR}/rs232.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ +${OBJECTDIR}/midi.p1: midi.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}" + @${RM} ${OBJECTDIR}/midi.p1.d + @${RM} ${OBJECTDIR}/midi.p1 + ${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G -D__DEBUG=1 --debugger=icd3 --double=24 --float=24 --emi=wordwrite --opt=+asm,+asmfile,-speed,+space,-debug,-local --addrqual=ignore --mode=free -P -N255 --warn=-3 --asmlist -DXPRJ_default=$(CND_CONF) --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,-plib $(COMPARISON_BUILD) --output=-mcof,+elf:multilocs --stack=compiled:auto:auto:auto "--errformat=%f:%l: error: (%n) %s" "--warnformat=%f:%l: warning: (%n) %s" "--msgformat=%f:%l: advisory: (%n) %s" -o${OBJECTDIR}/midi.p1 midi.c + @-${MV} ${OBJECTDIR}/midi.d ${OBJECTDIR}/midi.p1.d + @${FIXDEPS} ${OBJECTDIR}/midi.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + else ${OBJECTDIR}/main.p1: main.c nbproject/Makefile-${CND_CONF}.mk @${MKDIR} "${OBJECTDIR}" @@ -126,6 +134,14 @@ ${OBJECTDIR}/rs232.p1: rs232.c nbproject/Makefile-${CND_CONF}.mk @-${MV} ${OBJECTDIR}/rs232.d ${OBJECTDIR}/rs232.p1.d @${FIXDEPS} ${OBJECTDIR}/rs232.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ +${OBJECTDIR}/midi.p1: midi.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}" + @${RM} ${OBJECTDIR}/midi.p1.d + @${RM} ${OBJECTDIR}/midi.p1 + ${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G --double=24 --float=24 --emi=wordwrite --opt=+asm,+asmfile,-speed,+space,-debug,-local --addrqual=ignore --mode=free -P -N255 --warn=-3 --asmlist -DXPRJ_default=$(CND_CONF) --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,-plib $(COMPARISON_BUILD) --output=-mcof,+elf:multilocs --stack=compiled:auto:auto:auto "--errformat=%f:%l: error: (%n) %s" "--warnformat=%f:%l: warning: (%n) %s" "--msgformat=%f:%l: advisory: (%n) %s" -o${OBJECTDIR}/midi.p1 midi.c + @-${MV} ${OBJECTDIR}/midi.d ${OBJECTDIR}/midi.p1.d + @${FIXDEPS} ${OBJECTDIR}/midi.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + endif # ------------------------------------------------------------------------------------ diff --git a/src/nbproject/Makefile-genesis.properties b/src/nbproject/Makefile-genesis.properties index b7e886f..251d7a2 100644 --- a/src/nbproject/Makefile-genesis.properties +++ b/src/nbproject/Makefile-genesis.properties @@ -1,7 +1,7 @@ # -#Tue Jan 09 08:34:18 CET 2018 +#Thu Feb 01 16:10:54 CET 2018 default.languagetoolchain.dir=C\:\\Program Files\\Microchip\\xc8\\v1.44\\bin -configurations-xml=e53636da3f169dff17c4b629d53a8e38 +configurations-xml=af2f7bf849f43cec780e74f66603aaa1 com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=5d30ff5128b14865c8a3796a8f0bb8a0 default.languagetoolchain.version=1.44 host.platform=windows diff --git a/src/nbproject/configurations.xml b/src/nbproject/configurations.xml index c04bafb..fd080e3 100644 --- a/src/nbproject/configurations.xml +++ b/src/nbproject/configurations.xml @@ -5,6 +5,7 @@ displayName="Header Files" projectFiles="true"> rs232.h + midi.h main.c rs232.c + midi.c localhost - PIC18F44K22 + PIC18F45K22 ICD3PlatformTool diff --git a/src/nbproject/private/SuppressibleMessageMemo.properties b/src/nbproject/private/SuppressibleMessageMemo.properties new file mode 100644 index 0000000..957bae2 --- /dev/null +++ b/src/nbproject/private/SuppressibleMessageMemo.properties @@ -0,0 +1,3 @@ +# +#Thu Feb 01 11:22:19 CET 2018 +icd3/CHECK_4_HIGH_VOLTAGE_VPP=true diff --git a/src/nbproject/private/configurations.xml b/src/nbproject/private/configurations.xml index 492dbe3..58a3971 100644 --- a/src/nbproject/private/configurations.xml +++ b/src/nbproject/private/configurations.xml @@ -4,7 +4,7 @@ 0 - + :=MPLABComm-USB-Microchip:=<vid>04D8:=<pid>9009:=<rev>0100:=<man>Microchip Technology, Inc. (www.microchip.com):=<prod>MPLAB ICD3 tm (www.microchip.com):=<sn>JIT153520759:=<drv>x:=<xpt>b:=end C:\Program Files\Microchip\xc8\v1.44\bin place holder 1 diff --git a/src/nbproject/private/private.xml b/src/nbproject/private/private.xml index f742160..790aed3 100644 --- a/src/nbproject/private/private.xml +++ b/src/nbproject/private/private.xml @@ -4,8 +4,8 @@ file:/Z:/SAMB_4/projects/xilofono/src/main.c - file:/Z:/SAMB_4/projects/xilofono/src/rs232.h - file:/Z:/SAMB_4/projects/xilofono/src/rs232.c + file:/Z:/SAMB_4/projects/xilofono/src/midi.h + file:/Z:/SAMB_4/projects/xilofono/src/midi.c -- cgit v1.2.1