From 18abece8f8a8af17a3b5e80dc1baf61457409600 Mon Sep 17 00:00:00 2001 From: Nao Pross Date: Fri, 2 Feb 2018 12:12:18 +0100 Subject: 2 February 2018 Documentation: - new API documentation - datasheets for new components - update BOM - update documentation data Hardware: - update schematic for MIDI connector Software: - new MIDI API - update prject target to PIC18F45K22 --- hw/Mids.PcbDoc | Bin 0 -> 768000 bytes hw/Mids.PrjPcb | 1099 ++++++++++++++++ hw/Mids.PrjPcbStructure | 11 + hw/Mids.SchDoc | Bin 0 -> 33792 bytes hw/Mids.SchLib | Bin 0 -> 24576 bytes hw/Piezo.SchDoc | Bin 36352 -> 36352 bytes .../Mids PCB ECO 22.01.2018 13-24-52.LOG | 686 ++++++++++ .../Piezo SCH ECO 22.01.2018 09-20-08.LOG | 5 + .../Steps PCB ECO 02.02.2018 11-25-04.LOG | 51 + .../Steps PCB ECO 02.02.2018 11-26-23.LOG | 51 + .../Steps PCB ECO 02.02.2018 11-35-29.LOG | 44 + .../Steps PCB ECO 02.02.2018 11-35-59.LOG | 51 + .../Steps PCB ECO 19.01.2018 13-52-31.LOG | 289 ++++ .../Steps PCB ECO 19.01.2018 13-58-00.LOG | 1 + .../Steps PCB ECO 19.01.2018 13-59-52.LOG | 1 + .../Steps PCB ECO 19.01.2018 15-21-24.LOG | 33 + .../Steps PCB ECO 22.01.2018 09-16-32.LOG | 37 + .../Steps PCB ECO 22.01.2018 09-17-29.LOG | 1 + .../Steps PCB ECO 22.01.2018 09-22-54.LOG | 10 + .../Steps PCB ECO 22.01.2018 11-47-37.LOG | 1 + .../Steps SCH ECO 22.01.2018 08-59-04.LOG | 9 + .../Steps SCH ECO 22.01.2018 09-10-29.LOG | 9 + .../Steps SCH ECO 22.01.2018 09-20-08.LOG | 21 + .../Steps SCH ECO 22.01.2018 09-21-22.LOG | 9 + .../Design Rule Check - Steps.drc | 286 ++++ .../Design Rule Check - Steps.html | 986 ++++++++++++++ hw/Project Outputs for Xilofono/Xilofono.PDF | Bin 0 -> 164325 bytes hw/Steps.IntLib | Bin 0 -> 41472 bytes hw/Steps.PcbDoc | Bin 1019904 -> 1033216 bytes hw/Steps.PcbLib | Bin 0 -> 152064 bytes hw/Steps.PrjPcb | 1385 ++++++++++++++++++++ hw/Steps.PrjPcbStructure | 16 + hw/Steps.SchDoc | Bin 0 -> 168960 bytes hw/Steps.SchLib | Bin 0 -> 80384 bytes hw/Switchcraft.PcbLib | Bin 0 -> 100864 bytes hw/Switchcraft.SchLib | Bin 0 -> 6656 bytes hw/TestPad.SchLib | Bin 0 -> 4608 bytes hw/Workspace.DsnWrk | 4 + hw/Xilofono.OutJob | 145 ++ hw/Xilofono.PrjPcb | 91 +- hw/Xilofono.PrjPcbStructure | 52 +- hw/Xilofono.SchDoc | Bin 71680 -> 0 bytes hw/debug.log | 124 ++ 43 files changed, 5472 insertions(+), 36 deletions(-) create mode 100644 hw/Mids.PcbDoc create mode 100644 hw/Mids.PrjPcb create mode 100644 hw/Mids.PrjPcbStructure create mode 100644 hw/Mids.SchDoc create mode 100644 hw/Mids.SchLib create mode 100644 hw/Project Logs for Mids/Mids PCB ECO 22.01.2018 13-24-52.LOG create mode 100644 hw/Project Logs for Steps/Piezo SCH ECO 22.01.2018 09-20-08.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-25-04.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-26-23.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-29.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-59.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-52-31.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-58-00.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-59-52.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-16-32.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-17-29.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-22-54.LOG create mode 100644 hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 11-47-37.LOG create mode 100644 hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 08-59-04.LOG create mode 100644 hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-10-29.LOG create mode 100644 hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-20-08.LOG create mode 100644 hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-21-22.LOG create mode 100644 hw/Project Outputs for Steps/Design Rule Check - Steps.drc create mode 100644 hw/Project Outputs for Steps/Design Rule Check - Steps.html create mode 100644 hw/Project Outputs for Xilofono/Xilofono.PDF create mode 100644 hw/Steps.IntLib create mode 100644 hw/Steps.PcbLib create mode 100644 hw/Steps.PrjPcb create mode 100644 hw/Steps.PrjPcbStructure create mode 100644 hw/Steps.SchDoc create mode 100644 hw/Steps.SchLib create mode 100644 hw/Switchcraft.PcbLib create mode 100644 hw/Switchcraft.SchLib create mode 100644 hw/TestPad.SchLib create mode 100644 hw/Xilofono.OutJob delete mode 100644 hw/Xilofono.SchDoc (limited to 'hw') diff --git a/hw/Mids.PcbDoc b/hw/Mids.PcbDoc new file mode 100644 index 0000000..ac70cda Binary files /dev/null and b/hw/Mids.PcbDoc differ diff --git a/hw/Mids.PrjPcb b/hw/Mids.PrjPcb new file mode 100644 index 0000000..a650e60 --- /dev/null +++ b/hw/Mids.PrjPcb @@ -0,0 +1,1099 @@ +[Design] +Version=1.0 +HierarchyMode=0 +ChannelRoomNamingStyle=0 +ReleasesFolder= +ChannelDesignatorFormatString=$Component_$RoomName +ChannelRoomLevelSeperator=_ +OpenOutputs=1 +ArchiveProject=0 +TimestampOutput=0 +SeparateFolders=0 +TemplateLocationPath= +PinSwapBy_Netlabel=1 +PinSwapBy_Pin=1 +AllowPortNetNames=0 +AllowSheetEntryNetNames=0 +AppendSheetNumberToLocalNets=0 +NetlistSinglePinNets=0 +DefaultConfiguration=Sources +UserID=0xFFFFFFFF +DefaultPcbProtel=1 +DefaultPcbPcad=0 +ReorderDocumentsOnCompile=1 +NameNetsHierarchically=1 +PowerPortNamesTakePriority=0 +PushECOToAnnotationFile=1 +DItemRevisionGUID= +ReportSuppressedErrorsInMessages=0 +FSMCodingStyle=eFMSDropDownList_OneProcess +FSMEncodingStyle=eFMSDropDownList_OneHot +OutputPath= +LogFolderPath= +ManagedProjectGUID= +LinkedManagedProjectGUID= +IncludeDesignInRelease=0 + +[Preferences] +PrefsVaultGUID= +PrefsRevisionGUID= + +[Document1] +DocumentPath=Piezo.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=VJJUNBIE + +[Document2] +DocumentPath=Mids.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=ABPFCPLB + +[Document3] +DocumentPath=TestPad.SchLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document4] +DocumentPath=Mids.SchLib +AnnotationEnabled=1 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+Type87=2 +Type88=2 +Type89=1 +Type90=1 +Type91=3 +Type92=3 +Type93=2 +Type94=2 +Type95=2 +Type96=2 +Type97=2 +Type98=0 +Type99=1 +Type100=2 +Type101=1 +Type102=2 +Type103=2 +Type104=1 +Type105=2 +Type106=2 +Type107=2 +Type108=2 +Type109=1 +Type110=1 +Type111=1 +Type112=1 +Type113=1 +MultiChannelAlternate=2 + +[ERC Connection Matrix] +L1=NNNNNNNNNNNWNNNWW +L2=NNWNNNNWWWNWNWNWN +L3=NWEENEEEENEWNEEWN +L4=NNENNNWEENNWNENWN +L5=NNNNNNNNNNNNNNNNN +L6=NNENNNNEENNWNENWN +L7=NNEWNNWEENNWNENWN +L8=NWEENEENEEENNEENN +L9=NWEENEEEENEWNEEWW +L10=NWNNNNNENNEWNNEWN +L11=NNENNNNEEENWNENWN +L12=WWWWNWWNWWWNWWWNN +L13=NNNNNNNNNNNWNNNWW +L14=NWEENEEEENEWNEEWW +L15=NNENNNNEEENWNENWW +L16=WWWWNWWNWWWNWWWNW +L17=WNNNNNNNWNNNWWWWN + +[Annotate] +SortOrder=3 +SortLocation=0 +MatchParameter1=Comment +MatchStrictly1=1 +MatchParameter2=Library Reference +MatchStrictly2=1 +PhysicalNamingFormat=$Component_$RoomName +GlobalIndexSortOrder=3 +GlobalIndexSortLocation=0 + +[PrjClassGen] +CompClassManualEnabled=0 +CompClassManualRoomEnabled=0 +NetClassAutoBusEnabled=1 +NetClassAutoCompEnabled=0 +NetClassAutoNamedHarnessEnabled=0 +NetClassManualEnabled=1 +NetClassSeparateForBusSections=0 + +[LibraryUpdateOptions] +SelectedOnly=0 +UpdateVariants=1 +PartTypes=0 +FullReplace=1 +UpdateDesignatorLock=1 +UpdatePartIDLock=1 +PreserveParameterLocations=1 +PreserveParameterVisibility=1 +DoGraphics=1 +DoParameters=1 +DoModels=1 +AddParameters=0 +RemoveParameters=0 +AddModels=1 +RemoveModels=1 +UpdateCurrentModels=1 + +[DatabaseUpdateOptions] +SelectedOnly=0 +UpdateVariants=1 +PartTypes=0 + +[Comparison Options] +ComparisonOptions0=Kind=Net|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions1=Kind=Net Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions2=Kind=Component Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions3=Kind=Rule|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions4=Kind=Differential Pair|MinPercent=50|MinMatch=1|ShowMatch=0|Confirm=0|UseName=0|InclAllRules=0 +ComparisonOptions5=Kind=Structure Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 + +[SmartPDF] +PageOptions=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 + diff --git a/hw/Mids.PrjPcbStructure b/hw/Mids.PrjPcbStructure new file mode 100644 index 0000000..3a7fd6e --- /dev/null +++ b/hw/Mids.PrjPcbStructure @@ -0,0 +1,11 @@ +Record=TopLevelDocument|FileName=Mids.SchDoc +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ16|SchDesignator=PZ16|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ17|SchDesignator=PZ17|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ18|SchDesignator=PZ18|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ19|SchDesignator=PZ19|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ20|SchDesignator=PZ20|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ21|SchDesignator=PZ21|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ22|SchDesignator=PZ22|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ23|SchDesignator=PZ23|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ24|SchDesignator=PZ24|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ25|SchDesignator=PZ25|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= diff --git a/hw/Mids.SchDoc b/hw/Mids.SchDoc new file mode 100644 index 0000000..6656435 Binary files /dev/null and b/hw/Mids.SchDoc differ diff --git a/hw/Mids.SchLib b/hw/Mids.SchLib new file mode 100644 index 0000000..b64e5ed Binary files /dev/null and b/hw/Mids.SchLib differ diff --git a/hw/Piezo.SchDoc b/hw/Piezo.SchDoc index 0ea38e2..b165d1a 100644 Binary files a/hw/Piezo.SchDoc and b/hw/Piezo.SchDoc differ diff --git a/hw/Project Logs for Mids/Mids PCB ECO 22.01.2018 13-24-52.LOG b/hw/Project Logs for Mids/Mids PCB ECO 22.01.2018 13-24-52.LOG new file mode 100644 index 0000000..705396b --- /dev/null +++ b/hw/Project Logs for Mids/Mids PCB ECO 22.01.2018 13-24-52.LOG @@ -0,0 +1,686 @@ +Added Component: Designator=D1_PZ16(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ17(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ18(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ19(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ20(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ21(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ22(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ23(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ24(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D1_PZ25(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ16(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ17(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ18(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ19(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ20(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ21(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ22(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ23(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ24(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=D2_PZ25(DO-35) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.infineon.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Note"; Value = "Pin 2 is not connected and not drawn."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.5 mm Lead Span"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "21-Mar-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=P1(HDR2X8) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ16(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ17(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ18(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ19(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ20(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ21(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ22(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ23(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ24(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R1_PZ25(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "470K"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ16(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ17(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ18(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ19(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ20(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ21(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ22(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ23(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ24(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=R2_PZ25(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "1M"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ16(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ17(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ18(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ19(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ20(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ21(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ22(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ23(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ24(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=Y1_PZ25(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Pin To Net: NetName=GND Pin=D2_PZ16-1 +Added Pin To Net: NetName=GND Pin=D2_PZ17-1 +Added Pin To Net: NetName=GND Pin=D2_PZ18-1 +Added Pin To Net: NetName=GND Pin=D2_PZ19-1 +Added Pin To Net: NetName=GND Pin=D2_PZ20-1 +Added Pin To Net: NetName=GND Pin=D2_PZ21-1 +Added Pin To Net: NetName=GND Pin=D2_PZ22-1 +Added Pin To Net: NetName=GND Pin=D2_PZ23-1 +Added Pin To Net: NetName=GND Pin=D2_PZ24-1 +Added Pin To Net: NetName=GND Pin=D2_PZ25-1 +Added Pin To Net: NetName=GND Pin=P1-11 +Added Pin To Net: NetName=GND Pin=P1-12 +Added Pin To Net: NetName=GND Pin=P1-13 +Added Pin To Net: NetName=GND Pin=R2_PZ16-1 +Added Pin To Net: NetName=GND Pin=R2_PZ17-1 +Added Pin To Net: NetName=GND Pin=R2_PZ18-1 +Added Pin To Net: NetName=GND Pin=R2_PZ19-1 +Added Pin To Net: NetName=GND Pin=R2_PZ20-1 +Added Pin To Net: NetName=GND Pin=R2_PZ21-1 +Added Pin To Net: NetName=GND Pin=R2_PZ22-1 +Added Pin To Net: NetName=GND Pin=R2_PZ23-1 +Added Pin To Net: NetName=GND Pin=R2_PZ24-1 +Added Pin To Net: NetName=GND Pin=R2_PZ25-1 +Added Pin To Net: NetName=GND Pin=Y1_PZ16-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ17-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ18-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ19-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ20-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ21-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ22-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ23-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ24-2 +Added Pin To Net: NetName=GND Pin=Y1_PZ25-2 +Added Net: Name=GND +Added Pin To Net: NetName=NetR1_PZ16_1 Pin=R1_PZ16-1 +Added Pin To Net: NetName=NetR1_PZ16_1 Pin=R2_PZ16-2 +Added Pin To Net: NetName=NetR1_PZ16_1 Pin=Y1_PZ16-1 +Added Net: Name=NetR1_PZ16_1 +Added Pin To Net: NetName=NetR1_PZ17_1 Pin=R1_PZ17-1 +Added Pin To Net: NetName=NetR1_PZ17_1 Pin=R2_PZ17-2 +Added Pin To Net: NetName=NetR1_PZ17_1 Pin=Y1_PZ17-1 +Added Net: Name=NetR1_PZ17_1 +Added Pin To Net: NetName=NetR1_PZ18_1 Pin=R1_PZ18-1 +Added Pin To Net: NetName=NetR1_PZ18_1 Pin=R2_PZ18-2 +Added Pin To Net: NetName=NetR1_PZ18_1 Pin=Y1_PZ18-1 +Added Net: Name=NetR1_PZ18_1 +Added Pin To Net: NetName=NetR1_PZ19_1 Pin=R1_PZ19-1 +Added Pin To Net: NetName=NetR1_PZ19_1 Pin=R2_PZ19-2 +Added Pin To Net: NetName=NetR1_PZ19_1 Pin=Y1_PZ19-1 +Added Net: Name=NetR1_PZ19_1 +Added Pin To Net: NetName=NetR1_PZ20_1 Pin=R1_PZ20-1 +Added Pin To Net: NetName=NetR1_PZ20_1 Pin=R2_PZ20-2 +Added Pin To Net: NetName=NetR1_PZ20_1 Pin=Y1_PZ20-1 +Added Net: Name=NetR1_PZ20_1 +Added Pin To Net: NetName=NetR1_PZ21_1 Pin=R1_PZ21-1 +Added Pin To Net: NetName=NetR1_PZ21_1 Pin=R2_PZ21-2 +Added Pin To Net: NetName=NetR1_PZ21_1 Pin=Y1_PZ21-1 +Added Net: Name=NetR1_PZ21_1 +Added Pin To Net: NetName=NetR1_PZ22_1 Pin=R1_PZ22-1 +Added Pin To Net: NetName=NetR1_PZ22_1 Pin=R2_PZ22-2 +Added Pin To Net: NetName=NetR1_PZ22_1 Pin=Y1_PZ22-1 +Added Net: Name=NetR1_PZ22_1 +Added Pin To Net: NetName=NetR1_PZ23_1 Pin=R1_PZ23-1 +Added Pin To Net: NetName=NetR1_PZ23_1 Pin=R2_PZ23-2 +Added Pin To Net: NetName=NetR1_PZ23_1 Pin=Y1_PZ23-1 +Added Net: Name=NetR1_PZ23_1 +Added Pin To Net: NetName=NetR1_PZ24_1 Pin=R1_PZ24-1 +Added Pin To Net: NetName=NetR1_PZ24_1 Pin=R2_PZ24-2 +Added Pin To Net: NetName=NetR1_PZ24_1 Pin=Y1_PZ24-1 +Added Net: Name=NetR1_PZ24_1 +Added Pin To Net: NetName=NetR1_PZ25_1 Pin=R1_PZ25-1 +Added Pin To Net: NetName=NetR1_PZ25_1 Pin=R2_PZ25-2 +Added Pin To Net: NetName=NetR1_PZ25_1 Pin=Y1_PZ25-1 +Added Net: Name=NetR1_PZ25_1 +Added Pin To Net: NetName=PZ16 Pin=D1_PZ16-1 +Added Pin To Net: NetName=PZ16 Pin=D2_PZ16-2 +Added Pin To Net: NetName=PZ16 Pin=P1-1 +Added Pin To Net: NetName=PZ16 Pin=R1_PZ16-2 +Added Net: Name=PZ16 +Added Pin To Net: NetName=PZ17 Pin=D1_PZ17-1 +Added Pin To Net: NetName=PZ17 Pin=D2_PZ17-2 +Added Pin To Net: NetName=PZ17 Pin=P1-2 +Added Pin To Net: NetName=PZ17 Pin=R1_PZ17-2 +Added Net: Name=PZ17 +Added Pin To Net: NetName=PZ18 Pin=D1_PZ18-1 +Added Pin To Net: NetName=PZ18 Pin=D2_PZ18-2 +Added Pin To Net: NetName=PZ18 Pin=P1-3 +Added Pin To Net: NetName=PZ18 Pin=R1_PZ18-2 +Added Net: Name=PZ18 +Added Pin To Net: NetName=PZ19 Pin=D1_PZ19-1 +Added Pin To Net: NetName=PZ19 Pin=D2_PZ19-2 +Added Pin To Net: NetName=PZ19 Pin=P1-4 +Added Pin To Net: NetName=PZ19 Pin=R1_PZ19-2 +Added Net: Name=PZ19 +Added Pin To Net: NetName=PZ20 Pin=D1_PZ20-1 +Added Pin To Net: NetName=PZ20 Pin=D2_PZ20-2 +Added Pin To Net: NetName=PZ20 Pin=P1-5 +Added Pin To Net: NetName=PZ20 Pin=R1_PZ20-2 +Added Net: Name=PZ20 +Added Pin To Net: NetName=PZ21 Pin=D1_PZ21-1 +Added Pin To Net: NetName=PZ21 Pin=D2_PZ21-2 +Added Pin To Net: NetName=PZ21 Pin=P1-6 +Added Pin To Net: NetName=PZ21 Pin=R1_PZ21-2 +Added Net: Name=PZ21 +Added Pin To Net: NetName=PZ22 Pin=D1_PZ22-1 +Added Pin To Net: NetName=PZ22 Pin=D2_PZ22-2 +Added Pin To Net: NetName=PZ22 Pin=P1-7 +Added Pin To Net: NetName=PZ22 Pin=R1_PZ22-2 +Added Net: Name=PZ22 +Added Pin To Net: NetName=PZ23 Pin=D1_PZ23-1 +Added Pin To Net: NetName=PZ23 Pin=D2_PZ23-2 +Added Pin To Net: NetName=PZ23 Pin=P1-8 +Added Pin To Net: NetName=PZ23 Pin=R1_PZ23-2 +Added Net: Name=PZ23 +Added Pin To Net: NetName=PZ24 Pin=D1_PZ24-1 +Added Pin To Net: NetName=PZ24 Pin=D2_PZ24-2 +Added Pin To Net: NetName=PZ24 Pin=P1-9 +Added Pin To Net: NetName=PZ24 Pin=R1_PZ24-2 +Added Net: Name=PZ24 +Added Pin To Net: NetName=PZ25 Pin=D1_PZ25-1 +Added Pin To Net: NetName=PZ25 Pin=D2_PZ25-2 +Added Pin To Net: NetName=PZ25 Pin=P1-10 +Added Pin To Net: NetName=PZ25 Pin=R1_PZ25-2 +Added Net: Name=PZ25 +Added Pin To Net: NetName=VCC Pin=D1_PZ16-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ17-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ18-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ19-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ20-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ21-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ22-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ23-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ24-2 +Added Pin To Net: NetName=VCC Pin=D1_PZ25-2 +Added Pin To Net: NetName=VCC Pin=P1-14 +Added Pin To Net: NetName=VCC Pin=P1-15 +Added Pin To Net: NetName=VCC Pin=P1-16 +Added Net: Name=VCC +Added Class: Name=Mids +Added Class: Name=PZ16 +Added Class: Name=PZ17 +Added Class: Name=PZ18 +Added Class: Name=PZ19 +Added Class: Name=PZ20 +Added Class: Name=PZ21 +Added Class: Name=PZ22 +Added Class: Name=PZ23 +Added Class: Name=PZ24 +Added Class: Name=PZ25 +Added Class: Name=Piezo +Added Room: Name=Mids +Added Room: Name=PZ16 +Added Room: Name=PZ17 +Added Room: Name=PZ18 +Added Room: Name=PZ19 +Added Room: Name=PZ20 +Added Room: Name=PZ21 +Added Room: Name=PZ22 +Added Room: Name=PZ23 +Added Room: Name=PZ24 +Added Room: Name=PZ25 diff --git a/hw/Project Logs for Steps/Piezo SCH ECO 22.01.2018 09-20-08.LOG b/hw/Project Logs for Steps/Piezo SCH ECO 22.01.2018 09-20-08.LOG new file mode 100644 index 0000000..528e92c --- /dev/null +++ b/hw/Project Logs for Steps/Piezo SCH ECO 22.01.2018 09-20-08.LOG @@ -0,0 +1,5 @@ +Replace Part D1 Diode BAT18 in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with Diode BAT18 from Miscellaneous Devices.IntLib +Replace Part D2 Diode BAT18 in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with Diode BAT18 from Miscellaneous Devices.IntLib +Replace Part R1 Res2 in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with Res2 from Miscellaneous Devices.IntLib +Replace Part R2 Res2 in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with Res2 from Miscellaneous Devices.IntLib +Replace Part Y1 XTAL in Z:\SAMB_4\projects\xilofono\hw\Piezo.SchDoc with XTAL from Miscellaneous Devices.IntLib diff --git a/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-25-04.LOG b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-25-04.LOG new file mode 100644 index 0000000..17d18c2 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-25-04.LOG @@ -0,0 +1,51 @@ +Removed Pin From Net: NetName=PZ24 Pin=U1-8 +Removed Pin From Net: NetName=PZ22 Pin=U1-29 +Removed Pin From Net: NetName=PZ23 Pin=U1-30 +Added Component: Designator=P4(57PC5FS) +Add component. Clean all parameters for all variants +Added Component: Designator=R4(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=R5(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=TP10(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP11(PIN1) +Add component. Clean all parameters for all variants +Added Pin To Net: NetName=GND Pin=P4-2 +Added Pin To Net: NetName=GND Pin=P4-7 +Added Pin To Net: NetName=VCC Pin=R4-2 +Added Pin To Net: NetName=PZ22 Pin=U1-8 +Added Pin To Net: NetName=PZ23 Pin=U1-9 +Added Pin To Net: NetName=PZ24 Pin=U1-10 +Added Pin To Net: NetName=NetP4_4 Pin=P4-4 +Added Pin To Net: NetName=NetP4_4 Pin=R4-1 +Added Net: Name=NetP4_4 +Added Pin To Net: NetName=NetP4_5 Pin=P4-5 +Added Pin To Net: NetName=NetP4_5 Pin=R5-2 +Added Net: Name=NetP4_5 +Added Pin To Net: NetName=NetR5_1 Pin=R5-1 +Added Pin To Net: NetName=NetR5_1 Pin=TP10-1 +Added Pin To Net: NetName=NetR5_1 Pin=U1-29 +Added Net: Name=NetR5_1 +Added Pin To Net: NetName=NetTP11_1 Pin=TP11-1 +Added Pin To Net: NetName=NetTP11_1 Pin=U1-30 +Added Net: Name=NetTP11_1 +Added Member To Class: ClassName=Steps Member=Component P4 57PC5FS +Added Member To Class: ClassName=Steps Member=Component R4 Res2 +Added Member To Class: ClassName=Steps Member=Component R5 Res2 +Added Member To Class: ClassName=Steps Member=Component TP10 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP11 Test Pad diff --git a/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-26-23.LOG b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-26-23.LOG new file mode 100644 index 0000000..17d18c2 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-26-23.LOG @@ -0,0 +1,51 @@ +Removed Pin From Net: NetName=PZ24 Pin=U1-8 +Removed Pin From Net: NetName=PZ22 Pin=U1-29 +Removed Pin From Net: NetName=PZ23 Pin=U1-30 +Added Component: Designator=P4(57PC5FS) +Add component. Clean all parameters for all variants +Added Component: Designator=R4(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=R5(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=TP10(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP11(PIN1) +Add component. Clean all parameters for all variants +Added Pin To Net: NetName=GND Pin=P4-2 +Added Pin To Net: NetName=GND Pin=P4-7 +Added Pin To Net: NetName=VCC Pin=R4-2 +Added Pin To Net: NetName=PZ22 Pin=U1-8 +Added Pin To Net: NetName=PZ23 Pin=U1-9 +Added Pin To Net: NetName=PZ24 Pin=U1-10 +Added Pin To Net: NetName=NetP4_4 Pin=P4-4 +Added Pin To Net: NetName=NetP4_4 Pin=R4-1 +Added Net: Name=NetP4_4 +Added Pin To Net: NetName=NetP4_5 Pin=P4-5 +Added Pin To Net: NetName=NetP4_5 Pin=R5-2 +Added Net: Name=NetP4_5 +Added Pin To Net: NetName=NetR5_1 Pin=R5-1 +Added Pin To Net: NetName=NetR5_1 Pin=TP10-1 +Added Pin To Net: NetName=NetR5_1 Pin=U1-29 +Added Net: Name=NetR5_1 +Added Pin To Net: NetName=NetTP11_1 Pin=TP11-1 +Added Pin To Net: NetName=NetTP11_1 Pin=U1-30 +Added Net: Name=NetTP11_1 +Added Member To Class: ClassName=Steps Member=Component P4 57PC5FS +Added Member To Class: ClassName=Steps Member=Component R4 Res2 +Added Member To Class: ClassName=Steps Member=Component R5 Res2 +Added Member To Class: ClassName=Steps Member=Component TP10 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP11 Test Pad diff --git a/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-29.LOG b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-29.LOG new file mode 100644 index 0000000..2f12384 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-29.LOG @@ -0,0 +1,44 @@ +Removed Pin From Net: NetName=PZ24 Pin=U1-8 +Removed Pin From Net: NetName=PZ22 Pin=U1-29 +Removed Pin From Net: NetName=PZ23 Pin=U1-30 +Added Component: Designator=R4(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=R5(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=TP10(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP11(PIN1) +Add component. Clean all parameters for all variants +Added Pin To Net: NetName=VCC Pin=R4-2 +Added Pin To Net: NetName=PZ22 Pin=U1-8 +Added Pin To Net: NetName=PZ23 Pin=U1-9 +Added Pin To Net: NetName=PZ24 Pin=U1-10 +Added Pin To Net: NetName=NetP4_4 Pin=R4-1 +Added Net: Name=NetP4_4 +Added Pin To Net: NetName=NetP4_5 Pin=R5-2 +Added Net: Name=NetP4_5 +Added Pin To Net: NetName=NetR5_1 Pin=R5-1 +Added Pin To Net: NetName=NetR5_1 Pin=TP10-1 +Added Pin To Net: NetName=NetR5_1 Pin=U1-29 +Added Net: Name=NetR5_1 +Added Pin To Net: NetName=NetTP11_1 Pin=TP11-1 +Added Pin To Net: NetName=NetTP11_1 Pin=U1-30 +Added Net: Name=NetTP11_1 +Added Member To Class: ClassName=Steps Member=Component R4 Res2 +Added Member To Class: ClassName=Steps Member=Component R5 Res2 +Added Member To Class: ClassName=Steps Member=Component TP10 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP11 Test Pad diff --git a/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-59.LOG b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-59.LOG new file mode 100644 index 0000000..17d18c2 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 02.02.2018 11-35-59.LOG @@ -0,0 +1,51 @@ +Removed Pin From Net: NetName=PZ24 Pin=U1-8 +Removed Pin From Net: NetName=PZ22 Pin=U1-29 +Removed Pin From Net: NetName=PZ23 Pin=U1-30 +Added Component: Designator=P4(57PC5FS) +Add component. Clean all parameters for all variants +Added Component: Designator=R4(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=R5(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "220"; VariantName = "[No Variations]" +Added Component: Designator=TP10(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP11(PIN1) +Add component. Clean all parameters for all variants +Added Pin To Net: NetName=GND Pin=P4-2 +Added Pin To Net: NetName=GND Pin=P4-7 +Added Pin To Net: NetName=VCC Pin=R4-2 +Added Pin To Net: NetName=PZ22 Pin=U1-8 +Added Pin To Net: NetName=PZ23 Pin=U1-9 +Added Pin To Net: NetName=PZ24 Pin=U1-10 +Added Pin To Net: NetName=NetP4_4 Pin=P4-4 +Added Pin To Net: NetName=NetP4_4 Pin=R4-1 +Added Net: Name=NetP4_4 +Added Pin To Net: NetName=NetP4_5 Pin=P4-5 +Added Pin To Net: NetName=NetP4_5 Pin=R5-2 +Added Net: Name=NetP4_5 +Added Pin To Net: NetName=NetR5_1 Pin=R5-1 +Added Pin To Net: NetName=NetR5_1 Pin=TP10-1 +Added Pin To Net: NetName=NetR5_1 Pin=U1-29 +Added Net: Name=NetR5_1 +Added Pin To Net: NetName=NetTP11_1 Pin=TP11-1 +Added Pin To Net: NetName=NetTP11_1 Pin=U1-30 +Added Net: Name=NetTP11_1 +Added Member To Class: ClassName=Steps Member=Component P4 57PC5FS +Added Member To Class: ClassName=Steps Member=Component R4 Res2 +Added Member To Class: ClassName=Steps Member=Component R5 Res2 +Added Member To Class: ClassName=Steps Member=Component TP10 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP11 Test Pad diff --git a/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-52-31.LOG b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-52-31.LOG new file mode 100644 index 0000000..5172025 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-52-31.LOG @@ -0,0 +1,289 @@ +Removed Pin From Net: NetName=VCC Pin=U1-1 +Removed Pin From Net: NetName=NetPZ25_D1_1 Pin=U1-8 +Removed Pin From Net: NetName=NetPZ23_D1_1 Pin=U1-29 +Removed Pin From Net: NetName=NetPZ24_D1_1 Pin=U1-30 +Removed Pin From Net: NetName=NetPZ14_D1_1 Pin=U1-38 +Removed Pin From Net: NetName=NetPZ15_D1_1 Pin=U1-39 +Removed Pin From Net: NetName=NetPZ16_D1_1 Pin=U1-40 +Change Component Designator: OldDesignator=PZ1_D1 NewDesignator=D1_PZ1 +Change Component Designator: OldDesignator=PZ1_D2 NewDesignator=D2_PZ1 +Change Component Designator: OldDesignator=PZ1_R1 NewDesignator=R1_PZ1 +Change Component Designator: OldDesignator=PZ1_R2 NewDesignator=R2_PZ1 +Change Component Designator: OldDesignator=PZ1_Y1 NewDesignator=Y1_PZ1 +Change Component Designator: OldDesignator=PZ2_D1 NewDesignator=D1_PZ2 +Change Component Designator: OldDesignator=PZ2_D2 NewDesignator=D2_PZ2 +Change Component Designator: OldDesignator=PZ2_R1 NewDesignator=R1_PZ2 +Change Component Designator: OldDesignator=PZ2_R2 NewDesignator=R2_PZ2 +Change Component Designator: OldDesignator=PZ2_Y1 NewDesignator=Y1_PZ2 +Change Component Designator: OldDesignator=PZ3_D1 NewDesignator=D1_PZ3 +Change Component Designator: OldDesignator=PZ3_D2 NewDesignator=D2_PZ3 +Change Component Designator: OldDesignator=PZ3_R1 NewDesignator=R1_PZ3 +Change Component Designator: OldDesignator=PZ3_R2 NewDesignator=R2_PZ3 +Change Component Designator: OldDesignator=PZ3_Y1 NewDesignator=Y1_PZ3 +Change Component Designator: OldDesignator=PZ4_D1 NewDesignator=D1_PZ4 +Change Component Designator: OldDesignator=PZ4_D2 NewDesignator=D2_PZ4 +Change Component Designator: OldDesignator=PZ4_R1 NewDesignator=R1_PZ4 +Change Component Designator: OldDesignator=PZ4_R2 NewDesignator=R2_PZ4 +Change Component Designator: OldDesignator=PZ4_Y1 NewDesignator=Y1_PZ4 +Change Component Designator: OldDesignator=PZ5_D1 NewDesignator=D1_PZ5 +Change Component Designator: OldDesignator=PZ5_D2 NewDesignator=D2_PZ5 +Change Component Designator: OldDesignator=PZ5_R1 NewDesignator=R1_PZ5 +Change Component Designator: OldDesignator=PZ5_R2 NewDesignator=R2_PZ5 +Change Component Designator: OldDesignator=PZ5_Y1 NewDesignator=Y1_PZ5 +Change Component Designator: OldDesignator=PZ6_D1 NewDesignator=D1_PZ6 +Change Component Designator: OldDesignator=PZ6_D2 NewDesignator=D2_PZ6 +Change Component Designator: OldDesignator=PZ6_R1 NewDesignator=R1_PZ6 +Change Component Designator: OldDesignator=PZ6_R2 NewDesignator=R2_PZ6 +Change Component Designator: OldDesignator=PZ6_Y1 NewDesignator=Y1_PZ6 +Change Component Designator: OldDesignator=PZ7_D1 NewDesignator=D1_PZ7 +Change Component Designator: OldDesignator=PZ7_D2 NewDesignator=D2_PZ7 +Change Component Designator: OldDesignator=PZ7_R1 NewDesignator=R1_PZ7 +Change Component Designator: OldDesignator=PZ7_R2 NewDesignator=R2_PZ7 +Change Component Designator: OldDesignator=PZ7_Y1 NewDesignator=Y1_PZ7 +Change Component Designator: OldDesignator=PZ8_D1 NewDesignator=D1_PZ8 +Change Component Designator: OldDesignator=PZ8_D2 NewDesignator=D2_PZ8 +Change Component Designator: OldDesignator=PZ8_R1 NewDesignator=R1_PZ8 +Change Component Designator: OldDesignator=PZ8_R2 NewDesignator=R2_PZ8 +Change Component Designator: OldDesignator=PZ8_Y1 NewDesignator=Y1_PZ8 +Change Component Designator: OldDesignator=PZ9_D1 NewDesignator=D1_PZ9 +Change Component Designator: OldDesignator=PZ9_D2 NewDesignator=D2_PZ9 +Change Component Designator: OldDesignator=PZ9_R1 NewDesignator=R1_PZ9 +Change Component Designator: OldDesignator=PZ9_R2 NewDesignator=R2_PZ9 +Change Component Designator: OldDesignator=PZ9_Y1 NewDesignator=Y1_PZ9 +Change Component Designator: OldDesignator=PZ10_D1 NewDesignator=D1_PZ10 +Change Component Designator: OldDesignator=PZ10_D2 NewDesignator=D2_PZ10 +Change Component Designator: OldDesignator=PZ10_R1 NewDesignator=R1_PZ10 +Change Component Designator: OldDesignator=PZ10_R2 NewDesignator=R2_PZ10 +Change Component Designator: OldDesignator=PZ10_Y1 NewDesignator=Y1_PZ10 +Change Component Designator: OldDesignator=PZ11_D1 NewDesignator=D1_PZ11 +Change Component Designator: OldDesignator=PZ11_D2 NewDesignator=D2_PZ11 +Change Component Designator: OldDesignator=PZ11_R1 NewDesignator=R1_PZ11 +Change Component Designator: OldDesignator=PZ11_R2 NewDesignator=R2_PZ11 +Change Component Designator: OldDesignator=PZ11_Y1 NewDesignator=Y1_PZ11 +Change Component Designator: OldDesignator=PZ12_D1 NewDesignator=D1_PZ12 +Change Component Designator: OldDesignator=PZ12_D2 NewDesignator=D2_PZ12 +Change Component Designator: OldDesignator=PZ12_R1 NewDesignator=R1_PZ12 +Change Component Designator: OldDesignator=PZ12_R2 NewDesignator=R2_PZ12 +Change Component Designator: OldDesignator=PZ12_Y1 NewDesignator=Y1_PZ12 +Change Component Designator: OldDesignator=PZ13_D1 NewDesignator=D1_PZ13 +Change Component Designator: OldDesignator=PZ13_D2 NewDesignator=D2_PZ13 +Change Component Designator: OldDesignator=PZ13_R1 NewDesignator=R1_PZ13 +Change Component Designator: OldDesignator=PZ13_R2 NewDesignator=R2_PZ13 +Change Component Designator: OldDesignator=PZ13_Y1 NewDesignator=Y1_PZ13 +Change Component Designator: OldDesignator=PZ14_D1 NewDesignator=D1_PZ14 +Change Component Designator: OldDesignator=PZ14_D2 NewDesignator=D2_PZ14 +Change Component Designator: OldDesignator=PZ14_R1 NewDesignator=R1_PZ14 +Change Component Designator: OldDesignator=PZ14_R2 NewDesignator=R2_PZ14 +Change Component Designator: OldDesignator=PZ14_Y1 NewDesignator=Y1_PZ14 +Change Component Designator: OldDesignator=PZ15_D1 NewDesignator=D1_PZ15 +Change Component Designator: OldDesignator=PZ15_D2 NewDesignator=D2_PZ15 +Change Component Designator: OldDesignator=PZ15_R1 NewDesignator=R1_PZ15 +Change Component Designator: OldDesignator=PZ15_R2 NewDesignator=R2_PZ15 +Change Component Designator: OldDesignator=PZ15_Y1 NewDesignator=Y1_PZ15 +Added Component: Designator=C1(CAPR5-4X5) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "PackageDescription"; Value = "Capacitor; 2 Leads"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "CAPR5-4X5"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "23-Sep-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "100nF"; VariantName = "[No Variations]" +Added Component: Designator=D1(LED-1) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "08-Jul-2005"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Mech Layer 1 removed."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "LED; 2 Leads"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "LED-1"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=P1(HDR2X8) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=P2(HDR1X6) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=P3(HDR1X4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=R1(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]" +Added Component: Designator=R2(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]" +Added Component: Designator=R3(AXIAL-0.4) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.4 in Pin Spacing"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.4"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Value"; Value = "270"; VariantName = "[No Variations]" +Added Component: Designator=S1(TL36WW15050) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.apem.com"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "05-Dec-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Dec-2003"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Schematic revised, PCB Footprint replaced."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "Switch; 4 Leads"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "TL36WW15050"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "24-Mar-1999"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=U2(N014) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.ti.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink2Description"; Value = "Datasheet"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink2URL"; Value = "http://www-s.ti.com/sc/ds/sn74f125.pdf"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetVersion"; Value = "Oct-1993"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "06-Jun-2005"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Stylized 3D Model Added."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDescription"; Value = "DIP; 14 Leads; Row Spacing 7.62 mm; Pitch 2.54 mm"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "N014"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageVersion"; Value = "Oct-1995"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Pin To Net: NetName=VCC Pin=C1-1 +Added Pin To Net: NetName=GND Pin=C1-2 +Added Pin To Net: NetName=NetPZ24_R1_1 Pin=D1-1 +Added Pin To Net: NetName=GND Pin=D1-2 +Added Pin To Net: NetName=NetPZ23_R1_1 Pin=P1-1 +Added Pin To Net: NetName=GND Pin=P1-11 +Added Pin To Net: NetName=GND Pin=P1-12 +Added Pin To Net: NetName=GND Pin=P1-13 +Added Pin To Net: NetName=VCC Pin=P1-14 +Added Pin To Net: NetName=VCC Pin=P1-15 +Added Pin To Net: NetName=VCC Pin=P1-16 +Added Pin To Net: NetName=NetPZ25_R1_1 Pin=P2-1 +Added Pin To Net: NetName=VCC Pin=P2-2 +Added Pin To Net: NetName=GND Pin=P2-3 +Added Pin To Net: NetName=NetPZ23_R1_1 Pin=P2-4 +Added Pin To Net: NetName=NetPZ24_D1_1 Pin=P2-5 +Added Pin To Net: NetName=NetPZ23_D1_1 Pin=P2-6 +Added Pin To Net: NetName=VCC Pin=P3-1 +Added Pin To Net: NetName=NetPZ16_D1_1 Pin=P3-2 +Added Pin To Net: NetName=NetPZ16_R1_1 Pin=P3-3 +Added Pin To Net: NetName=GND Pin=P3-4 +Added Pin To Net: NetName=NetPZ25_R1_1 Pin=R1-1 +Added Pin To Net: NetName=VCC Pin=R1-2 +Added Pin To Net: NetName=GND Pin=R2-1 +Added Pin To Net: NetName=NetPZ23_D1_1 Pin=R2-2 +Added Pin To Net: NetName=NetPZ24_R1_1 Pin=R3-1 +Added Pin To Net: NetName=NetPZ25_D1_1 Pin=R3-2 +Added Pin To Net: NetName=VCC Pin=S1-1 +Added Pin To Net: NetName=NetPZ25_D1_1 Pin=S1-2 +Added Pin To Net: NetName=GND Pin=S1-3 +Added Pin To Net: NetName=NetPZ25_R1_1 Pin=U1-1 +Added Pin To Net: NetName=NetPZ23_R1_1 Pin=U1-19 +Added Pin To Net: NetName=NetPZ16_D1_1 Pin=U1-25 +Added Pin To Net: NetName=NetPZ16_R1_1 Pin=U1-26 +Added Pin To Net: NetName=NetPZ23_D1_1 Pin=U1-38 +Added Pin To Net: NetName=NetPZ24_D1_1 Pin=U1-39 +Added Pin To Net: NetName=NetPZ23_R1_1 Pin=U1-40 +Added Pin To Net: NetName=NetPZ25_D1_1 Pin=U2-1 +Added Pin To Net: NetName=NetPZ14_D1_1 Pin=U2-2 +Added Pin To Net: NetName=NetPZ23_R1_1 Pin=U2-3 +Added Pin To Net: NetName=NetPZ25_D1_1 Pin=U2-4 +Added Pin To Net: NetName=NetPZ15_D1_1 Pin=U2-5 +Added Pin To Net: NetName=NetPZ24_D1_1 Pin=U2-6 +Added Pin To Net: NetName=GND Pin=U2-7 +Added Pin To Net: NetName=NetPZ23_D1_1 Pin=U2-8 +Added Pin To Net: NetName=NetPZ25_D1_1 Pin=U2-10 +Added Pin To Net: NetName=VCC Pin=U2-14 +Change Net Name : Old Net Name=NetPZ1_D1_1 New Net Name=PZ1 +Change Net Name : Old Net Name=NetPZ1_R1_1 New Net Name=NetR1_PZ1_1 +Change Net Name : Old Net Name=NetPZ2_D1_1 New Net Name=PZ2 +Change Net Name : Old Net Name=NetPZ2_R1_1 New Net Name=NetR1_PZ2_1 +Change Net Name : Old Net Name=NetPZ3_D1_1 New Net Name=PZ3 +Change Net Name : Old Net Name=NetPZ3_R1_1 New Net Name=NetR1_PZ3_1 +Change Net Name : Old Net Name=NetPZ4_D1_1 New Net Name=PZ4 +Change Net Name : Old Net Name=NetPZ4_R1_1 New Net Name=NetR1_PZ4_1 +Change Net Name : Old Net Name=NetPZ5_D1_1 New Net Name=PZ5 +Change Net Name : Old Net Name=NetPZ5_R1_1 New Net Name=NetR1_PZ5_1 +Change Net Name : Old Net Name=NetPZ6_D1_1 New Net Name=PZ6 +Change Net Name : Old Net Name=NetPZ6_R1_1 New Net Name=NetR1_PZ6_1 +Change Net Name : Old Net Name=NetPZ7_D1_1 New Net Name=PZ7 +Change Net Name : Old Net Name=NetPZ7_R1_1 New Net Name=NetR1_PZ7_1 +Change Net Name : Old Net Name=NetPZ8_D1_1 New Net Name=PZ8 +Change Net Name : Old Net Name=NetPZ8_R1_1 New Net Name=NetR1_PZ8_1 +Change Net Name : Old Net Name=NetPZ9_D1_1 New Net Name=PZ9 +Change Net Name : Old Net Name=NetPZ9_R1_1 New Net Name=NetR1_PZ9_1 +Change Net Name : Old Net Name=NetPZ10_D1_1 New Net Name=PZ10 +Change Net Name : Old Net Name=NetPZ10_R1_1 New Net Name=NetR1_PZ10_1 +Change Net Name : Old Net Name=NetPZ11_D1_1 New Net Name=PZ11 +Change Net Name : Old Net Name=NetPZ11_R1_1 New Net Name=NetR1_PZ11_1 +Change Net Name : Old Net Name=NetPZ12_D1_1 New Net Name=PZ12 +Change Net Name : Old Net Name=NetPZ12_R1_1 New Net Name=NetR1_PZ12_1 +Change Net Name : Old Net Name=NetPZ13_D1_1 New Net Name=PZ13 +Change Net Name : Old Net Name=NetPZ13_R1_1 New Net Name=NetR1_PZ13_1 +Change Net Name : Old Net Name=NetPZ14_D1_1 New Net Name=NetU2_2 +Change Net Name : Old Net Name=NetPZ14_R1_1 New Net Name=NetR1_PZ14_1 +Change Net Name : Old Net Name=NetPZ15_D1_1 New Net Name=NetU2_5 +Change Net Name : Old Net Name=NetPZ15_R1_1 New Net Name=NetR1_PZ15_1 +Change Net Name : Old Net Name=NetPZ16_D1_1 New Net Name=TX +Change Net Name : Old Net Name=NetPZ16_R1_1 New Net Name=RX +Change Net Name : Old Net Name=NetPZ23_D1_1 New Net Name=PGM +Change Net Name : Old Net Name=NetPZ23_R1_1 New Net Name=PGD +Change Net Name : Old Net Name=NetPZ24_D1_1 New Net Name=PGC +Change Net Name : Old Net Name=NetPZ24_R1_1 New Net Name=NetD1_1 +Change Net Name : Old Net Name=NetPZ25_D1_1 New Net Name=NetR3_2 +Change Net Name : Old Net Name=NetPZ25_R1_1 New Net Name=M\C\L\R\ +Added Pin To Net: NetName=PZ17 Pin=P1-2 +Added Pin To Net: NetName=PZ17 Pin=U1-20 +Added Net: Name=PZ17 +Added Pin To Net: NetName=PZ18 Pin=P1-3 +Added Pin To Net: NetName=PZ18 Pin=U1-21 +Added Net: Name=PZ18 +Added Pin To Net: NetName=PZ19 Pin=P1-4 +Added Pin To Net: NetName=PZ19 Pin=U1-22 +Added Net: Name=PZ19 +Added Pin To Net: NetName=PZ20 Pin=P1-5 +Added Pin To Net: NetName=PZ20 Pin=U1-27 +Added Net: Name=PZ20 +Added Pin To Net: NetName=PZ21 Pin=P1-6 +Added Pin To Net: NetName=PZ21 Pin=U1-28 +Added Net: Name=PZ21 +Added Pin To Net: NetName=PZ22 Pin=P1-7 +Added Pin To Net: NetName=PZ22 Pin=U1-29 +Added Net: Name=PZ22 +Added Pin To Net: NetName=PZ23 Pin=P1-8 +Added Pin To Net: NetName=PZ23 Pin=U1-30 +Added Net: Name=PZ23 +Added Pin To Net: NetName=PZ24 Pin=P1-9 +Added Pin To Net: NetName=PZ24 Pin=U1-8 +Added Net: Name=PZ24 +Added Pin To Net: NetName=PZ25 Pin=P1-10 +Added Pin To Net: NetName=PZ25 Pin=U2-9 +Added Net: Name=PZ25 +Change Class Name : Old Net Name=Xilofono New Net Name=Steps +Added Member To Class: ClassName=Steps Member=Component C1 Cap2 +Added Member To Class: ClassName=Steps Member=Component D1 LED1 +Added Member To Class: ClassName=Steps Member=Component P1 Bridge +Added Member To Class: ClassName=Steps Member=Component P2 LVISP +Added Member To Class: ClassName=Steps Member=Component P3 RS232 +Added Member To Class: ClassName=Steps Member=Component R1 Res2 +Added Member To Class: ClassName=Steps Member=Component R2 Res2 +Added Member To Class: ClassName=Steps Member=Component R3 Res2 +Added Member To Class: ClassName=Steps Member=Component S1 SW-SPDT +Added Member To Class: ClassName=Steps Member=Component U2 SN74F125N +Change Room Name: Old Name=Xilofono New Name=Steps +Change Room Scope: Old Scope=InComponentClass('Xilofono') New Scope=InComponentClass('Steps') diff --git a/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-58-00.LOG b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-58-00.LOG new file mode 100644 index 0000000..4428861 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-58-00.LOG @@ -0,0 +1 @@ +Change Component Footprint: Designator=S1 Old Footprint=TL36WW15050 New Footprint=HDR1X3 diff --git a/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-59-52.LOG b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-59-52.LOG new file mode 100644 index 0000000..62991c3 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 13-59-52.LOG @@ -0,0 +1 @@ +Change Component Footprint: Designator=D1 Old Footprint=LED-1 New Footprint=BAT-2 diff --git a/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG new file mode 100644 index 0000000..60e5407 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 19.01.2018 15-21-24.LOG @@ -0,0 +1,33 @@ +Removed Pin From Net: NetName=M\C\L\R\ Pin=P2-1 +Removed Pin From Net: NetName=VCC Pin=P2-2 +Removed Pin From Net: NetName=GND Pin=P2-3 +Removed Pin From Net: NetName=PGD Pin=P2-4 +Removed Pin From Net: NetName=PGC Pin=P2-5 +Removed Pin From Net: NetName=PGM Pin=P2-6 +Removed Member From Class: ClassName=Steps Member=P2 +Added Component: Designator=J1(95001-2661) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "ComponentLink1Description"; Value = "Manufacturer Link"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink1URL"; Value = "http://www.molex.com/"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink2Description"; Value = "Datasheet"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink2URL"; Value = "http://www.molex.com/cmc_upload/common_files/1222003_mx95001b.pdf"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink3Description"; Value = "Iges Model"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "ComponentLink3URL"; Value = "http://www.molex.com/pdm_docs/igs/95001-2441_igs.zip"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DatasheetDocument"; Value = "17-Dec-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "DrillSize"; Value = "Nominal, Rounded to nearest 0.05mm"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageDocument"; Value = "17-Dec-2001"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PackageReference"; Value = "95001-2661"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PCB_Layout"; Value = "Complies with Manufacturer's Recommendation."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PCB_Mounting"; Value = "Thru-Hole"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "PerformanceCategory"; Value = "3"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Ports"; Value = "1"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Positions/Loaded"; Value = "Port1 - 6/6"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Published"; Value = "25-Jun-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Pin To Net: NetName=M\C\L\R\ Pin=J1-1 +Added Pin To Net: NetName=VCC Pin=J1-2 +Added Pin To Net: NetName=GND Pin=J1-3 +Added Pin To Net: NetName=PGD Pin=J1-4 +Added Pin To Net: NetName=PGC Pin=J1-5 +Added Pin To Net: NetName=PGM Pin=J1-6 +Added Member To Class: ClassName=Steps Member=Component J1 95001-2661 diff --git a/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-16-32.LOG b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-16-32.LOG new file mode 100644 index 0000000..580a188 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-16-32.LOG @@ -0,0 +1,37 @@ +Change Component Comment : Designator=J1 Old Comment=95001-2661 New Comment=LVPICSP +Change Component Designator: OldDesignator=P1 NewDesignator=P2 +Added Component: Designator=P1(HDR1X2) +Add component. Clean all parameters for all variants +Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]" +Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]" +Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]" +Added Component: Designator=TP1(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP2(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP3(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP4(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP5(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP6(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP7(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP8(PIN1) +Add component. Clean all parameters for all variants +Added Component: Designator=TP9(PIN1) +Add component. Clean all parameters for all variants +Added Pin To Net: NetName=VCC Pin=P1-1 +Added Pin To Net: NetName=GND Pin=P1-2 +Added Member To Class: ClassName=Steps Member=Component P2 Bridge +Added Member To Class: ClassName=Steps Member=Component TP1 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP2 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP3 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP4 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP5 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP6 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP7 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP8 Test Pad +Added Member To Class: ClassName=Steps Member=Component TP9 Test Pad diff --git a/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-17-29.LOG b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-17-29.LOG new file mode 100644 index 0000000..693d813 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-17-29.LOG @@ -0,0 +1 @@ +Added Member To Class: ClassName=Steps Member=Component P1 PWR diff --git a/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-22-54.LOG b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-22-54.LOG new file mode 100644 index 0000000..d54f779 --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 09-22-54.LOG @@ -0,0 +1,10 @@ +Added Pin To Net: NetName=VCC Pin=TP1-1 +Added Pin To Net: NetName=GND Pin=TP2-1 +Added Pin To Net: NetName=NetR3_2 Pin=TP3-1 +Added Pin To Net: NetName=TX Pin=TP4-1 +Added Pin To Net: NetName=M\C\L\R\ Pin=TP5-1 +Added Pin To Net: NetName=RX Pin=TP6-1 +Added Pin To Net: NetName=PGD Pin=TP7-1 +Added Pin To Net: NetName=PGC Pin=TP8-1 +Added Pin To Net: NetName=PGM Pin=TP9-1 +Added Member To Class: ClassName=Steps Member=Component P1 PWR diff --git a/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 11-47-37.LOG b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 11-47-37.LOG new file mode 100644 index 0000000..c93373f --- /dev/null +++ b/hw/Project Logs for Steps/Steps PCB ECO 22.01.2018 11-47-37.LOG @@ -0,0 +1 @@ +Change Component Footprint: Designator=P1 Old Footprint=HDR1X2 New Footprint=RT01502HDWC diff --git a/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 08-59-04.LOG b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 08-59-04.LOG new file mode 100644 index 0000000..5c94d4e --- /dev/null +++ b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 08-59-04.LOG @@ -0,0 +1,9 @@ +Change Component Designator: Old Designator=TP? New Designator=TP1 +Change Component Designator: Old Designator=TP? New Designator=TP2 +Change Component Designator: Old Designator=TP? New Designator=TP3 +Change Component Designator: Old Designator=TP? New Designator=TP4 +Change Component Designator: Old Designator=TP? New Designator=TP5 +Change Component Designator: Old Designator=TP? New Designator=TP6 +Change Component Designator: Old Designator=TP? New Designator=TP7 +Change Component Designator: Old Designator=TP? New Designator=TP8 +Change Component Designator: Old Designator=TP? New Designator=TP9 diff --git a/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-10-29.LOG b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-10-29.LOG new file mode 100644 index 0000000..5c94d4e --- /dev/null +++ b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-10-29.LOG @@ -0,0 +1,9 @@ +Change Component Designator: Old Designator=TP? New Designator=TP1 +Change Component Designator: Old Designator=TP? New Designator=TP2 +Change Component Designator: Old Designator=TP? New Designator=TP3 +Change Component Designator: Old Designator=TP? New Designator=TP4 +Change Component Designator: Old Designator=TP? New Designator=TP5 +Change Component Designator: Old Designator=TP? New Designator=TP6 +Change Component Designator: Old Designator=TP? New Designator=TP7 +Change Component Designator: Old Designator=TP? New Designator=TP8 +Change Component Designator: Old Designator=TP? New Designator=TP9 diff --git a/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-20-08.LOG b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-20-08.LOG new file mode 100644 index 0000000..5838463 --- /dev/null +++ b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-20-08.LOG @@ -0,0 +1,21 @@ +Replace Part C1 Cap2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Cap2 from Miscellaneous Devices.IntLib +Replace Part D1 LED1 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with LED1 from Miscellaneous Devices.IntLib +Replace Part J1 95001-2661 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with 95001-2661 from Molex Modular Jack Right Angle.IntLib +Replace Part P1 Header 2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Header 2 from Miscellaneous Connectors.IntLib +Replace Part P2 Header 16 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Header 16 from Miscellaneous Connectors.IntLib +Replace Part P3 Header 4 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Header 4 from Miscellaneous Connectors.IntLib +Replace Part R1 Res2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Res2 from Miscellaneous Devices.IntLib +Replace Part R2 Res2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Res2 from Miscellaneous Devices.IntLib +Replace Part R3 Res2 in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with Res2 from Miscellaneous Devices.IntLib +Replace Part S1 SW-SPDT in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with SW-SPDT from Miscellaneous Devices.IntLib +Replace Part TP1 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP2 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP3 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP4 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP5 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP6 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP7 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP8 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP9 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part U1 PIC18F44K20-I/P in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with PIC18F44K20-I/P from Microchip Microcontroller 8-Bit PIC18.IntLib +Replace Part U2 SN74F125N in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with SN74F125N from TI Logic Buffer Line Driver.IntLib diff --git a/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-21-22.LOG b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-21-22.LOG new file mode 100644 index 0000000..4bc089f --- /dev/null +++ b/hw/Project Logs for Steps/Steps SCH ECO 22.01.2018 09-21-22.LOG @@ -0,0 +1,9 @@ +Replace Part TP1 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP2 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP3 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP4 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP5 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP6 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP7 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP8 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib +Replace Part TP9 TestPad in Z:\SAMB_4\projects\xilofono\hw\Steps.SchDoc with TestPad from TestPad.SchLib diff --git a/hw/Project Outputs for Steps/Design Rule Check - Steps.drc b/hw/Project Outputs for Steps/Design Rule Check - Steps.drc new file mode 100644 index 0000000..ccf2b9a --- /dev/null +++ b/hw/Project Outputs for Steps/Design Rule Check - Steps.drc @@ -0,0 +1,286 @@ +Protel Design System Design Rule Check +PCB File : Z:\SAMB_4\projects\xilofono\hw\Steps.PcbDoc +Date : 02.02.2018 +Time : 12:09:52 + +Processing Rule : Clearance Constraint (Gap=0.254mm) (All),(All) + Violation between Clearance Constraint: (Collision < 0.254mm) Between Track (374.65mm,24.13mm)(377.19mm,26.67mm) on Bottom Layer And Pad J1-1(374.65mm,24.13mm) on Multi-Layer + Violation between Clearance Constraint: (Collision < 0.254mm) Between Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer And Pad TP5-1(377.19mm,29.21mm) on Multi-Layer + Violation between Clearance Constraint: (Collision < 0.254mm) Between Track (377.19mm,29.21mm)(378.968mm,30.988mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer + Violation between Clearance Constraint: (Collision < 0.254mm) Between Track (364.49mm,41.91mm)(377.19mm,29.21mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer +Rule Violations :4 + +Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All) + Violation between Short-Circuit Constraint: Between Track (374.65mm,24.13mm)(377.19mm,26.67mm) on Bottom Layer And Pad J1-1(374.65mm,24.13mm) on Multi-Layer Location : [X = 374.96mm][Y = 24.44mm] + Violation between Short-Circuit Constraint: Between Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer And Pad TP5-1(377.19mm,29.21mm) on Multi-Layer Location : [X = 377.19mm][Y = 28.9mm] + Violation between Short-Circuit Constraint: Between Track (377.19mm,29.21mm)(378.968mm,30.988mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer Location : [X = 377.19mm][Y = 29.21mm] + Violation between Short-Circuit Constraint: Between Track (364.49mm,41.91mm)(377.19mm,29.21mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer Location : [X = 377.19mm][Y = 29.21mm] +Rule Violations :4 + +Processing Rule : Un-Routed Net Constraint ( (All) ) + Violation between Un-Routed Net Constraint: Net NetR5_1 Between Pad R5-1(201.422mm,34.544mm) on Multi-Layer And Pad TP10-1(307.34mm,33.02mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net NetP4_4 Between Pad P4-4(231.826mm,31.953mm) on Multi-Layer And Track (439.344mm,25.349mm)(439.42mm,25.425mm) on Top Layer + Violation between Un-Routed Net Constraint: Net PZ23 Between Pad P2-8(323.85mm,21.59mm) on Multi-Layer And Pad U1-9(344.17mm,44.45mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net PZ22 Between Pad P2-7(323.85mm,19.05mm) on Multi-Layer And Pad U1-8(346.71mm,44.45mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net PZ17 Between Pad P2-2(316.23mm,21.59mm) on Multi-Layer And Pad U1-20(316.23mm,44.45mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net VCC Between Pad R4-2(231.902mm,45.974mm) on Multi-Layer And Pad D1_PZ1-2(245.86mm,54.61mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad P2-11(328.93mm,19.05mm) on Multi-Layer And Pad P2-12(328.93mm,21.59mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad P2-11(328.93mm,19.05mm) on Multi-Layer And Pad P2-13(331.47mm,19.05mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ4-1(280.67mm,72.39mm) on Multi-Layer And Pad Y1_PZ4-2(280.67mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ7-1(322.58mm,72.39mm) on Multi-Layer And Pad Y1_PZ7-2(322.58mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ1-1(238.76mm,72.39mm) on Multi-Layer And Pad Y1_PZ1-2(238.76mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ3-1(266.7mm,72.39mm) on Multi-Layer And Pad Y1_PZ3-2(266.7mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ5-1(294.64mm,72.39mm) on Multi-Layer And Pad Y1_PZ5-2(294.64mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ2-1(252.73mm,72.39mm) on Multi-Layer And Pad Y1_PZ2-2(252.73mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ12-1(392.43mm,72.39mm) on Multi-Layer And Pad Y1_PZ12-2(392.43mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ10-1(364.49mm,72.39mm) on Multi-Layer And Pad Y1_PZ10-2(364.49mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ9-1(350.52mm,72.39mm) on Multi-Layer And Pad Y1_PZ9-2(350.52mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ6-1(308.61mm,72.39mm) on Multi-Layer And Pad Y1_PZ6-2(308.61mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ8-1(336.55mm,72.39mm) on Multi-Layer And Pad Y1_PZ8-2(336.55mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ15-1(434.34mm,72.39mm) on Multi-Layer And Pad Y1_PZ15-2(434.34mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ13-1(406.4mm,72.39mm) on Multi-Layer And Pad Y1_PZ13-2(406.4mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ14-1(420.37mm,72.39mm) on Multi-Layer And Pad Y1_PZ14-2(420.37mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2_PZ11-1(378.46mm,72.39mm) on Multi-Layer And Pad Y1_PZ11-2(378.46mm,78.74mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D1-2(400.05mm,17.78mm) on Multi-Layer And Pad S1-3(405.13mm,20.32mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad C1-2(339.09mm,24.13mm) on Multi-Layer And Pad U1-31(341.63mm,29.21mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad P1-2(417.75mm,13.97mm) on Multi-Layer And Pad TP2-1(419.1mm,20.32mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad C1-2(339.09mm,24.13mm) on Multi-Layer And Pad U2-7(349.25mm,24.13mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ4-1(280.67mm,60.325mm) on Multi-Layer And Pad R2_PZ4-1(280.67mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ7-1(322.58mm,60.325mm) on Multi-Layer And Pad R2_PZ7-1(322.58mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ6-1(308.61mm,60.325mm) on Multi-Layer And Pad R2_PZ6-1(308.61mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ5-1(294.64mm,60.325mm) on Multi-Layer And Pad R2_PZ5-1(294.64mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ3-1(266.7mm,60.325mm) on Multi-Layer And Pad R2_PZ3-1(266.7mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ1-1(238.76mm,60.325mm) on Multi-Layer And Pad R2_PZ1-1(238.76mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ15-1(434.34mm,60.325mm) on Multi-Layer And Pad R2_PZ15-1(434.34mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ2-1(252.73mm,60.325mm) on Multi-Layer And Pad R2_PZ2-1(252.73mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer And Pad R2_PZ8-1(336.55mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ12-1(392.43mm,60.325mm) on Multi-Layer And Pad R2_PZ12-1(392.43mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ14-1(420.37mm,60.325mm) on Multi-Layer And Pad R2_PZ14-1(420.37mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ9-1(350.52mm,60.325mm) on Multi-Layer And Pad R2_PZ9-1(350.52mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ10-1(364.49mm,60.325mm) on Multi-Layer And Pad R2_PZ10-1(364.49mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ13-1(406.4mm,60.325mm) on Multi-Layer And Pad R2_PZ13-1(406.4mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ11-1(378.46mm,60.325mm) on Multi-Layer And Pad R2_PZ11-1(378.46mm,72.39mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad P4-2(226.822mm,29.464mm) on Multi-Layer And Pad P4-7(229.324mm,19.456mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad J1-3(377.19mm,24.13mm) on Multi-Layer And Pad R2-1(391.16mm,24.13mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad U1-12(336.55mm,44.45mm) on Multi-Layer And Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad P3-4(306.07mm,19.05mm) on Multi-Layer And Pad P2-11(328.93mm,19.05mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad P2-13(331.47mm,19.05mm) on Multi-Layer And Pad C1-2(339.09mm,24.13mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ10-1(364.49mm,60.325mm) on Multi-Layer And Pad D2_PZ11-1(378.46mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ12-1(392.43mm,60.325mm) on Multi-Layer And Pad D2_PZ13-1(406.4mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer And Pad D2_PZ9-1(350.52mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ13-1(406.4mm,60.325mm) on Multi-Layer And Pad D2_PZ14-1(420.37mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad S1-3(405.13mm,20.32mm) on Multi-Layer And Pad TP2-1(419.1mm,20.32mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ2-1(252.73mm,60.325mm) on Multi-Layer And Pad D2_PZ3-1(266.7mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ14-1(420.37mm,60.325mm) on Multi-Layer And Pad D2_PZ15-1(434.34mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ1-1(238.76mm,60.325mm) on Multi-Layer And Pad D2_PZ2-1(252.73mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ4-1(280.67mm,60.325mm) on Multi-Layer And Pad D2_PZ5-1(294.64mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ5-1(294.64mm,60.325mm) on Multi-Layer And Pad D2_PZ6-1(308.61mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ6-1(308.61mm,60.325mm) on Multi-Layer And Pad D2_PZ7-1(322.58mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad R2-1(391.16mm,24.13mm) on Multi-Layer And Pad D1-2(400.05mm,17.78mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad P4-2(226.822mm,29.464mm) on Multi-Layer And Pad D2_PZ1-1(238.76mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ11-1(378.46mm,60.325mm) on Multi-Layer And Pad D2_PZ12-1(392.43mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ7-1(322.58mm,60.325mm) on Multi-Layer And Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ3-1(266.7mm,60.325mm) on Multi-Layer And Pad D2_PZ4-1(280.67mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad U1-12(336.55mm,44.45mm) on Multi-Layer And Pad U1-31(341.63mm,29.21mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad U2-7(349.25mm,24.13mm) on Multi-Layer And Pad J1-3(377.19mm,24.13mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net GND Between Pad D2_PZ9-1(350.52mm,60.325mm) on Multi-Layer And Pad D2_PZ10-1(364.49mm,60.325mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net NetR3_2 Between Pad U2-4(356.87mm,24.13mm) on Multi-Layer And Pad U2-1(364.49mm,24.13mm) on Multi-Layer + Violation between Un-Routed Net Constraint: Net M\C\L\R\ Between Pad J1-1(374.65mm,24.13mm) on Multi-Layer And Pad TP5-1(377.19mm,29.21mm) on Multi-Layer +Rule Violations :68 + +Processing Rule : Modified Polygon (Allow modified: No), (Allow shelved: No) +Rule Violations :0 + +Processing Rule : Width Constraint (Min=0.254mm) (Max=1.524mm) (Preferred=0.254mm) (All) +Rule Violations :0 + +Processing Rule : Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All) +Rule Violations :0 + +Processing Rule : Hole Size Constraint (Min=0.025mm) (Max=10mm) (All) +Rule Violations :0 + +Processing Rule : Hole To Hole Clearance (Gap=0.254mm) (All),(All) +Rule Violations :0 + +Processing Rule : Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All) +Rule Violations :0 + +Processing Rule : Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All) + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,32.512mm)(236.982mm,32.512mm) on Top Overlay And Pad P4-4(231.826mm,31.953mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,32.512mm)(236.982mm,32.512mm) on Top Overlay And Pad P4-5(221.818mm,31.953mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,29.464mm)(236.982mm,29.464mm) on Top Overlay And Pad P4-1(234.328mm,29.464mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,29.464mm)(236.982mm,29.464mm) on Top Overlay And Pad P4-3(219.316mm,29.464mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm] + Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,29.464mm)(236.982mm,29.464mm) on Top Overlay And Pad P4-2(226.822mm,29.464mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (231.902mm,36.83mm)(231.902mm,37.846mm) on Top Overlay And Pad R4-1(231.902mm,35.814mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (231.902mm,43.942mm)(231.902mm,44.958mm) on Top Overlay And Pad R4-2(231.902mm,45.974mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (202.438mm,34.544mm)(203.454mm,34.544mm) on Top Overlay And Pad R5-1(201.422mm,34.544mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (209.55mm,34.544mm)(210.566mm,34.544mm) on Top Overlay And Pad R5-2(211.582mm,34.544mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (442.468mm,72.39mm)(443.484mm,72.39mm) on Top Overlay And Pad R2_PZ15-2(444.5mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (435.356mm,72.39mm)(436.372mm,72.39mm) on Top Overlay And Pad R2_PZ15-1(434.34mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (442.468mm,66.04mm)(443.484mm,66.04mm) on Top Overlay And Pad R1_PZ15-2(444.5mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (435.356mm,66.04mm)(436.372mm,66.04mm) on Top Overlay And Pad R1_PZ15-1(434.34mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (428.498mm,72.39mm)(429.514mm,72.39mm) on Top Overlay And Pad R2_PZ14-2(430.53mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (421.386mm,72.39mm)(422.402mm,72.39mm) on Top Overlay And Pad R2_PZ14-1(420.37mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (428.498mm,66.04mm)(429.514mm,66.04mm) on Top Overlay And Pad R1_PZ14-2(430.53mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (421.386mm,66.04mm)(422.402mm,66.04mm) on Top Overlay And Pad R1_PZ14-1(420.37mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (414.528mm,72.39mm)(415.544mm,72.39mm) on Top Overlay And Pad R2_PZ13-2(416.56mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (407.416mm,72.39mm)(408.432mm,72.39mm) on Top Overlay And Pad R2_PZ13-1(406.4mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (414.528mm,66.04mm)(415.544mm,66.04mm) on Top Overlay And Pad R1_PZ13-2(416.56mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (407.416mm,66.04mm)(408.432mm,66.04mm) on Top Overlay And Pad R1_PZ13-1(406.4mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (400.558mm,72.39mm)(401.574mm,72.39mm) on Top Overlay And Pad R2_PZ12-2(402.59mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (393.446mm,72.39mm)(394.462mm,72.39mm) on Top Overlay And Pad R2_PZ12-1(392.43mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (400.558mm,66.04mm)(401.574mm,66.04mm) on Top Overlay And Pad R1_PZ12-2(402.59mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (393.446mm,66.04mm)(394.462mm,66.04mm) on Top Overlay And Pad R1_PZ12-1(392.43mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (386.588mm,72.39mm)(387.604mm,72.39mm) on Top Overlay And Pad R2_PZ11-2(388.62mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (379.476mm,72.39mm)(380.492mm,72.39mm) on Top Overlay And Pad R2_PZ11-1(378.46mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (386.588mm,66.04mm)(387.604mm,66.04mm) on Top Overlay And Pad R1_PZ11-2(388.62mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (379.476mm,66.04mm)(380.492mm,66.04mm) on Top Overlay And Pad R1_PZ11-1(378.46mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (302.768mm,72.39mm)(303.784mm,72.39mm) on Top Overlay And Pad R2_PZ5-2(304.8mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (295.656mm,72.39mm)(296.672mm,72.39mm) on Top Overlay And Pad R2_PZ5-1(294.64mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (302.768mm,66.04mm)(303.784mm,66.04mm) on Top Overlay And Pad R1_PZ5-2(304.8mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (295.656mm,66.04mm)(296.672mm,66.04mm) on Top Overlay And Pad R1_PZ5-1(294.64mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (316.738mm,72.39mm)(317.754mm,72.39mm) on Top Overlay And Pad R2_PZ6-2(318.77mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (309.626mm,72.39mm)(310.642mm,72.39mm) on Top Overlay And Pad R2_PZ6-1(308.61mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (316.738mm,66.04mm)(317.754mm,66.04mm) on Top Overlay And Pad R1_PZ6-2(318.77mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (309.626mm,66.04mm)(310.642mm,66.04mm) on Top Overlay And Pad R1_PZ6-1(308.61mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (330.708mm,72.39mm)(331.724mm,72.39mm) on Top Overlay And Pad R2_PZ7-2(332.74mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (323.596mm,72.39mm)(324.612mm,72.39mm) on Top Overlay And Pad R2_PZ7-1(322.58mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (330.708mm,66.04mm)(331.724mm,66.04mm) on Top Overlay And Pad R1_PZ7-2(332.74mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (323.596mm,66.04mm)(324.612mm,66.04mm) on Top Overlay And Pad R1_PZ7-1(322.58mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (344.678mm,72.39mm)(345.694mm,72.39mm) on Top Overlay And Pad R2_PZ8-2(346.71mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (337.566mm,72.39mm)(338.582mm,72.39mm) on Top Overlay And Pad R2_PZ8-1(336.55mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (344.678mm,66.04mm)(345.694mm,66.04mm) on Top Overlay And Pad R1_PZ8-2(346.71mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (337.566mm,66.04mm)(338.582mm,66.04mm) on Top Overlay And Pad R1_PZ8-1(336.55mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (358.648mm,72.39mm)(359.664mm,72.39mm) on Top Overlay And Pad R2_PZ9-2(360.68mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (351.536mm,72.39mm)(352.552mm,72.39mm) on Top Overlay And Pad R2_PZ9-1(350.52mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (358.648mm,66.04mm)(359.664mm,66.04mm) on Top Overlay And Pad R1_PZ9-2(360.68mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (351.536mm,66.04mm)(352.552mm,66.04mm) on Top Overlay And Pad R1_PZ9-1(350.52mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (246.888mm,72.39mm)(247.904mm,72.39mm) on Top Overlay And Pad R2_PZ1-2(248.92mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (239.776mm,72.39mm)(240.792mm,72.39mm) on Top Overlay And Pad R2_PZ1-1(238.76mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (246.888mm,66.04mm)(247.904mm,66.04mm) on Top Overlay And Pad R1_PZ1-2(248.92mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (239.776mm,66.04mm)(240.792mm,66.04mm) on Top Overlay And Pad R1_PZ1-1(238.76mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (260.858mm,72.39mm)(261.874mm,72.39mm) on Top Overlay And Pad R2_PZ2-2(262.89mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (253.746mm,72.39mm)(254.762mm,72.39mm) on Top Overlay And Pad R2_PZ2-1(252.73mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (260.858mm,66.04mm)(261.874mm,66.04mm) on Top Overlay And Pad R1_PZ2-2(262.89mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (253.746mm,66.04mm)(254.762mm,66.04mm) on Top Overlay And Pad R1_PZ2-1(252.73mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (274.828mm,72.39mm)(275.844mm,72.39mm) on Top Overlay And Pad R2_PZ3-2(276.86mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (267.716mm,72.39mm)(268.732mm,72.39mm) on Top Overlay And Pad R2_PZ3-1(266.7mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (274.828mm,66.04mm)(275.844mm,66.04mm) on Top Overlay And Pad R1_PZ3-2(276.86mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (267.716mm,66.04mm)(268.732mm,66.04mm) on Top Overlay And Pad R1_PZ3-1(266.7mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (288.798mm,72.39mm)(289.814mm,72.39mm) on Top Overlay And Pad R2_PZ4-2(290.83mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (281.686mm,72.39mm)(282.702mm,72.39mm) on Top Overlay And Pad R2_PZ4-1(280.67mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (288.798mm,66.04mm)(289.814mm,66.04mm) on Top Overlay And Pad R1_PZ4-2(290.83mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (281.686mm,66.04mm)(282.702mm,66.04mm) on Top Overlay And Pad R1_PZ4-1(280.67mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (372.618mm,72.39mm)(373.634mm,72.39mm) on Top Overlay And Pad R2_PZ10-2(374.65mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (365.506mm,72.39mm)(366.522mm,72.39mm) on Top Overlay And Pad R2_PZ10-1(364.49mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (372.618mm,66.04mm)(373.634mm,66.04mm) on Top Overlay And Pad R1_PZ10-2(374.65mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (365.506mm,66.04mm)(366.522mm,66.04mm) on Top Overlay And Pad R1_PZ10-1(364.49mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (394.97mm,22.098mm)(394.97mm,23.114mm) on Top Overlay And Pad R3-1(394.97mm,24.13mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (394.97mm,14.986mm)(394.97mm,16.002mm) on Top Overlay And Pad R3-2(394.97mm,13.97mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (391.16mm,22.098mm)(391.16mm,23.114mm) on Top Overlay And Pad R2-1(391.16mm,24.13mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (391.16mm,14.986mm)(391.16mm,16.002mm) on Top Overlay And Pad R2-2(391.16mm,13.97mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (387.35mm,22.098mm)(387.35mm,23.114mm) on Top Overlay And Pad R1-1(387.35mm,24.13mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] + Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (387.35mm,14.986mm)(387.35mm,16.002mm) on Top Overlay And Pad R1-2(387.35mm,13.97mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm] +Rule Violations :75 + +Processing Rule : Silk to Silk (Clearance=0.254mm) (All),(All) + Violation between Silk To Silk Clearance Constraint: (0.052mm < 0.254mm) Between Text "15" (335.534mm,18.542mm) on Top Overlay And Track (335.28mm,17.78mm)(335.28mm,22.86mm) on Top Overlay Silk Text to Silk Clearance [0.052mm] + Violation between Silk To Silk Clearance Constraint: (0.052mm < 0.254mm) Between Text "16" (335.534mm,21.082mm) on Top Overlay And Track (335.28mm,17.78mm)(335.28mm,22.86mm) on Top Overlay Silk Text to Silk Clearance [0.052mm] + Violation between Silk To Silk Clearance Constraint: (0.222mm < 0.254mm) Between Text "2" (313.69mm,21.082mm) on Top Overlay And Track (314.96mm,17.78mm)(314.96mm,22.86mm) on Top Overlay Silk Text to Silk Clearance [0.222mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ15" (434.975mm,80.645mm) on Top Overlay And Track (438.15mm,77.47mm)(438.15mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ15" (434.975mm,80.645mm) on Top Overlay And Track (433.07mm,80.01mm)(438.15mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ14" (421.005mm,80.645mm) on Top Overlay And Track (424.18mm,77.47mm)(424.18mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ14" (421.005mm,80.645mm) on Top Overlay And Track (419.1mm,80.01mm)(424.18mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ13" (407.035mm,80.645mm) on Top Overlay And Track (410.21mm,77.47mm)(410.21mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ13" (407.035mm,80.645mm) on Top Overlay And Track (405.13mm,80.01mm)(410.21mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ12" (393.065mm,80.645mm) on Top Overlay And Track (396.24mm,77.47mm)(396.24mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ12" (393.065mm,80.645mm) on Top Overlay And Track (391.16mm,80.01mm)(396.24mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ11" (379.095mm,80.645mm) on Top Overlay And Track (382.27mm,77.47mm)(382.27mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ11" (379.095mm,80.645mm) on Top Overlay And Track (377.19mm,80.01mm)(382.27mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ5" (295.275mm,80.645mm) on Top Overlay And Track (298.45mm,77.47mm)(298.45mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ5" (295.275mm,80.645mm) on Top Overlay And Track (293.37mm,80.01mm)(298.45mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ6" (309.245mm,80.645mm) on Top Overlay And Track (312.42mm,77.47mm)(312.42mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ6" (309.245mm,80.645mm) on Top Overlay And Track (307.34mm,80.01mm)(312.42mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ7" (323.215mm,80.645mm) on Top Overlay And Track (326.39mm,77.47mm)(326.39mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ7" (323.215mm,80.645mm) on Top Overlay And Track (321.31mm,80.01mm)(326.39mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ8" (337.185mm,80.645mm) on Top Overlay And Track (340.36mm,77.47mm)(340.36mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ8" (337.185mm,80.645mm) on Top Overlay And Track (335.28mm,80.01mm)(340.36mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ9" (351.155mm,80.645mm) on Top Overlay And Track (354.33mm,77.47mm)(354.33mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ9" (351.155mm,80.645mm) on Top Overlay And Track (349.25mm,80.01mm)(354.33mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ1" (239.395mm,80.645mm) on Top Overlay And Track (242.57mm,77.47mm)(242.57mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ1" (239.395mm,80.645mm) on Top Overlay And Track (237.49mm,80.01mm)(242.57mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ2" (253.365mm,80.645mm) on Top Overlay And Track (256.54mm,77.47mm)(256.54mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ2" (253.365mm,80.645mm) on Top Overlay And Track (251.46mm,80.01mm)(256.54mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ3" (267.335mm,80.645mm) on Top Overlay And Track (270.51mm,77.47mm)(270.51mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ3" (267.335mm,80.645mm) on Top Overlay And Track (265.43mm,80.01mm)(270.51mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ4" (281.305mm,80.645mm) on Top Overlay And Track (284.48mm,77.47mm)(284.48mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ4" (281.305mm,80.645mm) on Top Overlay And Track (279.4mm,80.01mm)(284.48mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ10" (365.125mm,80.645mm) on Top Overlay And Track (368.3mm,77.47mm)(368.3mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ10" (365.125mm,80.645mm) on Top Overlay And Track (363.22mm,80.01mm)(368.3mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm] + Violation between Silk To Silk Clearance Constraint: (0.189mm < 0.254mm) Between Text "+" (399.473mm,22.72mm) on Top Overlay And Track (398.78mm,21.59mm)(401.32mm,21.59mm) on Top Overlay Silk Text to Silk Clearance [0.189mm] +Rule Violations :34 + +Processing Rule : Net Antennae (Tolerance=0mm) (All) + Violation between Net Antennae: Track (439.344mm,25.349mm)(439.42mm,25.425mm) on Top Layer + Violation between Net Antennae: Track (439.344mm,25.349mm)(439.42mm,25.425mm) on Top Layer +Rule Violations :2 + +Processing Rule : Room PZ9 (Bounding Region = (348.234mm, 52.07mm, 361.95mm, 82.55mm) (InComponentClass('PZ9')) +Rule Violations :0 + +Processing Rule : Room PZ10 (Bounding Region = (362.204mm, 52.07mm, 375.92mm, 82.55mm) (InComponentClass('PZ10')) +Rule Violations :0 + +Processing Rule : Room PZ8 (Bounding Region = (334.264mm, 52.07mm, 347.98mm, 82.55mm) (InComponentClass('PZ8')) +Rule Violations :0 + +Processing Rule : Room PZ7 (Bounding Region = (320.294mm, 52.07mm, 334.01mm, 82.55mm) (InComponentClass('PZ7')) +Rule Violations :0 + +Processing Rule : Room PZ11 (Bounding Region = (376.174mm, 52.07mm, 389.89mm, 82.55mm) (InComponentClass('PZ11')) +Rule Violations :0 + +Processing Rule : Room PZ13 (Bounding Region = (404.114mm, 52.07mm, 417.83mm, 82.55mm) (InComponentClass('PZ13')) +Rule Violations :0 + +Processing Rule : Room PZ14 (Bounding Region = (418.084mm, 52.07mm, 431.8mm, 82.55mm) (InComponentClass('PZ14')) +Rule Violations :0 + +Processing Rule : Room PZ12 (Bounding Region = (390.144mm, 52.07mm, 403.86mm, 82.55mm) (InComponentClass('PZ12')) +Rule Violations :0 + +Processing Rule : Room PZ15 (Bounding Region = (432.054mm, 52.07mm, 445.77mm, 82.55mm) (InComponentClass('PZ15')) +Rule Violations :0 + +Processing Rule : Room PZ2 (Bounding Region = (250.444mm, 52.07mm, 264.16mm, 82.55mm) (InComponentClass('PZ2')) +Rule Violations :0 + +Processing Rule : Room PZ1 (Bounding Region = (236.474mm, 52.07mm, 250.19mm, 82.55mm) (InComponentClass('PZ1')) +Rule Violations :0 + +Processing Rule : Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps')) + Violation between Room Definition: Between Small Component R5-Res2 (206.502mm,34.544mm) on Top Layer And Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps')) + Violation between Room Definition: Between Small Component R4-Res2 (231.902mm,40.894mm) on Top Layer And Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps')) + Violation between Room Definition: Between Component P4-57PC5FS (226.822mm,24.46mm) on Top Layer And Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps')) +Rule Violations :3 + +Processing Rule : Room PZ3 (Bounding Region = (264.414mm, 52.07mm, 278.13mm, 82.55mm) (InComponentClass('PZ3')) +Rule Violations :0 + +Processing Rule : Room PZ6 (Bounding Region = (306.324mm, 52.07mm, 320.04mm, 82.55mm) (InComponentClass('PZ6')) +Rule Violations :0 + +Processing Rule : Room PZ5 (Bounding Region = (292.354mm, 52.07mm, 306.07mm, 82.55mm) (InComponentClass('PZ5')) +Rule Violations :0 + +Processing Rule : Room PZ4 (Bounding Region = (278.384mm, 52.07mm, 292.1mm, 82.55mm) (InComponentClass('PZ4')) +Rule Violations :0 + +Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All) +Rule Violations :0 + + +Violations Detected : 190 +Waived Violations : 0 +Time Elapsed : 00:00:02 \ No newline at end of file diff --git a/hw/Project Outputs for Steps/Design Rule Check - Steps.html b/hw/Project Outputs for Steps/Design Rule Check - Steps.html new file mode 100644 index 0000000..b024cae --- /dev/null +++ b/hw/Project Outputs for Steps/Design Rule Check - Steps.html @@ -0,0 +1,986 @@ + + + +Design Rule Verification Report + +Altium

Design Rule Verification Report

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Date:02.02.2018
Time:12:09:52
Elapsed Time:00:00:02
Filename:Z:\SAMB_4\projects\xilofono\hw\Steps.PcbDoc
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Warnings:0
Rule Violations:190
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Summary

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WarningsCount
Total0

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Rule ViolationsCount
Clearance Constraint (Gap=0.254mm) (All),(All)4
Short-Circuit Constraint (Allowed=No) (All),(All)4
Un-Routed Net Constraint ( (All) )68
Modified Polygon (Allow modified: No), (Allow shelved: No)0
Width Constraint (Min=0.254mm) (Max=1.524mm) (Preferred=0.254mm) (All)0
Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)0
Hole Size Constraint (Min=0.025mm) (Max=10mm) (All)0
Hole To Hole Clearance (Gap=0.254mm) (All),(All)0
Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)0
Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)75
Silk to Silk (Clearance=0.254mm) (All),(All)34
Net Antennae (Tolerance=0mm) (All)2
Room PZ9 (Bounding Region = (348.234mm, 52.07mm, 361.95mm, 82.55mm) (InComponentClass('PZ9'))0
Room PZ10 (Bounding Region = (362.204mm, 52.07mm, 375.92mm, 82.55mm) (InComponentClass('PZ10'))0
Room PZ8 (Bounding Region = (334.264mm, 52.07mm, 347.98mm, 82.55mm) (InComponentClass('PZ8'))0
Room PZ7 (Bounding Region = (320.294mm, 52.07mm, 334.01mm, 82.55mm) (InComponentClass('PZ7'))0
Room PZ11 (Bounding Region = (376.174mm, 52.07mm, 389.89mm, 82.55mm) (InComponentClass('PZ11'))0
Room PZ13 (Bounding Region = (404.114mm, 52.07mm, 417.83mm, 82.55mm) (InComponentClass('PZ13'))0
Room PZ14 (Bounding Region = (418.084mm, 52.07mm, 431.8mm, 82.55mm) (InComponentClass('PZ14'))0
Room PZ12 (Bounding Region = (390.144mm, 52.07mm, 403.86mm, 82.55mm) (InComponentClass('PZ12'))0
Room PZ15 (Bounding Region = (432.054mm, 52.07mm, 445.77mm, 82.55mm) (InComponentClass('PZ15'))0
Room PZ2 (Bounding Region = (250.444mm, 52.07mm, 264.16mm, 82.55mm) (InComponentClass('PZ2'))0
Room PZ1 (Bounding Region = (236.474mm, 52.07mm, 250.19mm, 82.55mm) (InComponentClass('PZ1'))0
Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps'))3
Room PZ3 (Bounding Region = (264.414mm, 52.07mm, 278.13mm, 82.55mm) (InComponentClass('PZ3'))0
Room PZ6 (Bounding Region = (306.324mm, 52.07mm, 320.04mm, 82.55mm) (InComponentClass('PZ6'))0
Room PZ5 (Bounding Region = (292.354mm, 52.07mm, 306.07mm, 82.55mm) (InComponentClass('PZ5'))0
Room PZ4 (Bounding Region = (278.384mm, 52.07mm, 292.1mm, 82.55mm) (InComponentClass('PZ4'))0
Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)0
Total190

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Clearance Constraint (Gap=0.254mm) (All),(All)
Clearance Constraint: (Collision < 0.254mm) Between Track (374.65mm,24.13mm)(377.19mm,26.67mm) on Bottom Layer And Pad J1-1(374.65mm,24.13mm) on Multi-Layer
Clearance Constraint: (Collision < 0.254mm) Between Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer And Pad TP5-1(377.19mm,29.21mm) on Multi-Layer
Clearance Constraint: (Collision < 0.254mm) Between Track (377.19mm,29.21mm)(378.968mm,30.988mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer
Clearance Constraint: (Collision < 0.254mm) Between Track (364.49mm,41.91mm)(377.19mm,29.21mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer
Back to top

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Short-Circuit Constraint (Allowed=No) (All),(All)
Short-Circuit Constraint: Between Track (374.65mm,24.13mm)(377.19mm,26.67mm) on Bottom Layer And Pad J1-1(374.65mm,24.13mm) on Multi-Layer Location : [X = 374.96mm][Y = 24.44mm]
Short-Circuit Constraint: Between Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer And Pad TP5-1(377.19mm,29.21mm) on Multi-Layer Location : [X = 377.19mm][Y = 28.9mm]
Short-Circuit Constraint: Between Track (377.19mm,29.21mm)(378.968mm,30.988mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer Location : [X = 377.19mm][Y = 29.21mm]
Short-Circuit Constraint: Between Track (364.49mm,41.91mm)(377.19mm,29.21mm) on Bottom Layer And Track (377.19mm,26.67mm)(377.19mm,29.21mm) on Bottom Layer Location : [X = 377.19mm][Y = 29.21mm]
Back to top

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Un-Routed Net Constraint ( (All) )
Un-Routed Net Constraint: Net NetR5_1 Between Pad R5-1(201.422mm,34.544mm) on Multi-Layer And Pad TP10-1(307.34mm,33.02mm) on Multi-Layer
Un-Routed Net Constraint: Net NetP4_4 Between Pad P4-4(231.826mm,31.953mm) on Multi-Layer And Track (439.344mm,25.349mm)(439.42mm,25.425mm) on Top Layer
Un-Routed Net Constraint: Net PZ23 Between Pad P2-8(323.85mm,21.59mm) on Multi-Layer And Pad U1-9(344.17mm,44.45mm) on Multi-Layer
Un-Routed Net Constraint: Net PZ22 Between Pad P2-7(323.85mm,19.05mm) on Multi-Layer And Pad U1-8(346.71mm,44.45mm) on Multi-Layer
Un-Routed Net Constraint: Net PZ17 Between Pad P2-2(316.23mm,21.59mm) on Multi-Layer And Pad U1-20(316.23mm,44.45mm) on Multi-Layer
Un-Routed Net Constraint: Net VCC Between Pad R4-2(231.902mm,45.974mm) on Multi-Layer And Pad D1_PZ1-2(245.86mm,54.61mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad P2-11(328.93mm,19.05mm) on Multi-Layer And Pad P2-12(328.93mm,21.59mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad P2-11(328.93mm,19.05mm) on Multi-Layer And Pad P2-13(331.47mm,19.05mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ4-1(280.67mm,72.39mm) on Multi-Layer And Pad Y1_PZ4-2(280.67mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ7-1(322.58mm,72.39mm) on Multi-Layer And Pad Y1_PZ7-2(322.58mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ1-1(238.76mm,72.39mm) on Multi-Layer And Pad Y1_PZ1-2(238.76mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ3-1(266.7mm,72.39mm) on Multi-Layer And Pad Y1_PZ3-2(266.7mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ5-1(294.64mm,72.39mm) on Multi-Layer And Pad Y1_PZ5-2(294.64mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ2-1(252.73mm,72.39mm) on Multi-Layer And Pad Y1_PZ2-2(252.73mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ12-1(392.43mm,72.39mm) on Multi-Layer And Pad Y1_PZ12-2(392.43mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ10-1(364.49mm,72.39mm) on Multi-Layer And Pad Y1_PZ10-2(364.49mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ9-1(350.52mm,72.39mm) on Multi-Layer And Pad Y1_PZ9-2(350.52mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ6-1(308.61mm,72.39mm) on Multi-Layer And Pad Y1_PZ6-2(308.61mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ8-1(336.55mm,72.39mm) on Multi-Layer And Pad Y1_PZ8-2(336.55mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ15-1(434.34mm,72.39mm) on Multi-Layer And Pad Y1_PZ15-2(434.34mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ13-1(406.4mm,72.39mm) on Multi-Layer And Pad Y1_PZ13-2(406.4mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ14-1(420.37mm,72.39mm) on Multi-Layer And Pad Y1_PZ14-2(420.37mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2_PZ11-1(378.46mm,72.39mm) on Multi-Layer And Pad Y1_PZ11-2(378.46mm,78.74mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D1-2(400.05mm,17.78mm) on Multi-Layer And Pad S1-3(405.13mm,20.32mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad C1-2(339.09mm,24.13mm) on Multi-Layer And Pad U1-31(341.63mm,29.21mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad P1-2(417.75mm,13.97mm) on Multi-Layer And Pad TP2-1(419.1mm,20.32mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad C1-2(339.09mm,24.13mm) on Multi-Layer And Pad U2-7(349.25mm,24.13mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ4-1(280.67mm,60.325mm) on Multi-Layer And Pad R2_PZ4-1(280.67mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ7-1(322.58mm,60.325mm) on Multi-Layer And Pad R2_PZ7-1(322.58mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ6-1(308.61mm,60.325mm) on Multi-Layer And Pad R2_PZ6-1(308.61mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ5-1(294.64mm,60.325mm) on Multi-Layer And Pad R2_PZ5-1(294.64mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ3-1(266.7mm,60.325mm) on Multi-Layer And Pad R2_PZ3-1(266.7mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ1-1(238.76mm,60.325mm) on Multi-Layer And Pad R2_PZ1-1(238.76mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ15-1(434.34mm,60.325mm) on Multi-Layer And Pad R2_PZ15-1(434.34mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ2-1(252.73mm,60.325mm) on Multi-Layer And Pad R2_PZ2-1(252.73mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer And Pad R2_PZ8-1(336.55mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ12-1(392.43mm,60.325mm) on Multi-Layer And Pad R2_PZ12-1(392.43mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ14-1(420.37mm,60.325mm) on Multi-Layer And Pad R2_PZ14-1(420.37mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ9-1(350.52mm,60.325mm) on Multi-Layer And Pad R2_PZ9-1(350.52mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ10-1(364.49mm,60.325mm) on Multi-Layer And Pad R2_PZ10-1(364.49mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ13-1(406.4mm,60.325mm) on Multi-Layer And Pad R2_PZ13-1(406.4mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ11-1(378.46mm,60.325mm) on Multi-Layer And Pad R2_PZ11-1(378.46mm,72.39mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad P4-2(226.822mm,29.464mm) on Multi-Layer And Pad P4-7(229.324mm,19.456mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad J1-3(377.19mm,24.13mm) on Multi-Layer And Pad R2-1(391.16mm,24.13mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad U1-12(336.55mm,44.45mm) on Multi-Layer And Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad P3-4(306.07mm,19.05mm) on Multi-Layer And Pad P2-11(328.93mm,19.05mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad P2-13(331.47mm,19.05mm) on Multi-Layer And Pad C1-2(339.09mm,24.13mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ10-1(364.49mm,60.325mm) on Multi-Layer And Pad D2_PZ11-1(378.46mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ12-1(392.43mm,60.325mm) on Multi-Layer And Pad D2_PZ13-1(406.4mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer And Pad D2_PZ9-1(350.52mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ13-1(406.4mm,60.325mm) on Multi-Layer And Pad D2_PZ14-1(420.37mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad S1-3(405.13mm,20.32mm) on Multi-Layer And Pad TP2-1(419.1mm,20.32mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ2-1(252.73mm,60.325mm) on Multi-Layer And Pad D2_PZ3-1(266.7mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ14-1(420.37mm,60.325mm) on Multi-Layer And Pad D2_PZ15-1(434.34mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ1-1(238.76mm,60.325mm) on Multi-Layer And Pad D2_PZ2-1(252.73mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ4-1(280.67mm,60.325mm) on Multi-Layer And Pad D2_PZ5-1(294.64mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ5-1(294.64mm,60.325mm) on Multi-Layer And Pad D2_PZ6-1(308.61mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ6-1(308.61mm,60.325mm) on Multi-Layer And Pad D2_PZ7-1(322.58mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad R2-1(391.16mm,24.13mm) on Multi-Layer And Pad D1-2(400.05mm,17.78mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad P4-2(226.822mm,29.464mm) on Multi-Layer And Pad D2_PZ1-1(238.76mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ11-1(378.46mm,60.325mm) on Multi-Layer And Pad D2_PZ12-1(392.43mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ7-1(322.58mm,60.325mm) on Multi-Layer And Pad D2_PZ8-1(336.55mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ3-1(266.7mm,60.325mm) on Multi-Layer And Pad D2_PZ4-1(280.67mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad U1-12(336.55mm,44.45mm) on Multi-Layer And Pad U1-31(341.63mm,29.21mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad U2-7(349.25mm,24.13mm) on Multi-Layer And Pad J1-3(377.19mm,24.13mm) on Multi-Layer
Un-Routed Net Constraint: Net GND Between Pad D2_PZ9-1(350.52mm,60.325mm) on Multi-Layer And Pad D2_PZ10-1(364.49mm,60.325mm) on Multi-Layer
Un-Routed Net Constraint: Net NetR3_2 Between Pad U2-4(356.87mm,24.13mm) on Multi-Layer And Pad U2-1(364.49mm,24.13mm) on Multi-Layer
Un-Routed Net Constraint: Net M\C\L\R\ Between Pad J1-1(374.65mm,24.13mm) on Multi-Layer And Pad TP5-1(377.19mm,29.21mm) on Multi-Layer
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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,32.512mm)(236.982mm,32.512mm) on Top Overlay And Pad P4-4(231.826mm,31.953mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,32.512mm)(236.982mm,32.512mm) on Top Overlay And Pad P4-5(221.818mm,31.953mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,29.464mm)(236.982mm,29.464mm) on Top Overlay And Pad P4-1(234.328mm,29.464mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,29.464mm)(236.982mm,29.464mm) on Top Overlay And Pad P4-3(219.316mm,29.464mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Track (216.662mm,29.464mm)(236.982mm,29.464mm) on Top Overlay And Pad P4-2(226.822mm,29.464mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (231.902mm,36.83mm)(231.902mm,37.846mm) on Top Overlay And Pad R4-1(231.902mm,35.814mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (231.902mm,43.942mm)(231.902mm,44.958mm) on Top Overlay And Pad R4-2(231.902mm,45.974mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (202.438mm,34.544mm)(203.454mm,34.544mm) on Top Overlay And Pad R5-1(201.422mm,34.544mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (209.55mm,34.544mm)(210.566mm,34.544mm) on Top Overlay And Pad R5-2(211.582mm,34.544mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (442.468mm,72.39mm)(443.484mm,72.39mm) on Top Overlay And Pad R2_PZ15-2(444.5mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (435.356mm,72.39mm)(436.372mm,72.39mm) on Top Overlay And Pad R2_PZ15-1(434.34mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (442.468mm,66.04mm)(443.484mm,66.04mm) on Top Overlay And Pad R1_PZ15-2(444.5mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (435.356mm,66.04mm)(436.372mm,66.04mm) on Top Overlay And Pad R1_PZ15-1(434.34mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (428.498mm,72.39mm)(429.514mm,72.39mm) on Top Overlay And Pad R2_PZ14-2(430.53mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (421.386mm,72.39mm)(422.402mm,72.39mm) on Top Overlay And Pad R2_PZ14-1(420.37mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (428.498mm,66.04mm)(429.514mm,66.04mm) on Top Overlay And Pad R1_PZ14-2(430.53mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (421.386mm,66.04mm)(422.402mm,66.04mm) on Top Overlay And Pad R1_PZ14-1(420.37mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (414.528mm,72.39mm)(415.544mm,72.39mm) on Top Overlay And Pad R2_PZ13-2(416.56mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (407.416mm,72.39mm)(408.432mm,72.39mm) on Top Overlay And Pad R2_PZ13-1(406.4mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (414.528mm,66.04mm)(415.544mm,66.04mm) on Top Overlay And Pad R1_PZ13-2(416.56mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (407.416mm,66.04mm)(408.432mm,66.04mm) on Top Overlay And Pad R1_PZ13-1(406.4mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (400.558mm,72.39mm)(401.574mm,72.39mm) on Top Overlay And Pad R2_PZ12-2(402.59mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (393.446mm,72.39mm)(394.462mm,72.39mm) on Top Overlay And Pad R2_PZ12-1(392.43mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (400.558mm,66.04mm)(401.574mm,66.04mm) on Top Overlay And Pad R1_PZ12-2(402.59mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (393.446mm,66.04mm)(394.462mm,66.04mm) on Top Overlay And Pad R1_PZ12-1(392.43mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (386.588mm,72.39mm)(387.604mm,72.39mm) on Top Overlay And Pad R2_PZ11-2(388.62mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (379.476mm,72.39mm)(380.492mm,72.39mm) on Top Overlay And Pad R2_PZ11-1(378.46mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (386.588mm,66.04mm)(387.604mm,66.04mm) on Top Overlay And Pad R1_PZ11-2(388.62mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (379.476mm,66.04mm)(380.492mm,66.04mm) on Top Overlay And Pad R1_PZ11-1(378.46mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (302.768mm,72.39mm)(303.784mm,72.39mm) on Top Overlay And Pad R2_PZ5-2(304.8mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (295.656mm,72.39mm)(296.672mm,72.39mm) on Top Overlay And Pad R2_PZ5-1(294.64mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (302.768mm,66.04mm)(303.784mm,66.04mm) on Top Overlay And Pad R1_PZ5-2(304.8mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (295.656mm,66.04mm)(296.672mm,66.04mm) on Top Overlay And Pad R1_PZ5-1(294.64mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (316.738mm,72.39mm)(317.754mm,72.39mm) on Top Overlay And Pad R2_PZ6-2(318.77mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (309.626mm,72.39mm)(310.642mm,72.39mm) on Top Overlay And Pad R2_PZ6-1(308.61mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (316.738mm,66.04mm)(317.754mm,66.04mm) on Top Overlay And Pad R1_PZ6-2(318.77mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (309.626mm,66.04mm)(310.642mm,66.04mm) on Top Overlay And Pad R1_PZ6-1(308.61mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (330.708mm,72.39mm)(331.724mm,72.39mm) on Top Overlay And Pad R2_PZ7-2(332.74mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (323.596mm,72.39mm)(324.612mm,72.39mm) on Top Overlay And Pad R2_PZ7-1(322.58mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (330.708mm,66.04mm)(331.724mm,66.04mm) on Top Overlay And Pad R1_PZ7-2(332.74mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (323.596mm,66.04mm)(324.612mm,66.04mm) on Top Overlay And Pad R1_PZ7-1(322.58mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (344.678mm,72.39mm)(345.694mm,72.39mm) on Top Overlay And Pad R2_PZ8-2(346.71mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (337.566mm,72.39mm)(338.582mm,72.39mm) on Top Overlay And Pad R2_PZ8-1(336.55mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (344.678mm,66.04mm)(345.694mm,66.04mm) on Top Overlay And Pad R1_PZ8-2(346.71mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (337.566mm,66.04mm)(338.582mm,66.04mm) on Top Overlay And Pad R1_PZ8-1(336.55mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (358.648mm,72.39mm)(359.664mm,72.39mm) on Top Overlay And Pad R2_PZ9-2(360.68mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (351.536mm,72.39mm)(352.552mm,72.39mm) on Top Overlay And Pad R2_PZ9-1(350.52mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (358.648mm,66.04mm)(359.664mm,66.04mm) on Top Overlay And Pad R1_PZ9-2(360.68mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (351.536mm,66.04mm)(352.552mm,66.04mm) on Top Overlay And Pad R1_PZ9-1(350.52mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (246.888mm,72.39mm)(247.904mm,72.39mm) on Top Overlay And Pad R2_PZ1-2(248.92mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (239.776mm,72.39mm)(240.792mm,72.39mm) on Top Overlay And Pad R2_PZ1-1(238.76mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (246.888mm,66.04mm)(247.904mm,66.04mm) on Top Overlay And Pad R1_PZ1-2(248.92mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (239.776mm,66.04mm)(240.792mm,66.04mm) on Top Overlay And Pad R1_PZ1-1(238.76mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (260.858mm,72.39mm)(261.874mm,72.39mm) on Top Overlay And Pad R2_PZ2-2(262.89mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (253.746mm,72.39mm)(254.762mm,72.39mm) on Top Overlay And Pad R2_PZ2-1(252.73mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (260.858mm,66.04mm)(261.874mm,66.04mm) on Top Overlay And Pad R1_PZ2-2(262.89mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (253.746mm,66.04mm)(254.762mm,66.04mm) on Top Overlay And Pad R1_PZ2-1(252.73mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (274.828mm,72.39mm)(275.844mm,72.39mm) on Top Overlay And Pad R2_PZ3-2(276.86mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (267.716mm,72.39mm)(268.732mm,72.39mm) on Top Overlay And Pad R2_PZ3-1(266.7mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (274.828mm,66.04mm)(275.844mm,66.04mm) on Top Overlay And Pad R1_PZ3-2(276.86mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (267.716mm,66.04mm)(268.732mm,66.04mm) on Top Overlay And Pad R1_PZ3-1(266.7mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (288.798mm,72.39mm)(289.814mm,72.39mm) on Top Overlay And Pad R2_PZ4-2(290.83mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (281.686mm,72.39mm)(282.702mm,72.39mm) on Top Overlay And Pad R2_PZ4-1(280.67mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (288.798mm,66.04mm)(289.814mm,66.04mm) on Top Overlay And Pad R1_PZ4-2(290.83mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (281.686mm,66.04mm)(282.702mm,66.04mm) on Top Overlay And Pad R1_PZ4-1(280.67mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (372.618mm,72.39mm)(373.634mm,72.39mm) on Top Overlay And Pad R2_PZ10-2(374.65mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (365.506mm,72.39mm)(366.522mm,72.39mm) on Top Overlay And Pad R2_PZ10-1(364.49mm,72.39mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (372.618mm,66.04mm)(373.634mm,66.04mm) on Top Overlay And Pad R1_PZ10-2(374.65mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (365.506mm,66.04mm)(366.522mm,66.04mm) on Top Overlay And Pad R1_PZ10-1(364.49mm,66.04mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (394.97mm,22.098mm)(394.97mm,23.114mm) on Top Overlay And Pad R3-1(394.97mm,24.13mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (394.97mm,14.986mm)(394.97mm,16.002mm) on Top Overlay And Pad R3-2(394.97mm,13.97mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (391.16mm,22.098mm)(391.16mm,23.114mm) on Top Overlay And Pad R2-1(391.16mm,24.13mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (391.16mm,14.986mm)(391.16mm,16.002mm) on Top Overlay And Pad R2-2(391.16mm,13.97mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (387.35mm,22.098mm)(387.35mm,23.114mm) on Top Overlay And Pad R1-1(387.35mm,24.13mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Track (387.35mm,14.986mm)(387.35mm,16.002mm) on Top Overlay And Pad R1-2(387.35mm,13.97mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.216mm]
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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Silk to Silk (Clearance=0.254mm) (All),(All)
Silk To Silk Clearance Constraint: (0.052mm < 0.254mm) Between Text "15" (335.534mm,18.542mm) on Top Overlay And Track (335.28mm,17.78mm)(335.28mm,22.86mm) on Top Overlay Silk Text to Silk Clearance [0.052mm]
Silk To Silk Clearance Constraint: (0.052mm < 0.254mm) Between Text "16" (335.534mm,21.082mm) on Top Overlay And Track (335.28mm,17.78mm)(335.28mm,22.86mm) on Top Overlay Silk Text to Silk Clearance [0.052mm]
Silk To Silk Clearance Constraint: (0.222mm < 0.254mm) Between Text "2" (313.69mm,21.082mm) on Top Overlay And Track (314.96mm,17.78mm)(314.96mm,22.86mm) on Top Overlay Silk Text to Silk Clearance [0.222mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ15" (434.975mm,80.645mm) on Top Overlay And Track (438.15mm,77.47mm)(438.15mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ15" (434.975mm,80.645mm) on Top Overlay And Track (433.07mm,80.01mm)(438.15mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ14" (421.005mm,80.645mm) on Top Overlay And Track (424.18mm,77.47mm)(424.18mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ14" (421.005mm,80.645mm) on Top Overlay And Track (419.1mm,80.01mm)(424.18mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ13" (407.035mm,80.645mm) on Top Overlay And Track (410.21mm,77.47mm)(410.21mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ13" (407.035mm,80.645mm) on Top Overlay And Track (405.13mm,80.01mm)(410.21mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ12" (393.065mm,80.645mm) on Top Overlay And Track (396.24mm,77.47mm)(396.24mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ12" (393.065mm,80.645mm) on Top Overlay And Track (391.16mm,80.01mm)(396.24mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ11" (379.095mm,80.645mm) on Top Overlay And Track (382.27mm,77.47mm)(382.27mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ11" (379.095mm,80.645mm) on Top Overlay And Track (377.19mm,80.01mm)(382.27mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ5" (295.275mm,80.645mm) on Top Overlay And Track (298.45mm,77.47mm)(298.45mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ5" (295.275mm,80.645mm) on Top Overlay And Track (293.37mm,80.01mm)(298.45mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ6" (309.245mm,80.645mm) on Top Overlay And Track (312.42mm,77.47mm)(312.42mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ6" (309.245mm,80.645mm) on Top Overlay And Track (307.34mm,80.01mm)(312.42mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ7" (323.215mm,80.645mm) on Top Overlay And Track (326.39mm,77.47mm)(326.39mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ7" (323.215mm,80.645mm) on Top Overlay And Track (321.31mm,80.01mm)(326.39mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ8" (337.185mm,80.645mm) on Top Overlay And Track (340.36mm,77.47mm)(340.36mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ8" (337.185mm,80.645mm) on Top Overlay And Track (335.28mm,80.01mm)(340.36mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ9" (351.155mm,80.645mm) on Top Overlay And Track (354.33mm,77.47mm)(354.33mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ9" (351.155mm,80.645mm) on Top Overlay And Track (349.25mm,80.01mm)(354.33mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ1" (239.395mm,80.645mm) on Top Overlay And Track (242.57mm,77.47mm)(242.57mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ1" (239.395mm,80.645mm) on Top Overlay And Track (237.49mm,80.01mm)(242.57mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ2" (253.365mm,80.645mm) on Top Overlay And Track (256.54mm,77.47mm)(256.54mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ2" (253.365mm,80.645mm) on Top Overlay And Track (251.46mm,80.01mm)(256.54mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ3" (267.335mm,80.645mm) on Top Overlay And Track (270.51mm,77.47mm)(270.51mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ3" (267.335mm,80.645mm) on Top Overlay And Track (265.43mm,80.01mm)(270.51mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ4" (281.305mm,80.645mm) on Top Overlay And Track (284.48mm,77.47mm)(284.48mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ4" (281.305mm,80.645mm) on Top Overlay And Track (279.4mm,80.01mm)(284.48mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ10" (365.125mm,80.645mm) on Top Overlay And Track (368.3mm,77.47mm)(368.3mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.154mm < 0.254mm) Between Text "Y1_PZ10" (365.125mm,80.645mm) on Top Overlay And Track (363.22mm,80.01mm)(368.3mm,80.01mm) on Top Overlay Silk Text to Silk Clearance [0.154mm]
Silk To Silk Clearance Constraint: (0.189mm < 0.254mm) Between Text "+" (399.473mm,22.72mm) on Top Overlay And Track (398.78mm,21.59mm)(401.32mm,21.59mm) on Top Overlay Silk Text to Silk Clearance [0.189mm]
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+ + + + + + + + + +
Net Antennae (Tolerance=0mm) (All)
Net Antennae: Track (439.344mm,25.349mm)(439.42mm,25.425mm) on Top Layer
Net Antennae: Track (439.344mm,25.349mm)(439.42mm,25.425mm) on Top Layer
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Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps'))
Room Definition: Between Small Component R5-Res2 (206.502mm,34.544mm) on Top Layer And Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps'))
Room Definition: Between Small Component R4-Res2 (231.902mm,40.894mm) on Top Layer And Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps'))
Room Definition: Between Component P4-57PC5FS (226.822mm,24.46mm) on Top Layer And Room Steps (Bounding Region = (294.64mm, 6.35mm, 445.77mm, 45.72mm) (InComponentClass('Steps'))
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+ diff --git a/hw/Project Outputs for Xilofono/Xilofono.PDF b/hw/Project Outputs for Xilofono/Xilofono.PDF new file mode 100644 index 0000000..864876f Binary files /dev/null and b/hw/Project Outputs for Xilofono/Xilofono.PDF differ diff --git a/hw/Steps.IntLib b/hw/Steps.IntLib new file mode 100644 index 0000000..23e1ccb Binary files /dev/null and b/hw/Steps.IntLib differ diff --git a/hw/Steps.PcbDoc b/hw/Steps.PcbDoc index 076a67d..4b34018 100644 Binary files a/hw/Steps.PcbDoc and b/hw/Steps.PcbDoc differ diff --git a/hw/Steps.PcbLib b/hw/Steps.PcbLib new file mode 100644 index 0000000..6b26914 Binary files /dev/null and b/hw/Steps.PcbLib differ diff --git a/hw/Steps.PrjPcb b/hw/Steps.PrjPcb new file mode 100644 index 0000000..94afb0b --- /dev/null +++ b/hw/Steps.PrjPcb @@ -0,0 +1,1385 @@ +[Design] +Version=1.0 +HierarchyMode=0 +ChannelRoomNamingStyle=0 +ReleasesFolder= +ChannelDesignatorFormatString=$Component_$RoomName +ChannelRoomLevelSeperator=_ +OpenOutputs=1 +ArchiveProject=0 +TimestampOutput=0 +SeparateFolders=0 +TemplateLocationPath= +PinSwapBy_Netlabel=1 +PinSwapBy_Pin=1 +AllowPortNetNames=0 +AllowSheetEntryNetNames=0 +AppendSheetNumberToLocalNets=0 +NetlistSinglePinNets=0 +DefaultConfiguration=Sources +UserID=0xFFFFFFFF +DefaultPcbProtel=1 +DefaultPcbPcad=0 +ReorderDocumentsOnCompile=1 +NameNetsHierarchically=1 +PowerPortNamesTakePriority=1 +PushECOToAnnotationFile=1 +DItemRevisionGUID= +ReportSuppressedErrorsInMessages=0 +FSMCodingStyle=eFMSDropDownList_OneProcess +FSMEncodingStyle=eFMSDropDownList_OneHot +OutputPath= +LogFolderPath= +ManagedProjectGUID= +LinkedManagedProjectGUID= +IncludeDesignInRelease=0 + +[Preferences] +PrefsVaultGUID= +PrefsRevisionGUID= + +[Document1] +DocumentPath=Steps.PcbDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=CYIUPGSB + +[Document2] +DocumentPath=Piezo.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=0 +DoLibraryUpdate=0 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=VJJUNBIE + +[Document3] +DocumentPath=Steps.SchDoc +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=RUXBFIEP + +[Document4] +DocumentPath=TestPad.SchLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document5] +DocumentPath=Steps.SCHLIB +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document6] +DocumentPath=Steps.IntLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document7] +DocumentPath=Steps.PcbLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=FBXSRCJC + +[Document8] +DocumentPath=Switchcraft.PcbLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[GeneratedDocument1] +DocumentPath=Project Outputs for Steps\Design Rule Check - Steps.html +DItemRevisionGUID= + +[Configuration1] +Name=Sources +ParameterCount=0 +ConstraintFileCount=0 +ReleaseItemId= +Variant=[No Variations] +OutputJobsCount=0 +ContentTypeGUID=CB6F2064-E317-11DF-B822-12313F0024A2 +ConfigurationType=Source + +[OutputGroup1] +Name=Netlist Outputs +Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=CadnetixNetlist +OutputName1=Cadnetix Netlist +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=CalayNetlist +OutputName2=Calay Netlist +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=EDIF +OutputName3=EDIF for PCB +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +OutputType4=EESofNetlist +OutputName4=EESof Netlist +OutputDocumentPath4= +OutputVariantName4= +OutputDefault4=0 +OutputType5=IntergraphNetlist +OutputName5=Intergraph Netlist +OutputDocumentPath5= +OutputVariantName5= +OutputDefault5=0 +OutputType6=MentorBoardStationNetlist +OutputName6=Mentor BoardStation Netlist +OutputDocumentPath6= +OutputVariantName6= +OutputDefault6=0 +OutputType7=MultiWire +OutputName7=MultiWire +OutputDocumentPath7= +OutputVariantName7= +OutputDefault7=0 +OutputType8=OrCadPCB2Netlist +OutputName8=Orcad/PCB2 Netlist +OutputDocumentPath8= +OutputVariantName8= +OutputDefault8=0 +OutputType9=PADSNetlist +OutputName9=PADS ASCII Netlist +OutputDocumentPath9= +OutputVariantName9= +OutputDefault9=0 +OutputType10=Pcad +OutputName10=Pcad for PCB +OutputDocumentPath10= +OutputVariantName10= +OutputDefault10=0 +OutputType11=PCADNetlist +OutputName11=PCAD Netlist +OutputDocumentPath11= +OutputVariantName11= +OutputDefault11=0 +OutputType12=PCADnltNetlist +OutputName12=PCADnlt Netlist +OutputDocumentPath12= +OutputVariantName12= +OutputDefault12=0 +OutputType13=Protel2Netlist +OutputName13=Protel2 Netlist +OutputDocumentPath13= +OutputVariantName13= +OutputDefault13=0 +OutputType14=ProtelNetlist +OutputName14=Protel +OutputDocumentPath14= +OutputVariantName14= +OutputDefault14=0 +OutputType15=RacalNetlist +OutputName15=Racal Netlist +OutputDocumentPath15= +OutputVariantName15= +OutputDefault15=0 +OutputType16=RINFNetlist +OutputName16=RINF Netlist +OutputDocumentPath16= +OutputVariantName16= +OutputDefault16=0 +OutputType17=SciCardsNetlist +OutputName17=SciCards Netlist +OutputDocumentPath17= +OutputVariantName17= +OutputDefault17=0 +OutputType18=SIMetrixNetlist +OutputName18=SIMetrix +OutputDocumentPath18= +OutputVariantName18= +OutputDefault18=0 +OutputType19=SIMPLISNetlist +OutputName19=SIMPLIS +OutputDocumentPath19= +OutputVariantName19= +OutputDefault19=0 +OutputType20=TangoNetlist +OutputName20=Tango Netlist +OutputDocumentPath20= +OutputVariantName20= +OutputDefault20=0 +OutputType21=TelesisNetlist +OutputName21=Telesis Netlist +OutputDocumentPath21= +OutputVariantName21= +OutputDefault21=0 +OutputType22=WireListNetlist +OutputName22=WireList Netlist +OutputDocumentPath22= +OutputVariantName22= +OutputDefault22=0 +OutputType23=XSpiceNetlist +OutputName23=XSpice Netlist +OutputDocumentPath23= +OutputVariantName23= +OutputDefault23=0 + +[OutputGroup2] +Name=Simulator Outputs +Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=AdvSimNetlist +OutputName1=Mixed Sim +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=SIMetrixSimulation +OutputName2=SIMetrix +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=SIMPLISSimulation +OutputName3=SIMPLIS +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 + +[OutputGroup3] +Name=Documentation Outputs +Description= +TargetPrinter=Virtual Printer +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=Composite +OutputName1=Composite Drawing +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType2=PCB 3D Print +OutputName2=PCB 3D Print +OutputDocumentPath2= +OutputVariantName2=[No Variations] +OutputDefault2=0 +PageOptions2=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType3=PCB 3D Video +OutputName3=PCB 3D Video +OutputDocumentPath3= +OutputVariantName3=[No Variations] +OutputDefault3=0 +PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType4=PCB Print +OutputName4=PCB Prints +OutputDocumentPath4= +OutputVariantName4= +OutputDefault4=0 +PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType5=PCBDrawing +OutputName5=Draftsman +OutputDocumentPath5= +OutputVariantName5=[No Variations] +OutputDefault5=0 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+PageOptions24=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType25=Text Print +OutputName25=Text Print +OutputDocumentPath25= +OutputVariantName25= +OutputDefault25=0 +PageOptions25=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType26=Text Print +OutputName26=Text Print +OutputDocumentPath26= +OutputVariantName26= +OutputDefault26=0 +PageOptions26=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType27=Text Print +OutputName27=Text Print +OutputDocumentPath27= +OutputVariantName27= +OutputDefault27=0 +PageOptions27=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType28=Text Print +OutputName28=Text Print +OutputDocumentPath28= +OutputVariantName28= +OutputDefault28=0 +PageOptions28=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType29=Text Print +OutputName29=Text Print +OutputDocumentPath29= +OutputVariantName29= +OutputDefault29=0 +PageOptions29=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 + +[OutputGroup8] +Name=Validation Outputs +Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=Component states check +OutputName1=Vault's components states check +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=Configuration compliance +OutputName2=Environment configuration compliance check +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=Design Rules Check +OutputName3=Design Rules Check +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType4=Differences Report +OutputName4=Differences Report +OutputDocumentPath4= +OutputVariantName4= +OutputDefault4=0 +PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType5=Electrical Rules Check +OutputName5=Electrical Rules Check +OutputDocumentPath5= +OutputVariantName5= +OutputDefault5=0 +PageOptions5=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType6=Footprint Comparison Report +OutputName6=Footprint Comparison Report +OutputDocumentPath6= +OutputVariantName6= +OutputDefault6=0 + +[OutputGroup9] +Name=Export Outputs +Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=AutoCAD dwg/dxf PCB +OutputName1=AutoCAD dwg/dxf File PCB +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=AutoCAD dwg/dxf Schematic +OutputName2=AutoCAD dwg/dxf File Schematic +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=ExportIDF +OutputName3=Export IDF +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +OutputType4=ExportPARASOLID +OutputName4=Export PARASOLID +OutputDocumentPath4= +OutputVariantName4=[No Variations] +OutputDefault4=0 +OutputType5=ExportSTEP +OutputName5=Export STEP +OutputDocumentPath5= +OutputVariantName5=[No Variations] +OutputDefault5=0 +OutputType6=ExportVRML +OutputName6=Export VRML +OutputDocumentPath6= +OutputVariantName6=[No Variations] +OutputDefault6=0 +OutputType7=Save As/Export PCB +OutputName7=Save As/Export PCB +OutputDocumentPath7= +OutputVariantName7= +OutputDefault7=0 +OutputType8=Save As/Export Schematic +OutputName8=Save As/Export Schematic +OutputDocumentPath8= +OutputVariantName8= +OutputDefault8=0 +OutputType9=Specctra Design PCB +OutputName9=Specctra Design PCB +OutputDocumentPath9= +OutputVariantName9= +OutputDefault9=0 + +[OutputGroup10] +Name=PostProcess Outputs +Description= +TargetPrinter=\\SRV004\PR104005 - RICOH Aficio MP 7502SP +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=Copy Files +OutputName1=Copy Files +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 + +[Modification Levels] +Type1=1 +Type2=1 +Type3=1 +Type4=1 +Type5=1 +Type6=1 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=1 +Type12=1 +Type13=1 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=1 +Type26=1 +Type27=1 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=1 +Type33=1 +Type34=1 +Type35=1 +Type36=1 +Type37=1 +Type38=1 +Type39=1 +Type40=1 +Type41=1 +Type42=1 +Type43=1 +Type44=1 +Type45=1 +Type46=1 +Type47=1 +Type48=1 +Type49=1 +Type50=1 +Type51=1 +Type52=1 +Type53=1 +Type54=1 +Type55=1 +Type56=1 +Type57=1 +Type58=1 +Type59=1 +Type60=1 +Type61=1 +Type62=1 +Type63=1 +Type64=1 +Type65=1 +Type66=1 +Type67=1 +Type68=1 +Type69=1 +Type70=1 +Type71=1 +Type72=1 +Type73=1 +Type74=1 +Type75=1 +Type76=1 +Type77=1 +Type78=1 +Type79=1 +Type80=1 +Type81=1 +Type82=1 +Type83=1 +Type84=1 +Type85=1 +Type86=1 +Type87=1 +Type88=1 +Type89=1 +Type90=1 + +[Difference Levels] +Type1=1 +Type2=1 +Type3=1 +Type4=1 +Type5=1 +Type6=1 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=1 +Type12=1 +Type13=1 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=1 +Type26=1 +Type27=1 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=1 +Type33=1 +Type34=1 +Type35=1 +Type36=1 +Type37=1 +Type38=1 +Type39=1 +Type40=1 +Type41=1 +Type42=1 +Type43=1 +Type44=1 +Type45=1 +Type46=1 +Type47=1 +Type48=1 +Type49=1 + +[Electrical Rules Check] +Type1=1 +Type2=1 +Type3=2 +Type4=1 +Type5=2 +Type6=2 +Type7=1 +Type8=1 +Type9=1 +Type10=1 +Type11=2 +Type12=2 +Type13=2 +Type14=1 +Type15=1 +Type16=1 +Type17=1 +Type18=1 +Type19=1 +Type20=1 +Type21=1 +Type22=1 +Type23=1 +Type24=1 +Type25=2 +Type26=2 +Type27=2 +Type28=1 +Type29=1 +Type30=1 +Type31=1 +Type32=2 +Type33=2 +Type34=2 +Type35=1 +Type36=2 +Type37=1 +Type38=2 +Type39=2 +Type40=2 +Type41=0 +Type42=2 +Type43=1 +Type44=1 +Type45=2 +Type46=1 +Type47=2 +Type48=2 +Type49=1 +Type50=2 +Type51=1 +Type52=1 +Type53=1 +Type54=1 +Type55=1 +Type56=2 +Type57=1 +Type58=1 +Type59=2 +Type60=1 +Type61=2 +Type62=2 +Type63=1 +Type64=0 +Type65=2 +Type66=3 +Type67=2 +Type68=2 +Type69=2 +Type70=2 +Type71=2 +Type72=2 +Type73=2 +Type74=1 +Type75=2 +Type76=1 +Type77=1 +Type78=1 +Type79=1 +Type80=2 +Type81=3 +Type82=3 +Type83=3 +Type84=3 +Type85=3 +Type86=2 +Type87=2 +Type88=2 +Type89=1 +Type90=1 +Type91=3 +Type92=3 +Type93=2 +Type94=2 +Type95=2 +Type96=2 +Type97=2 +Type98=0 +Type99=1 +Type100=2 +Type101=1 +Type102=2 +Type103=2 +Type104=1 +Type105=2 +Type106=2 +Type107=2 +Type108=2 +Type109=1 +Type110=1 +Type111=1 +Type112=1 +Type113=1 +MultiChannelAlternate=2 + +[ERC Connection Matrix] +L1=NNNNNNNNNNNWNNNWW +L2=NNWNNNNWWWNWNWNWN +L3=NWEENEEEENEWNEEWN +L4=NNENNNWEENNWNENWN +L5=NNNNNNNNNNNNNNNNN +L6=NNENNNNEENNWNENWN +L7=NNEWNNWEENNWNENWN +L8=NWEENEENEEENNEENN +L9=NWEENEEEENEWNEEWW +L10=NWNNNNNENNEWNNEWN +L11=NNENNNNEEENWNENWN +L12=WWWWNWWNWWWNWWWNN +L13=NNNNNNNNNNNWNNNWW +L14=NWEENEEEENEWNEEWW +L15=NNENNNNEEENWNENWW +L16=WWWWNWWNWWWNWWWNW +L17=WNNNNNNNWNNNWWWWN + +[Annotate] +SortOrder=3 +SortLocation=0 +MatchParameter1=Comment +MatchStrictly1=1 +MatchParameter2=Library Reference +MatchStrictly2=1 +PhysicalNamingFormat=$Component_$RoomName +GlobalIndexSortOrder=3 +GlobalIndexSortLocation=0 + +[PrjClassGen] +CompClassManualEnabled=0 +CompClassManualRoomEnabled=0 +NetClassAutoBusEnabled=1 +NetClassAutoCompEnabled=0 +NetClassAutoNamedHarnessEnabled=0 +NetClassManualEnabled=1 +NetClassSeparateForBusSections=0 + +[LibraryUpdateOptions] +SelectedOnly=0 +UpdateVariants=1 +PartTypes=0 +ComponentLibIdentifierKind0=Library Name And Type +ComponentLibraryIdentifier0=Microchip Microcontroller 8-Bit PIC18.IntLib +ComponentDesignItemID0=PIC18F44K20-I/P +ComponentSymbolReference0=PIC18F44K20-I/P +ComponentUpdate0=0 +ComponentIsDeviceSheet0=0 +ComponentLibIdentifierKind1=Library Name And Type +ComponentLibraryIdentifier1=Miscellaneous Connectors.IntLib +ComponentDesignItemID1=Header 16 +ComponentSymbolReference1=Header 16 +ComponentUpdate1=0 +ComponentIsDeviceSheet1=0 +ComponentLibIdentifierKind2=Library Name And Type +ComponentLibraryIdentifier2=Miscellaneous Connectors.IntLib +ComponentDesignItemID2=Header 2 +ComponentSymbolReference2=Header 2 +ComponentUpdate2=0 +ComponentIsDeviceSheet2=0 +ComponentLibIdentifierKind3=Library Name And Type +ComponentLibraryIdentifier3=Miscellaneous Connectors.IntLib +ComponentDesignItemID3=Header 4 +ComponentSymbolReference3=Header 4 +ComponentUpdate3=0 +ComponentIsDeviceSheet3=0 +ComponentLibIdentifierKind4=Library Name And Type +ComponentLibraryIdentifier4=Miscellaneous Devices.IntLib +ComponentDesignItemID4=Cap2 +ComponentSymbolReference4=Cap2 +ComponentUpdate4=0 +ComponentIsDeviceSheet4=0 +ComponentLibIdentifierKind5=Library Name And Type +ComponentLibraryIdentifier5=Miscellaneous Devices.IntLib +ComponentDesignItemID5=Diode BAT18 +ComponentSymbolReference5=Diode BAT18 +ComponentUpdate5=1 +ComponentIsDeviceSheet5=0 +ComponentLibIdentifierKind6=Library Name And Type +ComponentLibraryIdentifier6=Miscellaneous Devices.IntLib +ComponentDesignItemID6=LED1 +ComponentSymbolReference6=LED1 +ComponentUpdate6=0 +ComponentIsDeviceSheet6=0 +ComponentLibIdentifierKind7=Library Name And Type +ComponentLibraryIdentifier7=Miscellaneous Devices.IntLib +ComponentDesignItemID7=Res2 +ComponentSymbolReference7=Res2 +ComponentUpdate7=0 +ComponentIsDeviceSheet7=0 +ComponentLibIdentifierKind8=Library Name And Type +ComponentLibraryIdentifier8=Miscellaneous Devices.IntLib +ComponentDesignItemID8=SW-SPDT +ComponentSymbolReference8=SW-SPDT +ComponentUpdate8=0 +ComponentIsDeviceSheet8=0 +ComponentLibIdentifierKind9=Library Name And Type +ComponentLibraryIdentifier9=Miscellaneous Devices.IntLib +ComponentDesignItemID9=XTAL +ComponentSymbolReference9=XTAL +ComponentUpdate9=1 +ComponentIsDeviceSheet9=0 +ComponentLibIdentifierKind10=Library Name And Type +ComponentLibraryIdentifier10=Molex Modular Jack Right Angle.IntLib +ComponentDesignItemID10=95001-2661 +ComponentSymbolReference10=95001-2661 +ComponentUpdate10=0 +ComponentIsDeviceSheet10=0 +ComponentLibIdentifierKind11=Library Name And Type +ComponentLibraryIdentifier11=TestPad.SchLib +ComponentDesignItemID11=TestPad +ComponentSymbolReference11=TestPad +ComponentUpdate11=1 +ComponentIsDeviceSheet11=0 +ComponentLibIdentifierKind12=Library Name And Type +ComponentLibraryIdentifier12=TI Logic Buffer Line Driver.IntLib +ComponentDesignItemID12=SN74F125N +ComponentSymbolReference12=SN74F125N +ComponentUpdate12=0 +ComponentIsDeviceSheet12=0 +FullReplace=1 +UpdateDesignatorLock=1 +UpdatePartIDLock=1 +PreserveParameterLocations=1 +PreserveParameterVisibility=1 +DoGraphics=1 +DoParameters=1 +DoModels=1 +AddParameters=0 +RemoveParameters=0 +AddModels=1 +RemoveModels=1 +UpdateCurrentModels=1 +ParameterName0=Comment +ParameterUpdate0=1 +ParameterName1=Component Kind +ParameterUpdate1=1 +ParameterName2=ComponentLink1Description +ParameterUpdate2=1 +ParameterName3=ComponentLink1URL +ParameterUpdate3=1 +ParameterName4=ComponentLink2Description +ParameterUpdate4=1 +ParameterName5=ComponentLink2URL +ParameterUpdate5=1 +ParameterName6=ComponentLink3Description +ParameterUpdate6=1 +ParameterName7=ComponentLink3URL +ParameterUpdate7=1 +ParameterName8=DatasheetDocument +ParameterUpdate8=1 +ParameterName9=DatasheetVersion +ParameterUpdate9=1 +ParameterName10=Description +ParameterUpdate10=1 +ParameterName11=DrillSize +ParameterUpdate11=1 +ParameterName12=LatestRevisionDate +ParameterUpdate12=1 +ParameterName13=LatestRevisionNote +ParameterUpdate13=1 +ParameterName14=Library Reference +ParameterUpdate14=1 +ParameterName15=Note +ParameterUpdate15=1 +ParameterName16=PackageDescription +ParameterUpdate16=1 +ParameterName17=PackageDocument +ParameterUpdate17=1 +ParameterName18=PackageReference +ParameterUpdate18=1 +ParameterName19=PackageVersion +ParameterUpdate19=1 +ParameterName20=PCB_Layout +ParameterUpdate20=1 +ParameterName21=PCB_Mounting +ParameterUpdate21=1 +ParameterName22=PerformanceCategory +ParameterUpdate22=1 +ParameterName23=Ports +ParameterUpdate23=1 +ParameterName24=Positions/Loaded +ParameterUpdate24=1 +ParameterName25=Published +ParameterUpdate25=1 +ParameterName26=Publisher +ParameterUpdate26=1 +ParameterName27=Supplier 1 +ParameterUpdate27=1 +ParameterName28=Supplier 2 +ParameterUpdate28=1 +ParameterName29=Supplier Part Number 1 +ParameterUpdate29=1 +ParameterName30=Supplier Part Number 2 +ParameterUpdate30=1 +ParameterName31=Value +ParameterUpdate31=1 +ModelTypeGroup0=PCB3DLib +ModelTypeUpdate0=1 +ModelType0=PCB3DLib +ModelName0=N014 +ModelUpdate0=1 +ModelTypeGroup1=PCBLIB +ModelTypeUpdate1=1 +ModelType1=PCBLIB +ModelName1=95001-2661 +ModelUpdate1=1 +ModelType2=PCBLIB +ModelName2=AXIAL-0.4 +ModelUpdate2=1 +ModelType3=PCBLIB +ModelName3=BAT-2 +ModelUpdate3=1 +ModelType4=PCBLIB +ModelName4=CAPR5-4X5 +ModelUpdate4=1 +ModelType5=PCBLIB +ModelName5=HDR1X2 +ModelUpdate5=1 +ModelType6=PCBLIB +ModelName6=HDR1X3 +ModelUpdate6=1 +ModelType7=PCBLIB +ModelName7=HDR1X4 +ModelUpdate7=1 +ModelType8=PCBLIB +ModelName8=HDR2X8 +ModelUpdate8=1 +ModelType9=PCBLIB +ModelName9=N014 +ModelUpdate9=1 +ModelType10=PCBLIB +ModelName10=PDIP600-P40 +ModelUpdate10=1 +ModelType11=PCBLIB +ModelName11=PIN1 +ModelUpdate11=1 +ModelType12=PCBLIB +ModelName12=R38 +ModelUpdate12=1 +ModelType13=PCBLIB +ModelName13=SOT-23_L +ModelUpdate13=1 +ModelType14=PCBLIB +ModelName14=SOT-23_M +ModelUpdate14=1 +ModelType15=PCBLIB +ModelName15=SOT-23_N +ModelUpdate15=1 +ModelTypeGroup2=SI +ModelTypeUpdate2=1 +ModelType16=SI +ModelName16=Cap +ModelUpdate16=1 +ModelType17=SI +ModelName17=Connector +ModelUpdate17=1 +ModelType18=SI +ModelName18=Modular Jack +ModelUpdate18=1 +ModelType19=SI +ModelName19=Res +ModelUpdate19=1 +ModelType20=SI +ModelName20=SN74F125N +ModelUpdate20=1 +ModelTypeGroup3=SIM +ModelTypeUpdate3=1 +ModelType21=SIM +ModelName21=BAT18 +ModelUpdate21=1 +ModelType22=SIM +ModelName22=CAP +ModelUpdate22=1 +ModelType23=SIM +ModelName23=LED1 +ModelUpdate23=1 +ModelType24=SIM +ModelName24=RESISTOR +ModelUpdate24=1 +ModelType25=SIM +ModelName25=SN74F125 +ModelUpdate25=1 +ModelType26=SIM +ModelName26=XTAL +ModelUpdate26=1 + +[DatabaseUpdateOptions] +SelectedOnly=0 +UpdateVariants=1 +PartTypes=0 + +[Comparison Options] +ComparisonOptions0=Kind=Net|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions1=Kind=Net Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions2=Kind=Component Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions3=Kind=Rule|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 +ComparisonOptions4=Kind=Differential Pair|MinPercent=50|MinMatch=1|ShowMatch=0|Confirm=0|UseName=0|InclAllRules=0 +ComparisonOptions5=Kind=Structure Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 + +[SmartPDF] +PageOptions=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 + diff --git a/hw/Steps.PrjPcbStructure b/hw/Steps.PrjPcbStructure new file mode 100644 index 0000000..ad576e9 --- /dev/null +++ b/hw/Steps.PrjPcbStructure @@ -0,0 +1,16 @@ +Record=TopLevelDocument|FileName=Steps.SchDoc +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ1|SchDesignator=PZ1|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ2|SchDesignator=PZ2|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ3|SchDesignator=PZ3|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ4|SchDesignator=PZ4|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ5|SchDesignator=PZ5|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ6|SchDesignator=PZ6|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ7|SchDesignator=PZ7|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ8|SchDesignator=PZ8|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ9|SchDesignator=PZ9|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ10|SchDesignator=PZ10|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ11|SchDesignator=PZ11|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ12|SchDesignator=PZ12|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ13|SchDesignator=PZ13|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ14|SchDesignator=PZ14|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ15|SchDesignator=PZ15|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= diff --git a/hw/Steps.SchDoc b/hw/Steps.SchDoc new file mode 100644 index 0000000..669ad9c Binary files /dev/null and b/hw/Steps.SchDoc differ diff --git a/hw/Steps.SchLib b/hw/Steps.SchLib new file mode 100644 index 0000000..30e1355 Binary files /dev/null and b/hw/Steps.SchLib differ diff --git a/hw/Switchcraft.PcbLib b/hw/Switchcraft.PcbLib new file mode 100644 index 0000000..1413466 Binary files /dev/null and b/hw/Switchcraft.PcbLib differ diff --git a/hw/Switchcraft.SchLib b/hw/Switchcraft.SchLib new file mode 100644 index 0000000..039be96 Binary files /dev/null and b/hw/Switchcraft.SchLib differ diff --git a/hw/TestPad.SchLib b/hw/TestPad.SchLib new file mode 100644 index 0000000..f08c29a Binary files /dev/null and b/hw/TestPad.SchLib differ diff --git a/hw/Workspace.DsnWrk b/hw/Workspace.DsnWrk index ded8cb2..abc8099 100644 --- a/hw/Workspace.DsnWrk +++ b/hw/Workspace.DsnWrk @@ -1,4 +1,8 @@ [ProjectGroup] Version=1.0 [Project1] +ProjectPath=Mids.PrjPcb +[Project2] +ProjectPath=Steps.PrjPcb +[Project3] ProjectPath=Xilofono.PrjPcb diff --git a/hw/Xilofono.OutJob b/hw/Xilofono.OutJob new file mode 100644 index 0000000..b8a4a62 --- /dev/null +++ b/hw/Xilofono.OutJob @@ -0,0 +1,145 @@ +[OutputJobFile] +Version=1.0 +Caption= +Description= +VaultGUID= +ItemGUID= +ItemHRID= +RevisionGUID= +RevisionId= +VaultHRID= +AutoItemHRID= +NextRevId= +FolderGUID= +LifeCycleDefinitionGUID= +RevisionNamingSchemeGUID= + +[OutputGroup1] +Name=Job1.OutJob +Description= +TargetOutputMedium=PDF +VariantName=[No Variations] +VariantScope=1 +CurrentConfigurationName= +TargetPrinter=Virtual Printer +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputMedium1=Print Job +OutputMedium1_Type=Printer +OutputMedium1_Printer= +OutputMedium1_PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputMedium2=PDF +OutputMedium2_Type=Publish +OutputMedium3=Folder Structure +OutputMedium3_Type=GeneratedFiles +OutputMedium4=Video +OutputMedium4_Type=Multimedia +OutputType1=Schematic Print +OutputName1=Schematic Prints +OutputCategory1=Documentation +OutputDocumentPath1= +OutputVariantName1= +OutputEnabled1=1 +OutputEnabled1_OutputMedium1=0 +OutputEnabled1_OutputMedium2=1 +OutputEnabled1_OutputMedium3=0 +OutputEnabled1_OutputMedium4=0 +OutputDefault1=0 +PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +Configuration1_Name1=OutputConfigurationParameter1 +Configuration1_Item1=Record=SchPrintView|ShowNoERC=True|ShowParamSet=True|ShowProbe=True|ShowBlanket=True|NoERCSymbolsToShow="Thin Cross","Thick Cross","Small Cross",Checkbox,Triangle|ShowNote=True|ShowNoteCollapsed=True|ShowOpenEnds=True|ExpandDesignator=True|ExpandNetLabel=False|ExpandPort=False|ExpandSheetNum=False|ExpandDocNum=False|PrintArea=0|PrintAreaRect.X1=0|PrintAreaRect.Y1=0|PrintAreaRect.X2=0|PrintAreaRect.Y2=0 + +[PublishSettings] +OutputFilePath2=Project Outputs for Free Documents\Job1.PDF +ReleaseManaged2=1 +OutputBasePath2=Project Outputs for Free Documents +OutputPathMedia2= +OutputPathMediaValue2= +OutputPathOutputer2=[Output Type] +OutputPathOutputerPrefix2= +OutputPathOutputerValue2= +OutputFileName2=Xilofono +OutputFileNameMulti2= +UseOutputNameForMulti2=0 +OutputFileNameSpecial2= +OpenOutput2=1 +PromptOverwrite2=1 +PublishMethod2=0 +ZoomLevel2=50 +FitSCHPrintSizeToDoc2=1 +FitPCBPrintSizeToDoc2=1 +GenerateNetsInfo2=1 +MarkPins2=1 +MarkNetLabels2=1 +MarkPortsId2=1 +GenerateTOC2=1 +ShowComponentParameters2=1 +GlobalBookmarks2=0 +PDFACompliance2=Disabled +PDFVersion2=Default +OutputFilePath3= +ReleaseManaged3=1 +OutputBasePath3= +OutputPathMedia3= +OutputPathMediaValue3= +OutputPathOutputer3=[Output Type] +OutputPathOutputerPrefix3= +OutputPathOutputerValue3= +OutputFileName3= +OutputFileNameMulti3= +UseOutputNameForMulti3=1 +OutputFileNameSpecial3= +OpenOutput3=1 +OutputFilePath4= +ReleaseManaged4=1 +OutputBasePath4= +OutputPathMedia4= +OutputPathMediaValue4= +OutputPathOutputer4=[Output Type] +OutputPathOutputerPrefix4= +OutputPathOutputerValue4= +OutputFileName4= +OutputFileNameMulti4= +UseOutputNameForMulti4=1 +OutputFileNameSpecial4= +OpenOutput4=1 +PromptOverwrite4=1 +PublishMethod4=5 +ZoomLevel4=50 +FitSCHPrintSizeToDoc4=1 +FitPCBPrintSizeToDoc4=1 +GenerateNetsInfo4=1 +MarkPins4=1 +MarkNetLabels4=1 +MarkPortsId4=1 +MediaFormat4=Windows Media file (*.wmv,*.wma,*.asf) +FixedDimensions4=1 +Width4=352 +Height4=288 +MultiFile4=0 +FramesPerSecond4=25 +FramesPerSecondDenom4=1 +AviPixelFormat4=7 +AviCompression4=MP42 MS-MPEG4 V2 +AviQuality4=100 +FFmpegVideoCodecId4=13 +FFmpegPixelFormat4=0 +FFmpegQuality4=80 +WmvVideoCodecName4=Windows Media Video V7 +WmvQuality4=80 + +[GeneratedFilesSettings] +RelativeOutputPath2=Project Outputs for Free Documents\Job1.PDF +OpenOutputs2=1 +RelativeOutputPath3= +OpenOutputs3=1 +AddToProject3=1 +TimestampFolder3=0 +UseOutputName3=0 +OpenODBOutput3=0 +OpenGerberOutput3=0 +OpenNCDrillOutput3=0 +OpenIPCOutput3=0 +EnableReload3=0 +RelativeOutputPath4= +OpenOutputs4=1 + diff --git a/hw/Xilofono.PrjPcb b/hw/Xilofono.PrjPcb index 7261bc9..a21f8b3 100644 --- a/hw/Xilofono.PrjPcb +++ b/hw/Xilofono.PrjPcb @@ -13,7 +13,7 @@ TemplateLocationPath= PinSwapBy_Netlabel=1 PinSwapBy_Pin=1 AllowPortNetNames=0 -AllowSheetEntryNetNames=1 +AllowSheetEntryNetNames=0 AppendSheetNumberToLocalNets=0 NetlistSinglePinNets=0 DefaultConfiguration=Sources @@ -21,7 +21,7 @@ UserID=0xFFFFFFFF DefaultPcbProtel=1 DefaultPcbPcad=0 ReorderDocumentsOnCompile=1 -NameNetsHierarchically=0 +NameNetsHierarchically=1 PowerPortNamesTakePriority=0 PushECOToAnnotationFile=1 DItemRevisionGUID= @@ -39,13 +39,13 @@ PrefsVaultGUID= PrefsRevisionGUID= [Document1] -DocumentPath=Xilofono.SchDoc +DocumentPath=Piezo.SchDoc AnnotationEnabled=1 AnnotateStartValue=1 AnnotationIndexControlEnabled=0 AnnotateSuffix= AnnotateScope=All -AnnotateOrder=1 +AnnotateOrder=0 DoLibraryUpdate=1 DoDatabaseUpdate=1 ClassGenCCAutoEnabled=1 @@ -53,10 +53,10 @@ ClassGenCCAutoRoomEnabled=1 ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -DocumentUniqueId=RUXBFIEP +DocumentUniqueId=VJJUNBIE [Document2] -DocumentPath=Steps.PcbDoc +DocumentPath=Mids.SchDoc AnnotationEnabled=1 AnnotateStartValue=1 AnnotationIndexControlEnabled=0 @@ -70,16 +70,16 @@ ClassGenCCAutoRoomEnabled=1 ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -DocumentUniqueId=CYIUPGSB +DocumentUniqueId=ABPFCPLB [Document3] -DocumentPath=Piezo.SchDoc +DocumentPath=Steps.SchDoc AnnotationEnabled=1 AnnotateStartValue=1 AnnotationIndexControlEnabled=0 AnnotateSuffix= AnnotateScope=All -AnnotateOrder=0 +AnnotateOrder=-1 DoLibraryUpdate=1 DoDatabaseUpdate=1 ClassGenCCAutoEnabled=1 @@ -87,7 +87,75 @@ ClassGenCCAutoRoomEnabled=1 ClassGenNCAutoScope=None DItemRevisionGUID= GenerateClassCluster=0 -DocumentUniqueId=VJJUNBIE +DocumentUniqueId=RUXBFIEP + +[Document4] +DocumentPath=Xilofono.OutJob +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document5] +DocumentPath=TestPad.SchLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId=IWKHUTRL + +[Document6] +DocumentPath=Steps.SchLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document7] +DocumentPath=Mids.SchLib +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=1 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= [Configuration1] Name=Sources @@ -99,6 +167,9 @@ OutputJobsCount=0 ContentTypeGUID=CB6F2064-E317-11DF-B822-12313F0024A2 ConfigurationType=Source +[Generic_EDE] +OutputDir= + [OutputGroup1] Name=Netlist Outputs Description= diff --git a/hw/Xilofono.PrjPcbStructure b/hw/Xilofono.PrjPcbStructure index 1c1c712..631d012 100644 --- a/hw/Xilofono.PrjPcbStructure +++ b/hw/Xilofono.PrjPcbStructure @@ -1,26 +1,26 @@ -Record=TopLevelDocument|FileName=Xilofono.SchDoc -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ1|SchDesignator=PZ1|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ2|SchDesignator=PZ2|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ3|SchDesignator=PZ3|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ4|SchDesignator=PZ4|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ5|SchDesignator=PZ5|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ6|SchDesignator=PZ6|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ7|SchDesignator=PZ7|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ8|SchDesignator=PZ8|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ9|SchDesignator=PZ9|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ10|SchDesignator=PZ10|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ11|SchDesignator=PZ11|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ12|SchDesignator=PZ12|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ13|SchDesignator=PZ13|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ14|SchDesignator=PZ14|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ15|SchDesignator=PZ15|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ16|SchDesignator=PZ16|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ17|SchDesignator=PZ17|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ18|SchDesignator=PZ18|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ19|SchDesignator=PZ19|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ20|SchDesignator=PZ20|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ21|SchDesignator=PZ21|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ22|SchDesignator=PZ22|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ23|SchDesignator=PZ23|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ24|SchDesignator=PZ24|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= -Record=SheetSymbol|SourceDocument=Xilofono.SchDoc|Designator=PZ25|SchDesignator=PZ25|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=TopLevelDocument|FileName=Steps.SchDoc +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ16|SchDesignator=PZ16|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ17|SchDesignator=PZ17|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ18|SchDesignator=PZ18|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ19|SchDesignator=PZ19|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ20|SchDesignator=PZ20|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ21|SchDesignator=PZ21|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ22|SchDesignator=PZ22|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ23|SchDesignator=PZ23|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ24|SchDesignator=PZ24|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Mids.SchDoc|Designator=PZ25|SchDesignator=PZ25|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ1|SchDesignator=PZ1|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ2|SchDesignator=PZ2|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ3|SchDesignator=PZ3|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ4|SchDesignator=PZ4|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ5|SchDesignator=PZ5|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ6|SchDesignator=PZ6|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ7|SchDesignator=PZ7|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ8|SchDesignator=PZ8|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ9|SchDesignator=PZ9|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ10|SchDesignator=PZ10|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ11|SchDesignator=PZ11|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ12|SchDesignator=PZ12|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ13|SchDesignator=PZ13|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ14|SchDesignator=PZ14|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= +Record=SheetSymbol|SourceDocument=Steps.SchDoc|Designator=PZ15|SchDesignator=PZ15|FileName=Piezo.SchDoc|SymbolType=Normal|RawFileName=Piezo.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= diff --git a/hw/Xilofono.SchDoc b/hw/Xilofono.SchDoc deleted file mode 100644 index ff8a5ce..0000000 Binary files a/hw/Xilofono.SchDoc and /dev/null differ diff --git a/hw/debug.log b/hw/debug.log index e69de29..689977c 100644 --- a/hw/debug.log +++ b/hw/debug.log @@ -0,0 +1,124 @@ +[0119/140753:INFO:CONSOLE(0)] "Synchronous XMLHttpRequest on the main thread is deprecated because of its detrimental effects to the end user's experience. For more help, check https://xhr.spec.whatwg.org/.", source: (0) +[0119/140755:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: http://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2019%20Jan%202018%2013%3A07%3A55%20GMT&n=-1&b=Altium%20Design%20Platform%20Product%20Extension%20Applications%20(Third%20Party%20Integration)&.yp=429165&f=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&e=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&enc=UTF-8 (1) +[0119/140755:INFO:CONSOLE(43)] "[object Object]", source: (43) +[0119/140801:ERROR:render_media_log.cc(23)] MediaEvent: PIPELINE_ERROR demuxer: could not open +[0119/140801:INFO:CONSOLE(0)] "Refused to execute script from 'https://px.ads.linkedin.com/collect/?time=1516367279872&pid=15042&url=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&pageUrl=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&ref=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&fmt=js&s=1' because its MIME type ('image/gif') is not executable.", source: http://www.altium.com/products/extensions (0) +[0119/140801:ERROR:webrtcsession.cc(1388)] ConnectDataChannel called when data_channel_ is NULL. +[0119/140802:INFO:CONSOLE(0)] "Refused to execute script from 'https://dc.ads.linkedin.com/collect/?time=1516367279872&pid=15042&url=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&pageUrl=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&ref=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&fmt=js&s=1' because its MIME type ('image/gif') is not executable.", source: http://www.altium.com/products/extensions (0) +[0119/140802:WARNING:mediasession.cc(376)] Duplicate id found. Reassigning from 101 to 127 +[0119/140802:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: http://connect.facebook.net/en_US/fbevents.js (25) +[0119/140802:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[0035DAE0:data:1:0:local:Net[any:0.0.0.x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/140802:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[0035E6E8:data:1:0:local:Net[any:0:0:0:x:x:x:x:x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/140822:WARNING:spdy_session.cc(2427)] Received HEADERS for invalid stream 1 +[0119/140822:WARNING:spdy_session.cc(2427)] Received HEADERS for invalid stream 3 +[0119/140822:INFO:CONSOLE(241)] "No Vidyard Players found. (include this script below player embed codes)", source: https://assets.vidyard.com/play/js/v0/google-analytics-269e106b2f9f108c34a38a2a25b0dba6.js (241) +[0119/140823:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: http://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2019%20Jan%202018%2013%3A08%3A23%20GMT&n=-1&b=Downloads%20for%20PCB%20Design%20Products%20and%20EDA%20Software%20%7C%20Altium&.yp=429165&f=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fdownloads&e=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&enc=UTF-8 (1) +[0119/140823:INFO:CONSOLE(0)] "Refused to execute script from 'https://dc.ads.linkedin.com/collect/?time=1516367303745&pid=15042&url=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fdownloads&pageUrl=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fdownloads&ref=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&fmt=js&s=1' because its MIME type ('image/gif') is not executable.", source: http://www.altium.com/products/downloads (0) +[0119/140824:INFO:CONSOLE(43)] "[object Object]", source: (43) +[0119/140824:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: http://connect.facebook.net/en_US/fbevents.js (25) +[0119/140824:INFO:CONSOLE(0)] "Refused to execute script from 'https://px.ads.linkedin.com/collect/?time=1516367303745&pid=15042&url=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fdownloads&pageUrl=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fdownloads&ref=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&fmt=js&s=1' because its MIME type ('image/gif') is not executable.", source: http://www.altium.com/products/downloads (0) +[0119/140824:ERROR:render_media_log.cc(23)] MediaEvent: PIPELINE_ERROR demuxer: could not open +[0119/140824:ERROR:webrtcsession.cc(1388)] ConnectDataChannel called when data_channel_ is NULL. +[0119/140824:WARNING:mediasession.cc(376)] Duplicate id found. Reassigning from 101 to 127 +[0119/140824:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[0035E950:data:1:0:local:Net[any:0.0.0.x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/140824:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[0035D3A8:data:1:0:local:Net[any:0:0:0:x:x:x:x:x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/140826:INFO:CONSOLE(0)] "WebSocket connection to 'wss://ws.api.drift.com/ws/websocket?session_token=SFMyNTY.g3QAAAACZAAEZGF0YXQAAAAEZAACaWRtAAAAMTYwODA3LWFub246MTcyOGQ3ZWItMDk3MC00YjUwLThmMjYtMmYxNzdjMDRiYTEzLTRkAAdsZWFkX2lkbQAAACQxNzI4ZDdlYi0wOTcwLTRiNTAtOGYyNi0yZjE3N2MwNGJhMTNkAAZvcmdfaWRiAADth2QACXVzZXJfdHlwZWQABGxlYWRkAAZzaWduZWRuBgBK3IgOYQE.Wlt-P7D6rQHy5h3kKfVK1gU9rBIPaalWekLTeReZpSg&vsn=1.0.0' failed: WebSocket is closed before the connection is established.", source: https://js.driftt.com/dist/index-prod.html (0) +[0119/140828:INFO:CONSOLE(0)] "Synchronous XMLHttpRequest on the main thread is deprecated because of its detrimental effects to the end user's experience. For more help, check https://xhr.spec.whatwg.org/.", source: (0) +[0119/140829:INFO:CONSOLE(1)] "Uncaught (in promise) NotSupportedError: The element has no supported sources.", source: https://js.driftt.com/dist/assets/widget-9f0bee0ee6f6a2b82753-prod.js (1) +[0119/140831:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: https://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2019%20Jan%202018%2013%3A08%3A31%20GMT&n=-1&b=Altium%20Design%20Content&.yp=429165&f=https%3A%2F%2Fdesigncontent.live.altium.com%2F&e=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fdownloads&enc=UTF-8 (1) +[0119/140833:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: https://connect.facebook.net/en_US/fbevents.js (25) +[0119/150949:ERROR:ipc_channel_win.cc(482)] pipe error: 109 +[0119/151139:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: http://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2019%20Jan%202018%2014%3A11%3A39%20GMT&n=-1&b=Altium%20Design%20Platform%20Product%20Extension%20Applications%20(Third%20Party%20Integration)&.yp=429165&f=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&e=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&enc=UTF-8 (1) +[0119/151139:INFO:CONSOLE(43)] "[object Object]", source: (43) +[0119/151141:ERROR:render_media_log.cc(23)] MediaEvent: PIPELINE_ERROR demuxer: could not open +[0119/151141:INFO:CONSOLE(0)] "Refused to execute script from 'https://dc.ads.linkedin.com/collect/?time=1516371100003&pid=15042&url=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&pageUrl=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&ref=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&fmt=js&s=1' because its MIME type ('image/gif') is not executable.", source: http://www.altium.com/products/extensions (0) +[0119/151141:INFO:CONSOLE(0)] "Refused to execute script from 'https://px.ads.linkedin.com/collect/?time=1516371100003&pid=15042&url=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&pageUrl=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&ref=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&fmt=js&s=1' because its MIME type ('image/gif') is not executable.", source: http://www.altium.com/products/extensions (0) +[0119/151141:ERROR:webrtcsession.cc(1388)] ConnectDataChannel called when data_channel_ is NULL. +[0119/151141:WARNING:mediasession.cc(376)] Duplicate id found. Reassigning from 101 to 127 +[0119/151141:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[003A80C0:data:1:0:local:Net[any:0.0.0.x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/151141:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[003A7720:data:1:0:local:Net[any:0:0:0:x:x:x:x:x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/151141:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: http://connect.facebook.net/en_US/fbevents.js (25) +[0119/151141:INFO:CONSOLE(0)] "Synchronous XMLHttpRequest on the main thread is deprecated because of its detrimental effects to the end user's experience. For more help, check https://xhr.spec.whatwg.org/.", source: (0) +[0119/151144:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: https://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2019%20Jan%202018%2014%3A11%3A44%20GMT&n=-1&b=Altium%20Design%20Content&.yp=429165&f=https%3A%2F%2Fdesigncontent.live.altium.com%2F&e=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&enc=UTF-8 (1) +[0119/151145:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: https://connect.facebook.net/en_US/fbevents.js (25) +[0119/151236:INFO:CONSOLE(2139)] "Uncaught TypeError: Cannot read property 'id' of null", source: https://designcontent.live.altium.com/mfk_framework.js?cls=code&lng=en&xid={1CFF0F89-1BBB-4BE1-AEFB-C969D237472B} (2139) +[0119/151238:INFO:CONSOLE(0)] "Synchronous XMLHttpRequest on the main thread is deprecated because of its detrimental effects to the end user's experience. For more help, check https://xhr.spec.whatwg.org/.", source: (0) +[0119/151358:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: https://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2019%20Jan%202018%2014%3A13%3A57%20GMT&n=-1&b=Altium%20Design%20Content&.yp=429165&f=https%3A%2F%2Fdesigncontent.live.altium.com%2F%23UnifiedComponentDetail%2FMolex_Legacy%2F%3Fsearch%3Dmolex&e=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&enc=UTF-8 (1) +[0119/151358:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: https://connect.facebook.net/en_US/fbevents.js (25) +[0119/151359:ERROR:webrtcsession.cc(1388)] ConnectDataChannel called when data_channel_ is NULL. +[0119/151359:WARNING:mediasession.cc(376)] Duplicate id found. Reassigning from 101 to 127 +[0119/151359:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[0C0596C0:data:1:0:local:Net[any:0.0.0.x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/151359:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[0C059928:data:1:0:local:Net[any:0:0:0:x:x:x:x:x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0119/154736:WARNING:dns_config_service_win.cc(665)] Failed to read DnsConfig. +[0119/162839:ERROR:ipc_channel_win.cc(482)] pipe error: 109 +[0202/090544:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: http://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2002%20Feb%202018%2008%3A05%3A44%20GMT&n=-1&b=Altium%20Design%20Platform%20Product%20Extension%20Applications%20(Third%20Party%20Integration)&.yp=429165&f=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&e=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&enc=UTF-8 (1) +[0202/090546:INFO:CONSOLE(43)] "[object Object]", source: (43) +[0202/090546:INFO:CONSOLE(0)] "Refused to execute script from 'https://dc.ads.linkedin.com/collect/?time=1517558745347&pid=15042&url=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&pageUrl=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&ref=http%3A%2F%2Fwww.altium.com%2Fad-start-1%2F&fmt=js&s=1' because its MIME type ('image/gif') is not executable.", source: http://www.altium.com/products/extensions (0) +[0202/090546:ERROR:render_media_log.cc(23)] MediaEvent: PIPELINE_ERROR demuxer: could not open +[0202/090547:ERROR:webrtcsession.cc(1388)] ConnectDataChannel called when data_channel_ is NULL. +[0202/090547:WARNING:mediasession.cc(376)] Duplicate id found. Reassigning from 101 to 127 +[0202/090548:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[00373FF0:data:1:0:local:Net[any:0.0.0.x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0202/090548:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[00373B20:data:1:0:local:Net[any:0:0:0:x:x:x:x:x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0202/090608:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: http://connect.facebook.net/en_US/fbevents.js (25) +[0202/090613:INFO:CONSOLE(0)] "Synchronous XMLHttpRequest on the main thread is deprecated because of its detrimental effects to the end user's experience. For more help, check https://xhr.spec.whatwg.org/.", source: (0) +[0202/090618:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: https://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2002%20Feb%202018%2008%3A06%3A18%20GMT&n=-1&b=Altium%20Design%20Content&.yp=429165&f=https%3A%2F%2Fdesigncontent.live.altium.com%2F&e=http%3A%2F%2Fwww.altium.com%2Fproducts%2Fextensions&enc=UTF-8 (1) +[0202/090618:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: https://connect.facebook.net/en_US/fbevents.js (25) +[0202/090618:ERROR:webrtcsession.cc(1388)] ConnectDataChannel called when data_channel_ is NULL. +[0202/090618:WARNING:mediasession.cc(376)] Duplicate id found. Reassigning from 101 to 127 +[0202/090619:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[00373650:data:1:0:local:Net[any:0.0.0.x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0202/090619:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[00374BF8:data:1:0:local:Net[any:0:0:0:x:x:x:x:x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0202/092613:ERROR:webrtcsession.cc(1388)] ConnectDataChannel called when data_channel_ is NULL. +[0202/092613:INFO:CONSOLE(0)] "Synchronous XMLHttpRequest on the main thread is deprecated because of its detrimental effects to the end user's experience. For more help, check https://xhr.spec.whatwg.org/.", source: (0) +[0202/092613:WARNING:mediasession.cc(376)] Duplicate id found. Reassigning from 101 to 127 +[0202/092614:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[00374BF8:data:1:0:local:Net[any:0.0.0.x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0202/092614:WARNING:p2ptransportchannel.cc(487)] Jingle:Port[00373D88:data:1:0:local:Net[any:0:0:0:x:x:x:x:x/0:Unknown]]: SetOption(5, 0) failed: 0 +[0202/092708:INFO:CONSOLE(1)] "Uncaught SyntaxError: Unexpected identifier", source: https://sp.analytics.yahoo.com/sp.pl?a=10001942155268&jsonp=YAHOO.ywa.I13N.handleJSONResponse&d=Fri%2C%2002%20Feb%202018%2008%3A27%3A08%20GMT&n=-1&b=Altium%20Design%20Content&.yp=429165&f=https%3A%2F%2Fdesigncontent.live.altium.com%2F&enc=UTF-8 (1) +[0202/092709:INFO:CONSOLE(25)] "[Facebook Pixel] - Multiple pixels with conflicting versions were detected on this page.", source: https://connect.facebook.net/en_US/fbevents.js (25) +[0202/113231:ERROR:gles2_cmd_decoder.cc(12775)] Context lost because SwapBuffers failed. +[0202/113231:ERROR:gles2_cmd_decoder.cc(13124)] Onscreen context lost via ARB/EXT_robustness. Reset status = GL_UNKNOWN_CONTEXT_RESET_KHR +[0202/113231:ERROR:gles2_cmd_decoder.cc(4548)] Error: 5 for Command kPostSubBufferCHROMIUM +[0202/113231:ERROR:gpu_channel_manager.cc(253)] Exiting GPU process because some drivers cannot recover from problems. +[0202/113231:ERROR:gpu_channel_manager.cc(253)] Exiting GPU process because some drivers cannot recover from problems. +[0202/113231:ERROR:gpu_channel_manager.cc(253)] Exiting GPU process because some drivers cannot recover from problems. +[0202/113231:ERROR:gpu_channel_manager.cc(253)] Exiting GPU process because some drivers cannot recover from problems. +[0202/113231:ERROR:gpu_channel_manager.cc(253)] Exiting GPU process because some drivers cannot recover from problems. +[0202/113231:ERROR:gpu_channel_manager.cc(253)] Exiting GPU process because some drivers cannot recover from problems. +[0202/113231:ERROR:gpu_channel_manager.cc(253)] Exiting GPU process because some drivers cannot recover from problems. +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11526)] Trying to call glDeleteVertexArraysOES() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11444)] Trying to call glDeleteBuffersARB() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11465)] Trying to call glDeleteFramebuffersEXT() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11465)] Trying to call glDeleteFramebuffersEXT() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11511)] Trying to call glDeleteTextures() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11476)] Trying to call glDeleteProgram() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context +[0202/113233:ERROR:gl_bindings_autogen_gl.cc(11500)] Trying to call glDeleteShader() without current GL context -- cgit v1.2.1