From 65a4baa17b439e1bdf42b6c0150a52e032562bb5 Mon Sep 17 00:00:00 2001
From: Nao Pross <naopross@thearcway.org>
Date: Thu, 18 Jan 2018 10:28:49 +0100
Subject: Move to version control

---
 src/dist/default/production/memoryfile.xml     |  17 ++
 src/dist/default/production/src.production.cmf | 303 +++++++++++++++++++
 src/dist/default/production/src.production.elf | Bin 0 -> 8444 bytes
 src/dist/default/production/src.production.hex |   9 +
 src/dist/default/production/src.production.hxl |  30 ++
 src/dist/default/production/src.production.lst | 315 ++++++++++++++++++++
 src/dist/default/production/src.production.map | 384 +++++++++++++++++++++++++
 src/dist/default/production/src.production.mum |   9 +
 src/dist/default/production/src.production.obj | Bin 0 -> 2674 bytes
 src/dist/default/production/src.production.rlf | Bin 0 -> 17184 bytes
 src/dist/default/production/src.production.sdb | 156 ++++++++++
 src/dist/default/production/src.production.sym | 220 ++++++++++++++
 12 files changed, 1443 insertions(+)
 create mode 100644 src/dist/default/production/memoryfile.xml
 create mode 100644 src/dist/default/production/src.production.cmf
 create mode 100644 src/dist/default/production/src.production.elf
 create mode 100644 src/dist/default/production/src.production.hex
 create mode 100644 src/dist/default/production/src.production.hxl
 create mode 100644 src/dist/default/production/src.production.lst
 create mode 100644 src/dist/default/production/src.production.map
 create mode 100644 src/dist/default/production/src.production.mum
 create mode 100644 src/dist/default/production/src.production.obj
 create mode 100644 src/dist/default/production/src.production.rlf
 create mode 100644 src/dist/default/production/src.production.sdb
 create mode 100644 src/dist/default/production/src.production.sym

(limited to 'src/dist/default')

diff --git a/src/dist/default/production/memoryfile.xml b/src/dist/default/production/memoryfile.xml
new file mode 100644
index 0000000..872b3c2
--- /dev/null
+++ b/src/dist/default/production/memoryfile.xml
@@ -0,0 +1,17 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+  <executable name="dist/default/production\src.production.hex">
+    <memory name="program">
+      <units>bytes</units>
+      <length>16384</length>
+      <used>36</used>
+      <free>16348</free>
+    </memory>
+    <memory name="data">
+      <units>bytes</units>
+      <length>768</length>
+      <used>0</used>
+      <free>768</free>
+    </memory>
+  </executable>
+</project>
diff --git a/src/dist/default/production/src.production.cmf b/src/dist/default/production/src.production.cmf
new file mode 100644
index 0000000..797b04a
--- /dev/null
+++ b/src/dist/default/production/src.production.cmf
@@ -0,0 +1,303 @@
+%CMF
+# %PSECTS Section
+# For each object file, details of its psects are enumerated here.
+# The begining of the section is indicated by %PSECTS.  The first
+# line indicates the name of the first object file, e.g.
+#    $foo.obj
+# Each line that follows describes a psect in that object file, until
+# the next object file.  The lines that describe a psect have the
+# format:
+#    <psect name> <class name> <space> <link address> <load addresses> <length> <delta>
+# All addresses and the length are given in unqualified hexadecimal
+# in delta units.  Any other numeric values are decimal.
+%PSECTS
+$C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+idloc IDLOC 0 200000 200000 8 1
+init CODE 0 0 0 4 1
+config CONFIG 0 300000 300000 E 1
+$dist/default/production\src.production.obj
+cinit CODE 0 3FE2 3FE2 6 1
+text0 CODE 0 3FDC 3FDC 6 1
+text1 CODE 0 3FE8 3FE8 18 1
+# %UNUSED Section
+# This section enumerates the unused ranges of each CLASS. Each entry
+# is described on a single line as follows:
+#    <class name> <range> <delta>
+# Addresses given in the range are in hexadecimal and units of delta.
+%UNUSED
+RAM 60-2FF 1
+SFR F38-FFF 1
+BANK0 60-FF 1
+BANK1 100-1FF 1
+BANK2 200-2FF 1
+CONST 4-3FDB 1
+STACK 60-2FF 1
+SMALLCONST 300-3FDB 1
+CODE 4-3FDB 1
+BIGRAM 1-2FF 1
+COMRAM 1-5F 1
+EEDATA F00000-F000FF 1
+MEDIUMCONST 300-3FDB 1
+# %LINETAB Section
+# This section enumerates the file/line to address mappings.
+# The beginning of the section is indicated by %LINETAB.
+# The first line indicates the name of the first object file, e.g.
+#   $foo.obj
+# Each line that follows describes a single mapping until the next
+# object file.  Mappings have the following format:
+#    <address> <psect name> <class name> ><line number>:<file name>
+# The address is absolute and given given in unqualified hex 
+# in delta units of the psect. All mappings within an object file
+# are in ascending order of addresses.
+# All other numeric values are in decimal.
+%LINETAB
+$dist/default/production\src.production.obj
+3FE8 text1 CODE >4:Z:\SAMB_4\projects\xilofono\src\rs232.c
+3FE8 text1 CODE >7:Z:\SAMB_4\projects\xilofono\src\rs232.c
+3FEA text1 CODE >8:Z:\SAMB_4\projects\xilofono\src\rs232.c
+3FEC text1 CODE >11:Z:\SAMB_4\projects\xilofono\src\rs232.c
+3FEE text1 CODE >12:Z:\SAMB_4\projects\xilofono\src\rs232.c
+3FF2 text1 CODE >13:Z:\SAMB_4\projects\xilofono\src\rs232.c
+3FF4 text1 CODE >14:Z:\SAMB_4\projects\xilofono\src\rs232.c
+3FF6 text1 CODE >17:Z:\SAMB_4\projects\xilofono\src\rs232.c
+3FF8 text1 CODE >18:Z:\SAMB_4\projects\xilofono\src\rs232.c
+3FFA text1 CODE >19:Z:\SAMB_4\projects\xilofono\src\rs232.c
+3FFC text1 CODE >20:Z:\SAMB_4\projects\xilofono\src\rs232.c
+3FFE text1 CODE >21:Z:\SAMB_4\projects\xilofono\src\rs232.c
+3FDC text0 CODE >83:Z:\SAMB_4\projects\xilofono\src\main.c
+3FDC text0 CODE >85:Z:\SAMB_4\projects\xilofono\src\main.c
+3FE0 text0 CODE >88:Z:\SAMB_4\projects\xilofono\src\main.c
+3FE2 cinit CODE >1144:C:\Users\_prossn\AppData\Local\Temp\s3s8.
+3FE2 cinit CODE >1146:C:\Users\_prossn\AppData\Local\Temp\s3s8.
+3FE2 cinit CODE >1149:C:\Users\_prossn\AppData\Local\Temp\s3s8.
+3FE2 cinit CODE >1155:C:\Users\_prossn\AppData\Local\Temp\s3s8.
+3FE2 cinit CODE >1157:C:\Users\_prossn\AppData\Local\Temp\s3s8.
+3FE4 cinit CODE >1158:C:\Users\_prossn\AppData\Local\Temp\s3s8.
+# %SYMTAB Section
+# An enumeration of all symbols in the program.
+# The beginning of the section is indicated by %SYMTAB.
+# Each line describes a single symbol as follows:
+#    <label> <value> [-]<load-adj> <class> <space> <psect> <file-name>
+# The value and load-adj are both in unqualified hexadecimal.
+# All other numeric values are in decimal.  The load-adj is the
+# quantity one needs to add to the symbol value in order to obtain the load
+# address of the symbol.  This value may be signed. If the symbol
+# was defined in a psect then <psect> will be "-". File-name
+# is the name of the object file in which the symbol was defined.
+%SYMTAB
+__Lmediumconst 0 0 MEDIUMCONST 0 mediumconst dist/default/production\src.production.obj
+__Hspace_0 30000E 0 ABS 0 - dist/default/production\src.production.obj
+__Hspace_1 0 0 ABS 0 - dist/default/production\src.production.obj
+__Hspace_2 0 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_IESO$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__Hibigdata 0 0 CODE 0 ibigdata dist/default/production\src.production.obj
+__mediumconst 0 0 MEDIUMCONST 0 mediumconst C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+__Heeprom_data 0 0 EEDATA 0 eeprom_data dist/default/production\src.production.obj
+__Lsmallconst 0 0 SMALLCONST 0 smallconst dist/default/production\src.production.obj
+_RCIF 7CF5 0 ABS 0 - dist/default/production\src.production.obj
+_TXIF 7CF4 0 ABS 0 - dist/default/production\src.production.obj
+___sp 0 0 STACK 2 stack C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+_main 3FDC 0 CODE 0 text0 dist/default/production\src.production.obj
+start 0 0 CODE 0 init C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+__size_of_main 0 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_CCP2MX$PORTC1 0 0 ABS 0 - dist/default/production\src.production.obj
+__Hpowerup 0 0 CODE 0 powerup dist/default/production\src.production.obj
+__CFG_CCP3MX$PORTB5 0 0 ABS 0 - dist/default/production\src.production.obj
+__accesstop 60 0 ABS 0 - C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+intlevel0 0 0 CODE 0 text C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+intlevel1 0 0 CODE 0 text C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+intlevel2 0 0 CODE 0 text C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+intlevel3 0 0 CODE 0 text C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+__LnvFARRAM 0 0 FARRAM 0 nvFARRAM dist/default/production\src.production.obj
+__CFG_EBTR0$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_EBTR1$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_EBTRB$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_P2BMX$PORTD2 0 0 ABS 0 - dist/default/production\src.production.obj
+__Hifardata 0 0 CODE 0 ifardata dist/default/production\src.production.obj
+__Hclrtext 0 0 ABS 0 clrtext dist/default/production\src.production.obj
+__CFG_PRICLKEN$ON 0 0 ABS 0 - dist/default/production\src.production.obj
+_eusart_init 3FE8 0 CODE 0 text1 dist/default/production\src.production.obj
+___inthi_sp 0 0 STACK 2 stack C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+___intlo_sp 0 0 STACK 2 stack C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+__Hintcode_body 0 0 ABS 0 intcode_body dist/default/production\src.production.obj
+__Lintsave_regs 0 0 BIGRAM 1 intsave_regs dist/default/production\src.production.obj
+_BAUDCONbits FB8 0 ABS 0 - dist/default/production\src.production.obj
+__Hmediumconst 0 0 MEDIUMCONST 0 mediumconst dist/default/production\src.production.obj
+__Hintcodelo 0 0 CODE 0 intcodelo dist/default/production\src.production.obj
+__Lintcodelo 0 0 CODE 0 intcodelo dist/default/production\src.production.obj
+__CFG_FCMEN$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+start_initialization 3FE2 0 CODE 0 cinit dist/default/production\src.production.obj
+__CFG_PBADEN$ON 0 0 ABS 0 - dist/default/production\src.production.obj
+__HnvFARRAM 0 0 FARRAM 0 nvFARRAM dist/default/production\src.production.obj
+___rparam_used 1 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_WDTPS$32768 0 0 ABS 0 - dist/default/production\src.production.obj
+_TRISC6 7CA6 0 ABS 0 - dist/default/production\src.production.obj
+_TRISC7 7CA7 0 ABS 0 - dist/default/production\src.production.obj
+__Hbank0 0 0 ABS 0 bank0 dist/default/production\src.production.obj
+__Hbank1 0 0 ABS 0 bank1 dist/default/production\src.production.obj
+__Hbank2 0 0 ABS 0 bank2 dist/default/production\src.production.obj
+__Hcinit 0 0 ABS 0 cinit dist/default/production\src.production.obj
+__Hconst 0 0 CONST 0 const dist/default/production\src.production.obj
+__Hidata 0 0 CODE 0 idata dist/default/production\src.production.obj
+__Hidloc 200008 0 IDLOC 0 idloc dist/default/production\src.production.obj
+__Hnvbit 0 0 COMRAM 1 nvbit dist/default/production\src.production.obj
+__Hparam 0 0 COMRAM 1 rparam dist/default/production\src.production.obj
+__Hrdata 0 0 COMRAM 1 rdata dist/default/production\src.production.obj
+__Hstack 0 0 STACK 2 stack dist/default/production\src.production.obj
+__Htext0 0 0 ABS 0 text0 dist/default/production\src.production.obj
+__Htext1 0 0 ABS 0 text1 dist/default/production\src.production.obj
+__Hbigbss 0 0 BIGRAM 1 bigbss dist/default/production\src.production.obj
+__Hbigram 0 0 ABS 0 bigram dist/default/production\src.production.obj
+__smallconst 0 0 SMALLCONST 0 smallconst C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+__Hcomram 0 0 ABS 0 comram dist/default/production\src.production.obj
+__Hconfig 30000E 0 CONFIG 0 config dist/default/production\src.production.obj
+__Lbank0 0 0 ABS 0 bank0 dist/default/production\src.production.obj
+__Lbank1 0 0 ABS 0 bank1 dist/default/production\src.production.obj
+__Lbank2 0 0 ABS 0 bank2 dist/default/production\src.production.obj
+__Lcinit 0 0 ABS 0 cinit dist/default/production\src.production.obj
+__Lconst 0 0 CONST 0 const dist/default/production\src.production.obj
+__Lidata 0 0 CODE 0 idata dist/default/production\src.production.obj
+__Lidloc 200000 0 IDLOC 0 idloc dist/default/production\src.production.obj
+__Lnvbit 0 0 COMRAM 1 nvbit dist/default/production\src.production.obj
+__Lparam 0 0 COMRAM 1 rparam dist/default/production\src.production.obj
+__Lrdata 0 0 COMRAM 1 rdata dist/default/production\src.production.obj
+__Lstack 0 0 STACK 2 stack dist/default/production\src.production.obj
+__Ltext0 0 0 ABS 0 text0 dist/default/production\src.production.obj
+__Ltext1 0 0 ABS 0 text1 dist/default/production\src.production.obj
+__Hfarbss 0 0 FARRAM 0 farbss dist/default/production\src.production.obj
+__Lintcode_body 0 0 ABS 0 intcode_body dist/default/production\src.production.obj
+__CFG_T3CMX$PORTC0 0 0 ABS 0 - dist/default/production\src.production.obj
+__Habs1 0 0 ABS 0 abs1 dist/default/production\src.production.obj
+__Hdata 0 0 ABS 0 data dist/default/production\src.production.obj
+__Hinit 4 0 CODE 0 init dist/default/production\src.production.obj
+__Hrbit 0 0 COMRAM 1 rbit dist/default/production\src.production.obj
+__Hrbss 0 0 COMRAM 1 rbss dist/default/production\src.production.obj
+__Htemp 0 0 COMRAM 1 temp dist/default/production\src.production.obj
+__Htext 0 0 ABS 0 text dist/default/production\src.production.obj
+__Labs1 0 0 ABS 0 abs1 dist/default/production\src.production.obj
+__Ldata 0 0 ABS 0 data dist/default/production\src.production.obj
+__Linit 0 0 CODE 0 init dist/default/production\src.production.obj
+__Lrbit 0 0 COMRAM 1 rbit dist/default/production\src.production.obj
+__Lrbss 0 0 COMRAM 1 rbss dist/default/production\src.production.obj
+__Ltemp 0 0 COMRAM 1 temp dist/default/production\src.production.obj
+__Ltext 0 0 ABS 0 text dist/default/production\src.production.obj
+__CFG_XINST$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__HcstackCOMRAM 0 0 ABS 0 cstackCOMRAM dist/default/production\src.production.obj
+__Hintret 0 0 ABS 0 intret dist/default/production\src.production.obj
+__Hirdata 0 0 CODE 0 irdata dist/default/production\src.production.obj
+__S0 30000E 0 ABS 0 - dist/default/production\src.production.obj
+__S1 0 0 ABS 0 - dist/default/production\src.production.obj
+__S2 0 0 ABS 0 - dist/default/production\src.production.obj
+__Lbigdata 0 0 BIGRAM 1 bigdata dist/default/production\src.production.obj
+__Hnvrram 0 0 COMRAM 1 nvrram dist/default/production\src.production.obj
+__CFG_BORV$190 0 0 ABS 0 - dist/default/production\src.production.obj
+__Lintentry 0 0 ABS 0 intentry dist/default/production\src.production.obj
+__Hramtop 300 0 RAM 0 ramtop dist/default/production\src.production.obj
+__Hrparam 0 0 COMRAM 1 rparam dist/default/production\src.production.obj
+__CFG_PWRTEN$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__activetblptr 0 0 ABS 0 - dist/default/production\src.production.obj
+__Hstruct 0 0 COMRAM 1 struct dist/default/production\src.production.obj
+__end_of_eusart_init 4000 0 CODE 0 text1 dist/default/production\src.production.obj
+_RCSTAbits FAB 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_HFOFST$ON 0 0 ABS 0 - dist/default/production\src.production.obj
+__Lbigbss 0 0 BIGRAM 1 bigbss dist/default/production\src.production.obj
+__Lbigram 0 0 ABS 0 bigram dist/default/production\src.production.obj
+__Lcomram 0 0 ABS 0 comram dist/default/production\src.production.obj
+__Lconfig 300000 0 CONFIG 0 config dist/default/production\src.production.obj
+__CFG_WDTEN$ON 0 0 ABS 0 - dist/default/production\src.production.obj
+__Lfarbss 0 0 FARRAM 0 farbss dist/default/production\src.production.obj
+__Lfardata 0 0 FARRAM 0 fardata dist/default/production\src.production.obj
+stackhi 2FF 0 ABS 0 - C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+stacklo 60 0 ABS 0 - C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+__Lintcode 0 0 CODE 0 intcode dist/default/production\src.production.obj
+__Lintret 0 0 ABS 0 intret dist/default/production\src.production.obj
+__Lirdata 0 0 CODE 0 irdata dist/default/production\src.production.obj
+__Lspace_0 0 0 ABS 0 - dist/default/production\src.production.obj
+__Lspace_1 0 0 ABS 0 - dist/default/production\src.production.obj
+__Lspace_2 0 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_LVP$ON 0 0 ABS 0 - dist/default/production\src.production.obj
+__LcstackCOMRAM 0 0 ABS 0 cstackCOMRAM dist/default/production\src.production.obj
+end_of_initialization 3FE2 0 CODE 0 cinit dist/default/production\src.production.obj
+__Lnvrram 0 0 COMRAM 1 nvrram dist/default/production\src.production.obj
+__Hintentry 0 0 ABS 0 intentry dist/default/production\src.production.obj
+__CFG_STVREN$ON 0 0 ABS 0 - dist/default/production\src.production.obj
+__Hreset_vec 0 0 CODE 0 reset_vec dist/default/production\src.production.obj
+__Lramtop 300 0 RAM 0 ramtop dist/default/production\src.production.obj
+__Lrparam 0 0 COMRAM 1 rparam dist/default/production\src.production.obj
+__pcinit 3FE2 0 CODE 0 cinit dist/default/production\src.production.obj
+__ptext0 3FDC 0 CODE 0 text0 dist/default/production\src.production.obj
+__ptext1 3FE8 0 CODE 0 text1 dist/default/production\src.production.obj
+__Lstruct 0 0 COMRAM 1 struct dist/default/production\src.production.obj
+__ramtop 300 0 RAM 0 ramtop C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+__Lpowerup 0 0 CODE 0 powerup dist/default/production\src.production.obj
+__Leeprom_data 0 0 EEDATA 0 eeprom_data dist/default/production\src.production.obj
+__Lreset_vec 0 0 CODE 0 reset_vec dist/default/production\src.production.obj
+___param_bank 0 0 ABS 0 - dist/default/production\src.production.obj
+__Hbigdata 0 0 BIGRAM 1 bigdata dist/default/production\src.production.obj
+__end_of__initialization 3FE2 0 CODE 0 cinit dist/default/production\src.production.obj
+__CFG_WRT0$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_WRT1$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_WRTB$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__Libigdata 0 0 CODE 0 ibigdata dist/default/production\src.production.obj
+__CFG_WRTC$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_WRTD$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__size_of_eusart_init 0 0 ABS 0 - dist/default/production\src.production.obj
+__Lclrtext 0 0 ABS 0 clrtext dist/default/production\src.production.obj
+__pcstackCOMRAM 0 0 COMRAM 1 cstackCOMRAM dist/default/production\src.production.obj
+__CFG_FOSC$ECHPIO6 0 0 ABS 0 - dist/default/production\src.production.obj
+_TXSTAbits FAC 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_BOREN$SBORDIS 0 0 ABS 0 - dist/default/production\src.production.obj
+__end_of_main 3FE2 0 CODE 0 text0 dist/default/production\src.production.obj
+_RCREG FAE 0 ABS 0 - dist/default/production\src.production.obj
+_SPBRG FAF 0 ABS 0 - dist/default/production\src.production.obj
+_TXREG FAD 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_CP0$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_CP1$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__HRAM 0 0 ABS 0 - dist/default/production\src.production.obj
+__Hbss 0 0 RAM 1 bss dist/default/production\src.production.obj
+__Hram 0 0 ABS 0 ram dist/default/production\src.production.obj
+__Hsfr 0 0 ABS 0 sfr dist/default/production\src.production.obj
+__LRAM 1 0 ABS 0 - dist/default/production\src.production.obj
+__Lbss 0 0 RAM 1 bss dist/default/production\src.production.obj
+__Lram 0 0 ABS 0 ram dist/default/production\src.production.obj
+__Lsfr 0 0 ABS 0 sfr dist/default/production\src.production.obj
+__CFG_PLLCFG$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_CPB$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__CFG_CPD$OFF 0 0 ABS 0 - dist/default/production\src.production.obj
+__initialization 3FE2 0 CODE 0 cinit dist/default/production\src.production.obj
+__Hfardata 0 0 FARRAM 0 fardata dist/default/production\src.production.obj
+__Hsmallconst 0 0 SMALLCONST 0 smallconst dist/default/production\src.production.obj
+__Lifardata 0 0 CODE 0 ifardata dist/default/production\src.production.obj
+__Hintsave_regs 0 0 BIGRAM 1 intsave_regs dist/default/production\src.production.obj
+__CFG_MCLRE$EXTMCLR 0 0 ABS 0 - dist/default/production\src.production.obj
+__Hintcode 0 0 CODE 0 intcode dist/default/production\src.production.obj
+# %SPLITSTAB Section
+# This section enumerates all the psect splits performed by the assembler.
+# The beginning of the section is indicated by %SPLITSTAB.
+# Each line is a record a particular split, where the parent psect is on
+# the left and the child on the right.  Note that a child psect is always
+# split form the top of the parent psect. All splits from a given parent
+# are listed in the order in which they occurred.
+%SPLITSTAB
+# %DABS Section
+# This section contains a table of all usuage of the assember
+# directive DABS in the program. Each line has the following format:
+#   <name> <space> <address> <size>
+# If the DABS was originally labelled then that shall be <name>,
+# otherwise name will be "-".  The <space> number is in decimal.
+# <address> and <size> are in byte units as unqaulified hexadecimal
+%DABS
+# %SEGMENTS Section
+# This sections enumerates the segments of the program.  Each segment
+# is described on a single line as follows:
+#    <name> <space> <link address> <file address> <size> <delta>
+# Addresses and size are in unqualified hexadecimal.  The link address
+# and size are in units of delta. The file address is in units of bytes.
+# All other numeric quantities are in decimal.
+%SEGMENTS
+cinit 0 3FE2 3FE2 6 1
+idloc 0 200000 200000 8 1
+text0 0 3FDC 3FDC 6 1
+text1 0 3FE8 3FE8 18 1
+reset_vec 0 0 0 4 1
+config 0 300000 300000 E 1
diff --git a/src/dist/default/production/src.production.elf b/src/dist/default/production/src.production.elf
new file mode 100644
index 0000000..ad946ca
Binary files /dev/null and b/src/dist/default/production/src.production.elf differ
diff --git a/src/dist/default/production/src.production.hex b/src/dist/default/production/src.production.hex
new file mode 100644
index 0000000..a2c4ce5
--- /dev/null
+++ b/src/dist/default/production/src.production.hex
@@ -0,0 +1,9 @@
+:04000000F1EF1FF00D
+:103FDC00F4EC1FF0FFD70001EEEF1FF0AC98AC9C97
+:103FEC00AB8E810EAF6EAC84B896948E948CAB88ED
+:043FFC00AC8A120079
+:020000040020DA
+:08000000FFFFFFFFFFFFFFFF00
+:020000040030CA
+:0E000000FF251F3FFFBF85FF03C003E0034045
+:00000001FF
diff --git a/src/dist/default/production/src.production.hxl b/src/dist/default/production/src.production.hxl
new file mode 100644
index 0000000..c943d1e
--- /dev/null
+++ b/src/dist/default/production/src.production.hxl
@@ -0,0 +1,30 @@
+### HEXMate logfile and output summary ###
+### Memory Usage ###
+ Unused memory ranges:
+  4h - 3FDBh
+  4000h - 1FFFFFh
+  200008h - 2FFFFFh
+  30000Eh - 30003Fh
+  
+ dist/default/production\src.production.hex ranges:
+  0h - 3h
+  3FDCh - 3FFFh
+  200000h - 200007h
+  300000h - 30000Dh
+  
+### Hex Memory Map ###
+ Legend:
+  - = Unused memory
+  F = Filled ROM
+  S = Stored serial code
+  A = Stored ASCII string
+  R = Reserved for checksum
+  C = Stored checksum result
+  T = Trailing code
+  & = Find & replace opcode
+  X = Find & delete opcode
+  1 = dist/default/production\src.production.hex
+00000000: 1111------------------------------------------------------------
+00003FC0: ----------------------------111111111111111111111111111111111111
+00200000: 11111111--------------------------------------------------------
+00300000: 11111111111111--------------------------------------------------
diff --git a/src/dist/default/production/src.production.lst b/src/dist/default/production/src.production.lst
new file mode 100644
index 0000000..01c9d84
--- /dev/null
+++ b/src/dist/default/production/src.production.lst
@@ -0,0 +1,315 @@
+
+
+Microchip Technology PIC18 LITE Macro Assembler V1.44 build -154322312 
+                                                                                               Mon Jan 08 09:28:26 2018
+
+Microchip Technology Omniscient Code Generator v1.44 (Free mode) build 201709140600
+     1                           	processor	18F44K22
+     2                           	fnconf	rparam,??,?,0
+     3                           	opt	pw 120
+     4                           	opt	lm
+     5                           	psect	cinit,global,reloc=2,class=CODE,delta=1
+     6                           	psect	cstackCOMRAM,global,class=COMRAM,space=1,delta=1,noexec
+     7                           	psect	text0,global,reloc=2,class=CODE,delta=1
+     8                           	psect	text1,global,reloc=2,class=CODE,delta=1
+     9                           	psect	intsave_regs,global,class=BIGRAM,space=1,delta=1,noexec
+    10                           	psect	rparam,global,class=COMRAM,space=1,delta=1,noexec
+    11  0000                     
+    12                           ; Version 1.44
+    13                           ; Generated 14/09/2017 GMT
+    14                           ; 
+    15                           ; Copyright © 2017, Microchip Technology Inc. and its subsidiaries ("Microchip")
+    16                           ; All rights reserved.
+    17                           ; 
+    18                           ; This software is developed by Microchip Technology Inc. and its subsidiaries ("Microch
+      +                          ip").
+    19                           ; 
+    20                           ; Redistribution and use in source and binary forms, with or without modification, are
+    21                           ; permitted provided that the following conditions are met:
+    22                           ; 
+    23                           ;     1. Redistributions of source code must retain the above copyright notice, this lis
+      +                          t of
+    24                           ;        conditions and the following disclaimer.
+    25                           ; 
+    26                           ;     2. Redistributions in binary form must reproduce the above copyright notice, this 
+      +                          list
+    27                           ;        of conditions and the following disclaimer in the documentation and/or other
+    28                           ;        materials provided with the distribution.
+    29                           ; 
+    30                           ;     3. Microchip's name may not be used to endorse or promote products derived from th
+      +                          is
+    31                           ;        software without specific prior written permission.
+    32                           ; 
+    33                           ; THIS SOFTWARE IS PROVIDED BY MICROCHIP "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+    34                           ; INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS F
+      +                          OR
+    35                           ; PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL MICROCHIP BE LIABLE FOR ANY DIRECT, INDIREC
+      +                          T,
+    36                           ; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING BUT NOT LIMITED TO
+    37                           ; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA OR PROFITS; OR BUSINESS
+    38                           ; INTERRUPTION) HOWSOEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, ST
+      +                          RICT
+    39                           ; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE U
+      +                          SE OF
+    40                           ; THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+    41                           ; 
+    42                           ; 
+    43                           ; Code-generator required, PIC18F44K22 Definitions
+    44                           ; 
+    45                           ; SFR Addresses
+    46  0000                     _RCREG	set	4014
+    47  0000                     _TXREG	set	4013
+    48  0000                     _BAUDCONbits	set	4024
+    49  0000                     _SPBRG	set	4015
+    50  0000                     _RCSTAbits	set	4011
+    51  0000                     _TXSTAbits	set	4012
+    52  0000                     _RCIF	set	31989
+    53  0000                     _TXIF	set	31988
+    54  0000                     _TRISC6	set	31910
+    55  0000                     _TRISC7	set	31911
+    56                           
+    57                           ; #config settings
+    58  0000                     
+    59                           	psect	cinit
+    60  003FE2                     __pcinit:
+    61                           	opt stack 0
+    62  003FE2                     start_initialization:
+    63                           	opt stack 0
+    64  003FE2                     __initialization:
+    65                           	opt stack 0
+    66  003FE2                     end_of_initialization:
+    67                           	opt stack 0
+    68  003FE2                     __end_of__initialization:
+    69                           	opt stack 0
+    70  003FE2  0100               	movlb	0
+    71  003FE4  EFEE  F01F         	goto	_main	;jump to C main() function
+    72                           
+    73                           	psect	cstackCOMRAM
+    74  000000                     __pcstackCOMRAM:
+    75                           	opt stack 0
+    76  000000                     
+    77                           ; 1 bytes @ 0x0
+    78 ;;
+    79 ;;Main: autosize = 0, tempsize = 0, incstack = 0, save=0
+    80 ;;
+    81 ;; *************** function _main *****************
+    82 ;; Defined at:
+    83 ;;		line 83 in file "main.c"
+    84 ;; Parameters:    Size  Location     Type
+    85 ;;		None
+    86 ;; Auto vars:     Size  Location     Type
+    87 ;;		None
+    88 ;; Return value:  Size  Location     Type
+    89 ;;                  1    wreg      void 
+    90 ;; Registers used:
+    91 ;;		wreg, status,2, cstack
+    92 ;; Tracked objects:
+    93 ;;		On entry : 0/0
+    94 ;;		On exit  : 0/0
+    95 ;;		Unchanged: 0/0
+    96 ;; Data sizes:     COMRAM   BANK0   BANK1   BANK2
+    97 ;;      Params:         0       0       0       0
+    98 ;;      Locals:         0       0       0       0
+    99 ;;      Temps:          0       0       0       0
+   100 ;;      Totals:         0       0       0       0
+   101 ;;Total ram usage:        0 bytes
+   102 ;; Hardware stack levels required when called:    1
+   103 ;; This function calls:
+   104 ;;		_eusart_init
+   105 ;; This function is called by:
+   106 ;;		Startup code after reset
+   107 ;; This function uses a non-reentrant model
+   108 ;;
+   109                           
+   110                           	psect	text0
+   111  003FDC                     __ptext0:
+   112                           	opt stack 0
+   113  003FDC                     _main:
+   114                           	opt stack 30
+   115                           
+   116                           ;main.c: 85: eusart_init();
+   117                           
+   118                           ;incstack = 0
+   119  003FDC  ECF4  F01F         	call	_eusart_init	;wreg free
+   120  003FE0                     l7:
+   121  003FE0  D7FF               	goto	l7
+   122  003FE2                     __end_of_main:
+   123                           	opt stack 0
+   124                           
+   125 ;; *************** function _eusart_init *****************
+   126 ;; Defined at:
+   127 ;;		line 4 in file "rs232.c"
+   128 ;; Parameters:    Size  Location     Type
+   129 ;;		None
+   130 ;; Auto vars:     Size  Location     Type
+   131 ;;		None
+   132 ;; Return value:  Size  Location     Type
+   133 ;;                  1    wreg      void 
+   134 ;; Registers used:
+   135 ;;		wreg, status,2
+   136 ;; Tracked objects:
+   137 ;;		On entry : 0/0
+   138 ;;		On exit  : 0/0
+   139 ;;		Unchanged: 0/0
+   140 ;; Data sizes:     COMRAM   BANK0   BANK1   BANK2
+   141 ;;      Params:         0       0       0       0
+   142 ;;      Locals:         0       0       0       0
+   143 ;;      Temps:          0       0       0       0
+   144 ;;      Totals:         0       0       0       0
+   145 ;;Total ram usage:        0 bytes
+   146 ;; Hardware stack levels used:    1
+   147 ;; This function calls:
+   148 ;;		Nothing
+   149 ;; This function is called by:
+   150 ;;		_main
+   151 ;; This function uses a non-reentrant model
+   152 ;;
+   153                           
+   154                           	psect	text1
+   155  003FE8                     __ptext1:
+   156                           	opt stack 0
+   157  003FE8                     _eusart_init:
+   158                           	opt stack 30
+   159                           
+   160                           ;rs232.c: 7: TXSTAbits.SYNC = 0;
+   161                           
+   162                           ;incstack = 0
+   163  003FE8  98AC               	bcf	4012,4,c	;volatile
+   164                           
+   165                           ;rs232.c: 8: TXSTAbits.TX9 = 0;
+   166  003FEA  9CAC               	bcf	4012,6,c	;volatile
+   167                           
+   168                           ;rs232.c: 11: RCSTAbits.SPEN = 1;
+   169  003FEC  8EAB               	bsf	4011,7,c	;volatile
+   170                           
+   171                           ;rs232.c: 12: SPBRG = 129;
+   172  003FEE  0E81               	movlw	129
+   173  003FF0  6EAF               	movwf	4015,c	;volatile
+   174                           
+   175                           ;rs232.c: 13: TXSTAbits.BRGH = 1;
+   176  003FF2  84AC               	bsf	4012,2,c	;volatile
+   177                           
+   178                           ;rs232.c: 14: BAUDCONbits.BRG16 = 0;
+   179  003FF4  96B8               	bcf	4024,3,c	;volatile
+   180                           
+   181                           ;rs232.c: 17: TRISC7 = 1;
+   182  003FF6  8E94               	bsf	3988,7,c	;volatile
+   183                           
+   184                           ;rs232.c: 18: TRISC6 = 1;
+   185  003FF8  8C94               	bsf	3988,6,c	;volatile
+   186                           
+   187                           ;rs232.c: 19: RCSTAbits.CREN = 1;
+   188  003FFA  88AB               	bsf	4011,4,c	;volatile
+   189                           
+   190                           ;rs232.c: 20: TXSTAbits.TXEN = 1;
+   191  003FFC  8AAC               	bsf	4012,5,c	;volatile
+   192  003FFE  0012               	return		;funcret
+   193  004000                     __end_of_eusart_init:
+   194                           	opt stack 0
+   195  0000                     
+   196                           	psect	rparam
+
+
+Data Sizes:
+    Strings     0
+    Constant    0
+    Data        0
+    BSS         0
+    Persistent  0
+    Stack       0
+
+Auto Spaces:
+    Space          Size  Autos    Used
+    COMRAM           95      0       0
+    BANK0           160      0       0
+    BANK1           256      0       0
+    BANK2           256      0       0
+
+Pointer List with Targets:
+
+    None.
+
+Critical Paths under _main in COMRAM
+
+    None.
+
+Critical Paths under _main in BANK0
+
+    None.
+
+Critical Paths under _main in BANK1
+
+    None.
+
+Critical Paths under _main in BANK2
+
+    None.
+
+Call Graph Tables:
+
+ ---------------------------------------------------------------------------------
+ (Depth) Function   	        Calls       Base Space   Used Autos Params    Refs
+ ---------------------------------------------------------------------------------
+ (0) _main                                                 0     0      0       0
+                        _eusart_init
+ ---------------------------------------------------------------------------------
+ (1) _eusart_init                                          0     0      0       0
+ ---------------------------------------------------------------------------------
+ Estimated maximum stack depth 1
+ ---------------------------------------------------------------------------------
+
+ Call Graph Graphs:
+
+ _main (ROOT)
+   _eusart_init
+
+ Address spaces:
+Name               Size   Autos  Total    Cost      Usage
+BITCOMRAM           5F      0       0       0        0.0%
+EEDATA             100      0       0       0        0.0%
+NULL                 0      0       0       0        0.0%
+CODE                 0      0       0       0        0.0%
+COMRAM              5F      0       0       1        0.0%
+STACK                0      0       0       2        0.0%
+BITBANK0            A0      0       0       3        0.0%
+BANK0               A0      0       0       4        0.0%
+BANK1              100      0       0       5        0.0%
+BITBANK2           100      0       0       6        0.0%
+BANK2              100      0       0       7        0.0%
+ABS                  0      0       0       8        0.0%
+BITBANK1           100      0       0       9        0.0%
+BIGRAM             2FF      0       0      10        0.0%
+DATA                 0      0       0      11        0.0%
+BITSFR_1             0      0       0     200        0.0%
+SFR_1                0      0       0     200        0.0%
+BITSFR               0      0       0     200        0.0%
+SFR                  0      0       0     200        0.0%
+
+
+Microchip Technology PIC18 Macro Assembler V1.44 build -154322312 
+Symbol Table                                                                                   Mon Jan 08 09:28:26 2018
+
+                      l7 3FE0             __CFG_CP0$OFF 000000             __CFG_CP1$OFF 000000  
+            __CFG_LVP$ON 000000             __CFG_CPB$OFF 000000             __CFG_CPD$OFF 000000  
+                   _RCIF 007CF5                     _TXIF 007CF4                     _main 3FDC  
+          __CFG_BORV$190 000000                     start 0000            __CFG_IESO$OFF 000000  
+           ___param_bank 000000                    ?_main 0000            __CFG_WDTEN$ON 000000  
+                  _RCREG 000FAE                    _SPBRG 000FAF                    _TXREG 000FAD  
+          __CFG_WRT0$OFF 000000            __CFG_WRT1$OFF 000000           __CFG_EBTR0$OFF 000000  
+         __CFG_FCMEN$OFF 000000           __CFG_EBTR1$OFF 000000            __CFG_WRTB$OFF 000000  
+          __CFG_WRTC$OFF 000000            __CFG_WRTD$OFF 000000           __CFG_EBTRB$OFF 000000  
+     __CFG_MCLRE$EXTMCLR 000000             ?_eusart_init 0000           __CFG_HFOFST$ON 000000  
+         __CFG_PBADEN$ON 000000          __initialization 3FE2             __end_of_main 3FE2  
+                 ??_main 0000            __activetblptr 000000                   _TRISC6 007CA6  
+                 _TRISC7 007CA7           __CFG_XINST$OFF 000000           __CFG_STVREN$ON 000000  
+             __accesstop 0060  __end_of__initialization 3FE2            ___rparam_used 000001  
+         __pcstackCOMRAM 0000          __CFG_PLLCFG$OFF 000000     __size_of_eusart_init 0018  
+     __CFG_CCP2MX$PORTC1 000000       __CFG_CCP3MX$PORTB5 000000          __CFG_PWRTEN$OFF 000000  
+                __Hparam 0000                  __Lparam 0000                  __pcinit 3FE2  
+                __ramtop 0300                  __ptext0 3FDC                  __ptext1 3FE8  
+   end_of_initialization 3FE2                _RCSTAbits 000FAB                _TXSTAbits 000FAC  
+            _BAUDCONbits 000FB8      start_initialization 3FE2            ??_eusart_init 0000  
+       __CFG_PRICLKEN$ON 000000      __end_of_eusart_init 4000         __CFG_WDTPS$32768 000000  
+               __Hrparam 0000                 __Lrparam 0000       __CFG_BOREN$SBORDIS 000000  
+      __CFG_P2BMX$PORTD2 000000              _eusart_init 3FE8            __size_of_main 0006  
+      __CFG_T3CMX$PORTC0 000000        __CFG_FOSC$ECHPIO6 000000  
diff --git a/src/dist/default/production/src.production.map b/src/dist/default/production/src.production.map
new file mode 100644
index 0000000..35f3f69
--- /dev/null
+++ b/src/dist/default/production/src.production.map
@@ -0,0 +1,384 @@
+Microchip MPLAB XC8 Compiler V1.44 ()
+
+Linker command line:
+
+-W-3 --edf=C:\Program Files\Microchip\xc8\v1.44\dat\en_msgs.txt -cs \
+  -h+dist/default/production\src.production.sym \
+  --cmf=dist/default/production\src.production.cmf -z -Q18F44K22 \
+  -oC:\Users\_prossn\AppData\Local\Temp\s3s8.2 \
+  -Mdist/default/production/src.production.map -E1 -ver=XC8 \
+  -ASTACK=060h-02ffh -pstack=STACK -ACODE=00h-03FFFh -ACONST=00h-03FFFh \
+  -ASMALLCONST=0300h-03FFhx61 -AMEDIUMCONST=0300h-03FFFh -ACOMRAM=01h-05Fh \
+  -AABS1=00h-02FFh -ABIGRAM=01h-02FFh -ARAM=060h-0FFh,0100h-01FFhx2 \
+  -ABANK0=060h-0FFh -ABANK1=0100h-01FFh -ABANK2=0200h-02FFh \
+  -ASFR=0F38h-0F5Fh,0F60h-0FFFh \
+  -preset_vec=00h,intcode,intcodelo,powerup,init -pramtop=0300h \
+  -psmallconst=SMALLCONST -pmediumconst=MEDIUMCONST -pconst=CONST \
+  -AFARRAM=00h-00h -ACONFIG=0300000h-030000Dh -pconfig=CONFIG \
+  -AIDLOC=0200000h-0200007h -pidloc=IDLOC -AEEDATA=0F00000h-0F000FFh \
+  -peeprom_data=EEDATA \
+  -prdata=COMRAM,nvrram=COMRAM,nvbit=COMRAM,rbss=COMRAM,rbit=COMRAM \
+  -pfarbss=FARRAM,fardata=FARRAM,nvFARRAM=FARRAM \
+  -pintsave_regs=BIGRAM,bigbss=BIGRAM,bigdata=BIGRAM -pbss=RAM \
+  -pidata=CODE,irdata=CODE,ibigdata=CODE,ifardata=CODE -prparam=COMRAM \
+  C:\Users\_prossn\AppData\Local\Temp\s3s8.obj \
+  dist/default/production\src.production.obj 
+
+Object code version is 3.11
+
+Machine type is 18F44K22
+
+Call graph: (short form)
+
+
+
+
+                Name                               Link     Load   Length Selector   Space Scale
+C:\Users\_prossn\AppData\Local\Temp\s3s8.obj
+                init                                  0        0        4        0       0
+                idloc                            200000   200000        8   200000       0
+                config                           300000   300000        E   300000       0
+dist/default/production\src.production.obj
+                text1                              3FE8     3FE8       18     1FF4       0
+                text0                              3FDC     3FDC        6     1FEE       0
+                cinit                              3FE2     3FE2        6     1FF1       0
+
+TOTAL           Name                               Link     Load   Length     Space
+        CLASS   STACK          
+
+        CLASS   CODE           
+                init                                  0        0        4         0
+                text1                              3FE8     3FE8       18         0
+                text0                              3FDC     3FDC        6         0
+                cinit                              3FE2     3FE2        6         0
+
+        CLASS   CONST          
+
+        CLASS   SMALLCONST     
+
+        CLASS   MEDIUMCONST    
+
+        CLASS   COMRAM         
+
+        CLASS   ABS1           
+
+        CLASS   BIGRAM         
+
+        CLASS   RAM            
+
+        CLASS   BANK0          
+
+        CLASS   BANK1          
+
+        CLASS   BANK2          
+
+        CLASS   SFR            
+
+        CLASS   FARRAM         
+
+        CLASS   CONFIG         
+                config                           300000   300000        E         0
+
+        CLASS   IDLOC          
+                idloc                            200000   200000        8         0
+
+        CLASS   EEDATA         
+
+
+
+SEGMENTS        Name                           Load    Length   Top    Selector   Space  Class
+
+                reset_vec                      000000  000004  000004         0       0  CODE    
+                text0                          003FDC  000006  003FE2      1FEE       0  CODE    
+                cinit                          003FE2  000006  003FE8      1FF1       0  CODE    
+                text1                          003FE8  000018  004000      1FF4       0  CODE    
+                idloc                          200000  000008  200008    200000       0  IDLOC   
+                config                         300000  00000E  30000E    300000       0  CONFIG  
+
+
+UNUSED ADDRESS RANGES
+
+        Name                Unused          Largest block    Delta
+        BANK0            000060-0000FF               A0
+        BANK1            000100-0001FF              100
+        BANK2            000200-0002FF              100
+        BIGRAM           000001-0002FF              2FF
+        CODE             000004-003FDB             3FD8
+        COMRAM           000001-00005F               5F
+        CONST            000004-003FDB             3FD8
+        EEDATA           F00000-F000FF              100
+        MEDIUMCONST      000300-003FDB             3CDC
+        RAM              000060-0002FF              100
+        SFR              000F38-000FFF               28
+        SMALLCONST       000300-003FDB              100
+        STACK            000060-0002FF              2A0
+
+                                  Symbol Table
+
+_BAUDCONbits             (abs)        000FB8
+_RCIF                    (abs)        007CF5
+_RCREG                   (abs)        000FAE
+_RCSTAbits               (abs)        000FAB
+_SPBRG                   (abs)        000FAF
+_TRISC6                  (abs)        007CA6
+_TRISC7                  (abs)        007CA7
+_TXIF                    (abs)        007CF4
+_TXREG                   (abs)        000FAD
+_TXSTAbits               (abs)        000FAC
+__CFG_BOREN$SBORDIS      (abs)        000000
+__CFG_BORV$190           (abs)        000000
+__CFG_CCP2MX$PORTC1      (abs)        000000
+__CFG_CCP3MX$PORTB5      (abs)        000000
+__CFG_CP0$OFF            (abs)        000000
+__CFG_CP1$OFF            (abs)        000000
+__CFG_CPB$OFF            (abs)        000000
+__CFG_CPD$OFF            (abs)        000000
+__CFG_EBTR0$OFF          (abs)        000000
+__CFG_EBTR1$OFF          (abs)        000000
+__CFG_EBTRB$OFF          (abs)        000000
+__CFG_FCMEN$OFF          (abs)        000000
+__CFG_FOSC$ECHPIO6       (abs)        000000
+__CFG_HFOFST$ON          (abs)        000000
+__CFG_IESO$OFF           (abs)        000000
+__CFG_LVP$ON             (abs)        000000
+__CFG_MCLRE$EXTMCLR      (abs)        000000
+__CFG_P2BMX$PORTD2       (abs)        000000
+__CFG_PBADEN$ON          (abs)        000000
+__CFG_PLLCFG$OFF         (abs)        000000
+__CFG_PRICLKEN$ON        (abs)        000000
+__CFG_PWRTEN$OFF         (abs)        000000
+__CFG_STVREN$ON          (abs)        000000
+__CFG_T3CMX$PORTC0       (abs)        000000
+__CFG_WDTEN$ON           (abs)        000000
+__CFG_WDTPS$32768        (abs)        000000
+__CFG_WRT0$OFF           (abs)        000000
+__CFG_WRT1$OFF           (abs)        000000
+__CFG_WRTB$OFF           (abs)        000000
+__CFG_WRTC$OFF           (abs)        000000
+__CFG_WRTD$OFF           (abs)        000000
+__CFG_XINST$OFF          (abs)        000000
+__HRAM                   (abs)        000000
+__Habs1                  abs1         000000
+__Hbank0                 bank0        000000
+__Hbank1                 bank1        000000
+__Hbank2                 bank2        000000
+__Hbigbss                bigbss       000000
+__Hbigdata               bigdata      000000
+__Hbigram                bigram       000000
+__Hbss                   bss          000000
+__Hcinit                 cinit        000000
+__Hclrtext               clrtext      000000
+__Hcomram                comram       000000
+__Hconfig                config       30000E
+__Hconst                 const        000000
+__HcstackCOMRAM          cstackCOMRAM 000000
+__Hdata                  data         000000
+__Heeprom_data           eeprom_data  000000
+__Hfarbss                farbss       000000
+__Hfardata               fardata      000000
+__Hibigdata              ibigdata     000000
+__Hidata                 idata        000000
+__Hidloc                 idloc        200008
+__Hifardata              ifardata     000000
+__Hinit                  init         000004
+__Hintcode               intcode      000000
+__Hintcode_body          intcode_body 000000
+__Hintcodelo             intcodelo    000000
+__Hintentry              intentry     000000
+__Hintret                intret       000000
+__Hintsave_regs          intsave_regs 000000
+__Hirdata                irdata       000000
+__Hmediumconst           mediumconst  000000
+__HnvFARRAM              nvFARRAM     000000
+__Hnvbit                 nvbit        000000
+__Hnvrram                nvrram       000000
+__Hparam                 rparam       000000
+__Hpowerup               powerup      000000
+__Hram                   ram          000000
+__Hramtop                ramtop       000300
+__Hrbit                  rbit         000000
+__Hrbss                  rbss         000000
+__Hrdata                 rdata        000000
+__Hreset_vec             reset_vec    000000
+__Hrparam                rparam       000000
+__Hsfr                   sfr          000000
+__Hsmallconst            smallconst   000000
+__Hspace_0               (abs)        30000E
+__Hspace_1               (abs)        000000
+__Hspace_2               (abs)        000000
+__Hstack                 stack        000000
+__Hstruct                struct       000000
+__Htemp                  temp         000000
+__Htext                  text         000000
+__Htext0                 text0        000000
+__Htext1                 text1        000000
+__LRAM                   (abs)        000001
+__Labs1                  abs1         000000
+__Lbank0                 bank0        000000
+__Lbank1                 bank1        000000
+__Lbank2                 bank2        000000
+__Lbigbss                bigbss       000000
+__Lbigdata               bigdata      000000
+__Lbigram                bigram       000000
+__Lbss                   bss          000000
+__Lcinit                 cinit        000000
+__Lclrtext               clrtext      000000
+__Lcomram                comram       000000
+__Lconfig                config       300000
+__Lconst                 const        000000
+__LcstackCOMRAM          cstackCOMRAM 000000
+__Ldata                  data         000000
+__Leeprom_data           eeprom_data  000000
+__Lfarbss                farbss       000000
+__Lfardata               fardata      000000
+__Libigdata              ibigdata     000000
+__Lidata                 idata        000000
+__Lidloc                 idloc        200000
+__Lifardata              ifardata     000000
+__Linit                  init         000000
+__Lintcode               intcode      000000
+__Lintcode_body          intcode_body 000000
+__Lintcodelo             intcodelo    000000
+__Lintentry              intentry     000000
+__Lintret                intret       000000
+__Lintsave_regs          intsave_regs 000000
+__Lirdata                irdata       000000
+__Lmediumconst           mediumconst  000000
+__LnvFARRAM              nvFARRAM     000000
+__Lnvbit                 nvbit        000000
+__Lnvrram                nvrram       000000
+__Lparam                 rparam       000000
+__Lpowerup               powerup      000000
+__Lram                   ram          000000
+__Lramtop                ramtop       000300
+__Lrbit                  rbit         000000
+__Lrbss                  rbss         000000
+__Lrdata                 rdata        000000
+__Lreset_vec             reset_vec    000000
+__Lrparam                rparam       000000
+__Lsfr                   sfr          000000
+__Lsmallconst            smallconst   000000
+__Lspace_0               (abs)        000000
+__Lspace_1               (abs)        000000
+__Lspace_2               (abs)        000000
+__Lstack                 stack        000000
+__Lstruct                struct       000000
+__Ltemp                  temp         000000
+__Ltext                  text         000000
+__Ltext0                 text0        000000
+__Ltext1                 text1        000000
+__S0                     (abs)        30000E
+__S1                     (abs)        000000
+__S2                     (abs)        000000
+___inthi_sp              stack        000000
+___intlo_sp              stack        000000
+___param_bank            (abs)        000000
+___rparam_used           (abs)        000001
+___sp                    stack        000000
+__accesstop              (abs)        000060
+__activetblptr           (abs)        000000
+__end_of__initialization cinit        003FE2
+__end_of_eusart_init     text1        004000
+__end_of_main            text0        003FE2
+__initialization         cinit        003FE2
+__mediumconst            mediumconst  000000
+__pcinit                 cinit        003FE2
+__pcstackCOMRAM          cstackCOMRAM 000000
+__ptext0                 text0        003FDC
+__ptext1                 text1        003FE8
+__ramtop                 ramtop       000300
+__size_of_eusart_init    (abs)        000000
+__size_of_main           (abs)        000000
+__smallconst             smallconst   000000
+_eusart_init             text1        003FE8
+_main                    text0        003FDC
+end_of_initialization    cinit        003FE2
+intlevel0                text         000000
+intlevel1                text         000000
+intlevel2                text         000000
+intlevel3                text         000000
+stackhi                  (abs)        0002FF
+stacklo                  (abs)        000060
+start                    init         000000
+start_initialization     cinit        003FE2
+
+
+FUNCTION INFORMATION:
+
+ *************** function _main *****************
+ Defined at:
+		line 83 in file "main.c"
+ Parameters:    Size  Location     Type
+		None
+ Auto vars:     Size  Location     Type
+		None
+ Return value:  Size  Location     Type
+                  1    wreg      void 
+ Registers used:
+		wreg, status,2, cstack
+ Tracked objects:
+		On entry : 
+		On exit  : 
+		Unchanged: 
+ Data sizes:     COMRAM   BANK0   BANK1   BANK2
+      Params:         0       0       0       0
+      Locals:         0       0       0       0
+      Temps:          0       0       0       0
+      Totals:         0       0       0       0
+Total ram usage:        0 bytes
+ Hardware stack levels required when called:    1
+ This function calls:
+		_eusart_init
+ This function is called by:
+		Startup code after reset
+ This function uses a non-reentrant model
+
+
+ *************** function _eusart_init *****************
+ Defined at:
+		line 4 in file "rs232.c"
+ Parameters:    Size  Location     Type
+		None
+ Auto vars:     Size  Location     Type
+		None
+ Return value:  Size  Location     Type
+                  1    wreg      void 
+ Registers used:
+		wreg, status,2
+ Tracked objects:
+		On entry : 
+		On exit  : 
+		Unchanged: 
+ Data sizes:     COMRAM   BANK0   BANK1   BANK2
+      Params:         0       0       0       0
+      Locals:         0       0       0       0
+      Temps:          0       0       0       0
+      Totals:         0       0       0       0
+Total ram usage:        0 bytes
+ Hardware stack levels used:    1
+ This function calls:
+		Nothing
+ This function is called by:
+		_main
+ This function uses a non-reentrant model
+
+
+
+MODULE INFORMATION
+
+Module		Function		Class		Link	Load	Size
+rs232.c
+		_eusart_init   		CODE           	3FE8	0000	25
+
+rs232.c estimated size: 25
+
+shared
+		__initialization		CODE           	3FE2	0000	1
+
+shared estimated size: 1
+
+main.c
+		_main          		CODE           	3FDC	0000	7
+
+main.c estimated size: 7
+
diff --git a/src/dist/default/production/src.production.mum b/src/dist/default/production/src.production.mum
new file mode 100644
index 0000000..8d87215
--- /dev/null
+++ b/src/dist/default/production/src.production.mum
@@ -0,0 +1,9 @@
+
+Memory Summary:
+    Program space        used    24h (    36) of  3D00h bytes   (  0.2%)
+    Data space           used     0h (     0) of   2FFh bytes   (  0.0%)
+    Configuration bits   used     7h (     7) of     7h words   (100.0%)
+    EEPROM space         used     0h (     0) of   100h bytes   (  0.0%)
+    ID Location space    used     8h (     8) of     8h bytes   (100.0%)
+    Data stack space     used     0h (     0) of   2A0h bytes   (  0.0%)
+
diff --git a/src/dist/default/production/src.production.obj b/src/dist/default/production/src.production.obj
new file mode 100644
index 0000000..21635b1
Binary files /dev/null and b/src/dist/default/production/src.production.obj differ
diff --git a/src/dist/default/production/src.production.rlf b/src/dist/default/production/src.production.rlf
new file mode 100644
index 0000000..da1b908
Binary files /dev/null and b/src/dist/default/production/src.production.rlf differ
diff --git a/src/dist/default/production/src.production.sdb b/src/dist/default/production/src.production.sdb
new file mode 100644
index 0000000..42af7a3
--- /dev/null
+++ b/src/dist/default/production/src.production.sdb
@@ -0,0 +1,156 @@
+[p LITE_MODE AUTOSTATIC LFSROK EMI_WORD ]
+[d version 1.1 ]
+[d edition pro ]
+[d chip 18F44K22 ]
+[d frameptr 4065 ]
+"62 C:\Program Files\Microchip\xc8\v1.44\sources\common\float.c
+[v ___ftpack __ftpack `(f  1 e 3 0 ]
+"86 C:\Program Files\Microchip\xc8\v1.44\sources\common\ftadd.c
+[v ___ftadd __ftadd `(f  1 e 3 0 ]
+"54 C:\Program Files\Microchip\xc8\v1.44\sources\common\ftdiv.c
+[v ___ftdiv __ftdiv `(f  1 e 3 0 ]
+"62 C:\Program Files\Microchip\xc8\v1.44\sources\common\ftmul.c
+[v ___ftmul __ftmul `(f  1 e 3 0 ]
+"20 C:\Program Files\Microchip\xc8\v1.44\sources\common\ftsub.c
+[v ___ftsub __ftsub `(f  1 e 3 0 ]
+"10 C:\Program Files\Microchip\xc8\v1.44\sources\common\sprcadd.c
+[v ___fladd __fladd `(d  1 e 3 0 ]
+"245
+[v ___flsub __flsub `(d  1 e 3 0 ]
+"11 C:\Program Files\Microchip\xc8\v1.44\sources\common\sprcdiv.c
+[v ___fldiv __fldiv `(d  1 e 3 0 ]
+"8 C:\Program Files\Microchip\xc8\v1.44\sources\common\sprcmul.c
+[v ___flmul __flmul `(d  1 e 3 0 ]
+"15 C:\Program Files\Microchip\xc8\v1.44\sources\common\Umul32.c
+[v ___lmul __lmul `(ul  1 e 4 0 ]
+"83 Z:\SAMB_4\projects\xilofono\src\main.c
+[v _main main `(v  1 e 1 0 ]
+"4 Z:\SAMB_4\projects\xilofono\src\rs232.c
+[v _eusart_init eusart_init `(v  1 e 1 0 ]
+"23
+[v _putch putch `(v  1 e 1 0 ]
+"29
+[v _getch getch `(uc  1 e 1 0 ]
+[s S79 . 1 `uc 1 RX9D 1 0 :1:0 
+`uc 1 OERR 1 0 :1:1 
+`uc 1 FERR 1 0 :1:2 
+`uc 1 ADDEN 1 0 :1:3 
+`uc 1 CREN 1 0 :1:4 
+`uc 1 SREN 1 0 :1:5 
+`uc 1 RX9 1 0 :1:6 
+`uc 1 SPEN 1 0 :1:7 
+]
+"10543 C:\Program Files\Microchip\xc8\v1.44\include\pic18f44k22.h
+[s S88 . 1 `uc 1 . 1 0 :3:0 
+`uc 1 ADEN 1 0 :1:3 
+]
+[s S91 . 1 `uc 1 RX9D1 1 0 :1:0 
+`uc 1 OERR1 1 0 :1:1 
+`uc 1 FERR1 1 0 :1:2 
+`uc 1 ADDEN1 1 0 :1:3 
+`uc 1 CREN1 1 0 :1:4 
+`uc 1 SREN1 1 0 :1:5 
+`uc 1 RX91 1 0 :1:6 
+`uc 1 SPEN1 1 0 :1:7 
+]
+[s S100 . 1 `uc 1 RCD8 1 0 :1:0 
+`uc 1 . 1 0 :5:1 
+`uc 1 RC8_9 1 0 :1:6 
+]
+[s S104 . 1 `uc 1 . 1 0 :6:0 
+`uc 1 RC9 1 0 :1:6 
+]
+[s S107 . 1 `uc 1 . 1 0 :5:0 
+`uc 1 SRENA 1 0 :1:5 
+]
+[u S110 . 1 `S79 1 . 1 0 `S88 1 . 1 0 `S91 1 . 1 0 `S100 1 . 1 0 `S104 1 . 1 0 `S107 1 . 1 0 ]
+[v _RCSTAbits RCSTAbits `VES110  1 e 1 @4011 ]
+[s S30 . 1 `uc 1 TX9D 1 0 :1:0 
+`uc 1 TRMT 1 0 :1:1 
+`uc 1 BRGH 1 0 :1:2 
+`uc 1 SENDB 1 0 :1:3 
+`uc 1 SYNC 1 0 :1:4 
+`uc 1 TXEN 1 0 :1:5 
+`uc 1 TX9 1 0 :1:6 
+`uc 1 CSRC 1 0 :1:7 
+]
+"10960
+[s S39 . 1 `uc 1 TX9D1 1 0 :1:0 
+`uc 1 TRMT1 1 0 :1:1 
+`uc 1 BRGH1 1 0 :1:2 
+`uc 1 SENDB1 1 0 :1:3 
+`uc 1 SYNC1 1 0 :1:4 
+`uc 1 TXEN1 1 0 :1:5 
+`uc 1 TX91 1 0 :1:6 
+`uc 1 CSRC1 1 0 :1:7 
+]
+[s S48 . 1 `uc 1 TXD8 1 0 :1:0 
+`uc 1 . 1 0 :5:1 
+`uc 1 TX8_9 1 0 :1:6 
+]
+[u S52 . 1 `S30 1 . 1 0 `S39 1 . 1 0 `S48 1 . 1 0 ]
+[v _TXSTAbits TXSTAbits `VES52  1 e 1 @4012 ]
+"11179
+[v _TXREG TXREG `VEuc  1 e 1 @4013 ]
+"11257
+[v _RCREG RCREG `VEuc  1 e 1 @4014 ]
+"11335
+[v _SPBRG SPBRG `VEuc  1 e 1 @4015 ]
+[s S150 . 1 `uc 1 ABDEN 1 0 :1:0 
+`uc 1 WUE 1 0 :1:1 
+`uc 1 . 1 0 :1:2 
+`uc 1 BRG16 1 0 :1:3 
+`uc 1 CKTXP 1 0 :1:4 
+`uc 1 DTRXP 1 0 :1:5 
+`uc 1 RCIDL 1 0 :1:6 
+`uc 1 ABDOVF 1 0 :1:7 
+]
+"12600
+[s S159 . 1 `uc 1 . 1 0 :4:0 
+`uc 1 SCKP 1 0 :1:4 
+]
+[s S162 . 1 `uc 1 ABDEN1 1 0 :1:0 
+`uc 1 WUE1 1 0 :1:1 
+`uc 1 . 1 0 :1:2 
+`uc 1 BRG161 1 0 :1:3 
+`uc 1 SCKP1 1 0 :1:4 
+`uc 1 DTRXP1 1 0 :1:5 
+`uc 1 RCIDL1 1 0 :1:6 
+`uc 1 ABDOVF1 1 0 :1:7 
+]
+[s S171 . 1 `uc 1 . 1 0 :4:0 
+`uc 1 TXCKP 1 0 :1:4 
+`uc 1 RXDTP 1 0 :1:5 
+`uc 1 RCMT 1 0 :1:6 
+]
+[s S176 . 1 `uc 1 . 1 0 :4:0 
+`uc 1 TXCKP1 1 0 :1:4 
+`uc 1 RXDTP1 1 0 :1:5 
+`uc 1 RCMT1 1 0 :1:6 
+]
+[s S181 . 1 `uc 1 . 1 0 :5:0 
+`uc 1 RXCKP 1 0 :1:5 
+]
+[s S184 . 1 `uc 1 . 1 0 :1:0 
+`uc 1 W4E 1 0 :1:1 
+]
+[u S187 . 1 `S150 1 . 1 0 `S159 1 . 1 0 `S162 1 . 1 0 `S171 1 . 1 0 `S176 1 . 1 0 `S181 1 . 1 0 `S184 1 . 1 0 ]
+[v _BAUDCONbits BAUDCONbits `VES187  1 e 1 @4024 ]
+"18768
+[v _RCIF RCIF `VEb  1 e 0 @31989 ]
+"19440
+[v _TRISC6 TRISC6 `VEb  1 e 0 @31910 ]
+"19442
+[v _TRISC7 TRISC7 `VEb  1 e 0 @31911 ]
+"19540
+[v _TXIF TXIF `VEb  1 e 0 @31988 ]
+"83 Z:\SAMB_4\projects\xilofono\src\main.c
+[v _main main `(v  1 e 1 0 ]
+{
+"90
+} 0
+"4 Z:\SAMB_4\projects\xilofono\src\rs232.c
+[v _eusart_init eusart_init `(v  1 e 1 0 ]
+{
+"21
+} 0
diff --git a/src/dist/default/production/src.production.sym b/src/dist/default/production/src.production.sym
new file mode 100644
index 0000000..ebb58d4
--- /dev/null
+++ b/src/dist/default/production/src.production.sym
@@ -0,0 +1,220 @@
+__CFG_XINST$OFF 0 0 ABS 0
+__size_of_eusart_init 0 0 ABS 0
+__S0 30000E 0 ABS 0
+__S1 0 0 ABS 0
+__S2 0 0 ABS 0
+__Hintentry 0 0 ABS 0
+__Lintentry 0 0 ABS 0
+__CFG_PLLCFG$OFF 0 0 ABS 0
+__CFG_WDTEN$ON 0 0 ABS 0
+_RCIF 7CF5 0 ABS 0
+_TXIF 7CF4 0 ABS 0
+_main 3FDC 0 CODE 0
+___sp 0 0 STACK 2
+start 0 0 CODE 0
+_RCREG FAE 0 ABS 0
+_TXREG FAD 0 ABS 0
+_SPBRG FAF 0 ABS 0
+__Hirdata 0 0 CODE 0
+__Lirdata 0 0 CODE 0
+__HRAM 0 0 ABS 0
+__LRAM 1 0 ABS 0
+__CFG_WDTPS$32768 0 0 ABS 0
+__Hconfig 30000E 0 CONFIG 0
+__Lconfig 300000 0 CONFIG 0
+__Hbigram 0 0 ABS 0
+__Lbigram 0 0 ABS 0
+__Hrparam 0 0 COMRAM 1
+__Lrparam 0 0 COMRAM 1
+__Hram 0 0 ABS 0
+__Lram 0 0 ABS 0
+__Hcomram 0 0 ABS 0
+__Lcomram 0 0 ABS 0
+__Hsfr 0 0 ABS 0
+__Lsfr 0 0 ABS 0
+__Hbss 0 0 RAM 1
+__CFG_STVREN$ON 0 0 ABS 0
+__Lbss 0 0 RAM 1
+___param_bank 0 0 ABS 0
+__Hnvrram 0 0 COMRAM 1
+__Lnvrram 0 0 COMRAM 1
+_TRISC6 7CA6 0 ABS 0
+_TRISC7 7CA7 0 ABS 0
+__Heeprom_data 0 0 EEDATA 0
+__Leeprom_data 0 0 EEDATA 0
+__Hintsave_regs 0 0 BIGRAM 1
+__Lintsave_regs 0 0 BIGRAM 1
+__Hbigbss 0 0 BIGRAM 1
+__Lbigbss 0 0 BIGRAM 1
+__Hintret 0 0 ABS 0
+__Lintret 0 0 ABS 0
+__Hramtop 300 0 RAM 0
+__Lramtop 300 0 RAM 0
+__Hstruct 0 0 COMRAM 1
+__Lstruct 0 0 COMRAM 1
+__Hbigdata 0 0 BIGRAM 1
+__Lbigdata 0 0 BIGRAM 1
+__Hmediumconst 0 0 MEDIUMCONST 0
+__Lmediumconst 0 0 MEDIUMCONST 0
+__Hfarbss 0 0 FARRAM 0
+__Lfarbss 0 0 FARRAM 0
+__Hintcode 0 0 CODE 0
+__Lintcode 0 0 CODE 0
+__Hfardata 0 0 FARRAM 0
+__Lfardata 0 0 FARRAM 0
+__Habs1 0 0 ABS 0
+__Labs1 0 0 ABS 0
+__CFG_EBTR0$OFF 0 0 ABS 0
+__CFG_FOSC$ECHPIO6 0 0 ABS 0
+__HnvFARRAM 0 0 FARRAM 0
+__LnvFARRAM 0 0 FARRAM 0
+__CFG_EBTR1$OFF 0 0 ABS 0
+__CFG_CCP2MX$PORTC1 0 0 ABS 0
+__CFG_CCP3MX$PORTB5 0 0 ABS 0
+__Hdata 0 0 ABS 0
+__Ldata 0 0 ABS 0
+stackhi 2FF 0 ABS 0
+__Htemp 0 0 COMRAM 1
+__Ltemp 0 0 COMRAM 1
+stacklo 60 0 ABS 0
+__Hrbit 0 0 COMRAM 1
+__Lrbit 0 0 COMRAM 1
+__Hinit 4 0 CODE 0
+__Linit 0 0 CODE 0
+__Hintcodelo 0 0 CODE 0
+__Lintcodelo 0 0 CODE 0
+__Hrbss 0 0 COMRAM 1
+__end_of_main 3FE2 0 CODE 0
+__Lrbss 0 0 COMRAM 1
+__Htext 0 0 ABS 0
+__Ltext 0 0 ABS 0
+__CFG_LVP$ON 0 0 ABS 0
+end_of_initialization 3FE2 0 CODE 0
+_RCSTAbits FAB 0 ABS 0
+_TXSTAbits FAC 0 ABS 0
+__Hibigdata 0 0 CODE 0
+__Libigdata 0 0 CODE 0
+__Hifardata 0 0 CODE 0
+__Lifardata 0 0 CODE 0
+__Hbank0 0 0 ABS 0
+__Lbank0 0 0 ABS 0
+__Hbank1 0 0 ABS 0
+__Lbank1 0 0 ABS 0
+__Hbank2 0 0 ABS 0
+__Lbank2 0 0 ABS 0
+__Hpowerup 0 0 CODE 0
+__Lpowerup 0 0 CODE 0
+__Htext0 0 0 ABS 0
+__Ltext0 0 0 ABS 0
+__Htext1 0 0 ABS 0
+__Ltext1 0 0 ABS 0
+__ptext0 3FDC 0 CODE 0
+__ptext1 3FE8 0 CODE 0
+__CFG_P2BMX$PORTD2 0 0 ABS 0
+__CFG_T3CMX$PORTC0 0 0 ABS 0
+__Hclrtext 0 0 ABS 0
+__Lclrtext 0 0 ABS 0
+__CFG_HFOFST$ON 0 0 ABS 0
+__end_of__initialization 3FE2 0 CODE 0
+__CFG_PRICLKEN$ON 0 0 ABS 0
+_BAUDCONbits FB8 0 ABS 0
+___rparam_used 1 0 ABS 0
+__Hidata 0 0 CODE 0
+__Lidata 0 0 CODE 0
+__Hrdata 0 0 COMRAM 1
+__Lrdata 0 0 COMRAM 1
+_eusart_init 3FE8 0 CODE 0
+__Hidloc 200008 0 IDLOC 0
+__Lidloc 200000 0 IDLOC 0
+__CFG_PWRTEN$OFF 0 0 ABS 0
+__Hstack 0 0 STACK 2
+__Lstack 0 0 STACK 2
+__Hparam 0 0 COMRAM 1
+__Lparam 0 0 COMRAM 1
+__Hspace_0 30000E 0 ABS 0
+__HcstackCOMRAM 0 0 ABS 0
+__Lspace_0 0 0 ABS 0
+__LcstackCOMRAM 0 0 ABS 0
+__pcstackCOMRAM 0 0 COMRAM 1
+__Hspace_1 0 0 ABS 0
+__Lspace_1 0 0 ABS 0
+__Hsmallconst 0 0 SMALLCONST 0
+__Lsmallconst 0 0 SMALLCONST 0
+__Hspace_2 0 0 ABS 0
+__Lspace_2 0 0 ABS 0
+__Hnvbit 0 0 COMRAM 1
+__Lnvbit 0 0 COMRAM 1
+__Hcinit 0 0 ABS 0
+__Lcinit 0 0 ABS 0
+__pcinit 3FE2 0 CODE 0
+__CFG_EBTRB$OFF 0 0 ABS 0
+__ramtop 300 0 RAM 0
+__mediumconst 0 0 MEDIUMCONST 0
+__size_of_main 0 0 ABS 0
+__Hconst 0 0 CONST 0
+__Lconst 0 0 CONST 0
+__CFG_WRT0$OFF 0 0 ABS 0
+__CFG_WRT1$OFF 0 0 ABS 0
+__CFG_MCLRE$EXTMCLR 0 0 ABS 0
+__CFG_FCMEN$OFF 0 0 ABS 0
+___inthi_sp 0 0 STACK 2
+___intlo_sp 0 0 STACK 2
+__CFG_CP0$OFF 0 0 ABS 0
+__smallconst 0 0 SMALLCONST 0
+__CFG_CP1$OFF 0 0 ABS 0
+__Hreset_vec 0 0 CODE 0
+__Lreset_vec 0 0 CODE 0
+__CFG_BORV$190 0 0 ABS 0
+__accesstop 60 0 ABS 0
+__Hintcode_body 0 0 ABS 0
+__Lintcode_body 0 0 ABS 0
+__CFG_PBADEN$ON 0 0 ABS 0
+intlevel0 0 0 CODE 0
+intlevel1 0 0 CODE 0
+__CFG_WRTB$OFF 0 0 ABS 0
+intlevel2 0 0 CODE 0
+intlevel3 0 0 CODE 0
+__CFG_WRTC$OFF 0 0 ABS 0
+__end_of_eusart_init 4000 0 CODE 0
+__CFG_WRTD$OFF 0 0 ABS 0
+__CFG_CPB$OFF 0 0 ABS 0
+__CFG_CPD$OFF 0 0 ABS 0
+start_initialization 3FE2 0 CODE 0
+__CFG_BOREN$SBORDIS 0 0 ABS 0
+__CFG_IESO$OFF 0 0 ABS 0
+__initialization 3FE2 0 CODE 0
+__activetblptr 0 0 ABS 0
+%segments
+reset_vec 0 3 CODE 0 0
+config 300000 30000D CONFIG 300000 0
+idloc 200000 200007 IDLOC 200000 0
+text1 3FE8 3FFF CODE 3FE8 0
+cinit 3FE2 3FE7 CODE 3FE2 0
+text0 3FDC 3FE1 CODE 3FDC 0
+%locals
+dist/default/production\src.production.obj
+C:\Program Files\Microchip\xc8\v1.44\include\pic18f44k22.h
+C:\Users\_prossn\AppData\Local\Temp\s3s8.
+1144 3FE2 0 CODE 0
+1146 3FE2 0 CODE 0
+1149 3FE2 0 CODE 0
+1155 3FE2 0 CODE 0
+1157 3FE2 0 CODE 0
+1158 3FE4 0 CODE 0
+main.c
+83 3FDC 0 CODE 0
+85 3FDC 0 CODE 0
+88 3FE0 0 CODE 0
+rs232.c
+4 3FE8 0 CODE 0
+7 3FE8 0 CODE 0
+8 3FEA 0 CODE 0
+11 3FEC 0 CODE 0
+12 3FEE 0 CODE 0
+13 3FF2 0 CODE 0
+14 3FF4 0 CODE 0
+17 3FF6 0 CODE 0
+18 3FF8 0 CODE 0
+19 3FFA 0 CODE 0
+20 3FFC 0 CODE 0
+21 3FFE 0 CODE 0
-- 
cgit v1.2.1