[p LITE_MODE AUTOSTATIC LFSROK EMI_WORD ]
[d version 1.1 ]
[d edition pro ]
[d chip 18F45K22 ]
[d frameptr 4065 ]
"108 Z:\SAMB_4\projects\xilofono\src\main.c
[e E39 . `uc
C 0
D 1
E 2
F 3
G 4
A 5
B 6
]
"43 Z:\SAMB_4\projects\xilofono\src\midi.c
[e E40 . `uc
NOTE_ON 8
NOTE_OFF 9
POLYPHONIC_KEYPRESS 10
CONTROLLER 11
PROGRAM_CHANGE 12
CHANNEL_PRESSURE 13
PITCH_BLEND 15
]
"65
[e E31 . `uc
C 0
D 1
E 2
F 3
G 4
A 5
B 6
]
"62 C:\Program Files\Microchip\xc8\v1.44\sources\common\float.c
[v ___ftpack __ftpack `(f  1 e 3 0 ]
"86 C:\Program Files\Microchip\xc8\v1.44\sources\common\ftadd.c
[v ___ftadd __ftadd `(f  1 e 3 0 ]
"54 C:\Program Files\Microchip\xc8\v1.44\sources\common\ftdiv.c
[v ___ftdiv __ftdiv `(f  1 e 3 0 ]
"62 C:\Program Files\Microchip\xc8\v1.44\sources\common\ftmul.c
[v ___ftmul __ftmul `(f  1 e 3 0 ]
"20 C:\Program Files\Microchip\xc8\v1.44\sources\common\ftsub.c
[v ___ftsub __ftsub `(f  1 e 3 0 ]
"10 C:\Program Files\Microchip\xc8\v1.44\sources\common\sprcadd.c
[v ___fladd __fladd `(d  1 e 3 0 ]
"245
[v ___flsub __flsub `(d  1 e 3 0 ]
"11 C:\Program Files\Microchip\xc8\v1.44\sources\common\sprcdiv.c
[v ___fldiv __fldiv `(d  1 e 3 0 ]
"8 C:\Program Files\Microchip\xc8\v1.44\sources\common\sprcmul.c
[v ___flmul __flmul `(d  1 e 3 0 ]
"15 C:\Program Files\Microchip\xc8\v1.44\sources\common\Umul32.c
[v ___lmul __lmul `(ul  1 e 4 0 ]
"81 Z:\SAMB_4\projects\xilofono\src\main.c
[v _eusart_write_midi eusart_write_midi `(i  1 e 2 0 ]
"105
[v _main main `(v  1 e 1 0 ]
"42 Z:\SAMB_4\projects\xilofono\src\midi.c
[v _midi_set_status midi_set_status `(i  1 e 2 0 ]
"53
[v _midi_set_channel midi_set_channel `(i  1 e 2 0 ]
"64
[v _midi_note_on midi_note_on `(i  1 e 2 0 ]
"4 Z:\SAMB_4\projects\xilofono\src\rs232.c
[v _eusart_init eusart_init `(v  1 e 1 0 ]
"23
[v _putch putch `(v  1 e 1 0 ]
"29
[v _getch getch `(uc  1 e 1 0 ]
[s S120 . 1 `uc 1 RX9D 1 0 :1:0 
`uc 1 OERR 1 0 :1:1 
`uc 1 FERR 1 0 :1:2 
`uc 1 ADDEN 1 0 :1:3 
`uc 1 CREN 1 0 :1:4 
`uc 1 SREN 1 0 :1:5 
`uc 1 RX9 1 0 :1:6 
`uc 1 SPEN 1 0 :1:7 
]
"10543 C:\Program Files\Microchip\xc8\v1.44\include\pic18f45k22.h
[s S129 . 1 `uc 1 . 1 0 :3:0 
`uc 1 ADEN 1 0 :1:3 
]
[s S132 . 1 `uc 1 RX9D1 1 0 :1:0 
`uc 1 OERR1 1 0 :1:1 
`uc 1 FERR1 1 0 :1:2 
`uc 1 ADDEN1 1 0 :1:3 
`uc 1 CREN1 1 0 :1:4 
`uc 1 SREN1 1 0 :1:5 
`uc 1 RX91 1 0 :1:6 
`uc 1 SPEN1 1 0 :1:7 
]
[s S141 . 1 `uc 1 RCD8 1 0 :1:0 
`uc 1 . 1 0 :5:1 
`uc 1 RC8_9 1 0 :1:6 
]
[s S145 . 1 `uc 1 . 1 0 :6:0 
`uc 1 RC9 1 0 :1:6 
]
[s S148 . 1 `uc 1 . 1 0 :5:0 
`uc 1 SRENA 1 0 :1:5 
]
[u S151 . 1 `S120 1 . 1 0 `S129 1 . 1 0 `S132 1 . 1 0 `S141 1 . 1 0 `S145 1 . 1 0 `S148 1 . 1 0 ]
[v _RCSTAbits RCSTAbits `VES151  1 e 1 @4011 ]
[s S71 . 1 `uc 1 TX9D 1 0 :1:0 
`uc 1 TRMT 1 0 :1:1 
`uc 1 BRGH 1 0 :1:2 
`uc 1 SENDB 1 0 :1:3 
`uc 1 SYNC 1 0 :1:4 
`uc 1 TXEN 1 0 :1:5 
`uc 1 TX9 1 0 :1:6 
`uc 1 CSRC 1 0 :1:7 
]
"10960
[s S80 . 1 `uc 1 TX9D1 1 0 :1:0 
`uc 1 TRMT1 1 0 :1:1 
`uc 1 BRGH1 1 0 :1:2 
`uc 1 SENDB1 1 0 :1:3 
`uc 1 SYNC1 1 0 :1:4 
`uc 1 TXEN1 1 0 :1:5 
`uc 1 TX91 1 0 :1:6 
`uc 1 CSRC1 1 0 :1:7 
]
[s S89 . 1 `uc 1 TXD8 1 0 :1:0 
`uc 1 . 1 0 :5:1 
`uc 1 TX8_9 1 0 :1:6 
]
[u S93 . 1 `S71 1 . 1 0 `S80 1 . 1 0 `S89 1 . 1 0 ]
[v _TXSTAbits TXSTAbits `VES93  1 e 1 @4012 ]
"11179
[v _TXREG TXREG `VEuc  1 e 1 @4013 ]
"11257
[v _RCREG RCREG `VEuc  1 e 1 @4014 ]
"11335
[v _SPBRG SPBRG `VEuc  1 e 1 @4015 ]
[s S191 . 1 `uc 1 ABDEN 1 0 :1:0 
`uc 1 WUE 1 0 :1:1 
`uc 1 . 1 0 :1:2 
`uc 1 BRG16 1 0 :1:3 
`uc 1 CKTXP 1 0 :1:4 
`uc 1 DTRXP 1 0 :1:5 
`uc 1 RCIDL 1 0 :1:6 
`uc 1 ABDOVF 1 0 :1:7 
]
"12600
[s S200 . 1 `uc 1 . 1 0 :4:0 
`uc 1 SCKP 1 0 :1:4 
]
[s S203 . 1 `uc 1 ABDEN1 1 0 :1:0 
`uc 1 WUE1 1 0 :1:1 
`uc 1 . 1 0 :1:2 
`uc 1 BRG161 1 0 :1:3 
`uc 1 SCKP1 1 0 :1:4 
`uc 1 DTRXP1 1 0 :1:5 
`uc 1 RCIDL1 1 0 :1:6 
`uc 1 ABDOVF1 1 0 :1:7 
]
[s S212 . 1 `uc 1 . 1 0 :4:0 
`uc 1 TXCKP 1 0 :1:4 
`uc 1 RXDTP 1 0 :1:5 
`uc 1 RCMT 1 0 :1:6 
]
[s S217 . 1 `uc 1 . 1 0 :4:0 
`uc 1 TXCKP1 1 0 :1:4 
`uc 1 RXDTP1 1 0 :1:5 
`uc 1 RCMT1 1 0 :1:6 
]
[s S222 . 1 `uc 1 . 1 0 :5:0 
`uc 1 RXCKP 1 0 :1:5 
]
[s S225 . 1 `uc 1 . 1 0 :1:0 
`uc 1 W4E 1 0 :1:1 
]
[u S228 . 1 `S191 1 . 1 0 `S200 1 . 1 0 `S203 1 . 1 0 `S212 1 . 1 0 `S217 1 . 1 0 `S222 1 . 1 0 `S225 1 . 1 0 ]
[v _BAUDCONbits BAUDCONbits `VES228  1 e 1 @4024 ]
"18768
[v _RCIF RCIF `VEb  1 e 0 @31989 ]
"19440
[v _TRISC6 TRISC6 `VEb  1 e 0 @31910 ]
"19442
[v _TRISC7 TRISC7 `VEb  1 e 0 @31911 ]
"19540
[v _TXIF TXIF `VEb  1 e 0 @31988 ]
"105 Z:\SAMB_4\projects\xilofono\src\main.c
[v _main main `(v  1 e 1 0 ]
{
[s S21 . 7 `uc 1 status 1 0 :4:0 
`uc 1 channel 1 0 :4:4 
`ui 1 data_size 2 1 `[4]uc 1 data 4 3 ]
"107
[v main@sample_message sample_message `S21  1 a 7 13 ]
"116
} 0
"64 Z:\SAMB_4\projects\xilofono\src\midi.c
[v _midi_note_on midi_note_on `(i  1 e 2 0 ]
{
[s S21 . 7 `uc 1 status 1 0 :4:0 
`uc 1 channel 1 0 :4:4 
`ui 1 data_size 2 1 `[4]uc 1 data 4 3 ]
[v midi_note_on@pkt pkt `*.39S21  1 p 2 5 ]
[v midi_note_on@channel channel `ui  1 p 2 7 ]
[v midi_note_on@note note `E31  1 p 1 9 ]
[v midi_note_on@velocity velocity `uc  1 p 1 10 ]
"85
} 0
"42
[v _midi_set_status midi_set_status `(i  1 e 2 0 ]
{
[s S21 . 7 `uc 1 status 1 0 :4:0 
`uc 1 channel 1 0 :4:4 
`ui 1 data_size 2 1 `[4]uc 1 data 4 3 ]
[v midi_set_status@pkt pkt `*.39S21  1 p 2 0 ]
[v midi_set_status@status status `E40  1 p 1 2 ]
"51
} 0
"53
[v _midi_set_channel midi_set_channel `(i  1 e 2 0 ]
{
[s S21 . 7 `uc 1 status 1 0 :4:0 
`uc 1 channel 1 0 :4:4 
`ui 1 data_size 2 1 `[4]uc 1 data 4 3 ]
[v midi_set_channel@pkt pkt `*.39S21  1 p 2 0 ]
[v midi_set_channel@channel channel `ui  1 p 2 2 ]
"62
} 0
"81 Z:\SAMB_4\projects\xilofono\src\main.c
[v _eusart_write_midi eusart_write_midi `(i  1 e 2 0 ]
{
"92
[v eusart_write_midi@data data `*.39uc  1 a 2 7 ]
"91
[v eusart_write_midi@length length `ui  1 a 2 5 ]
[s S21 . 7 `uc 1 status 1 0 :4:0 
`uc 1 channel 1 0 :4:4 
`ui 1 data_size 2 1 `[4]uc 1 data 4 3 ]
"81
[v eusart_write_midi@pkt pkt `*.39S21  1 p 2 1 ]
"101
} 0
"23 Z:\SAMB_4\projects\xilofono\src\rs232.c
[v _putch putch `(v  1 e 1 0 ]
{
[v putch@c c `uc  1 a 1 wreg ]
[v putch@c c `uc  1 a 1 wreg ]
[v putch@c c `uc  1 a 1 0 ]
"27
} 0
"4
[v _eusart_init eusart_init `(v  1 e 1 0 ]
{
"21
} 0