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author | Nao Pross <naopross@thearcway.org> | 2018-10-31 23:09:38 +0100 |
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committer | Nao Pross <naopross@thearcway.org> | 2018-10-31 23:09:38 +0100 |
commit | dd3a06d322ca5ba30de3da66fafacd8cbba820e1 (patch) | |
tree | 6a3dea99097e7c6ab47f15e3cec850fa0a797745 | |
parent | [linux] Add initial implementation of rom-loader (diff) | |
download | z80uPC-dd3a06d322ca5ba30de3da66fafacd8cbba820e1.tar.gz z80uPC-dd3a06d322ca5ba30de3da66fafacd8cbba820e1.zip |
[avr] Implement set_addr(addr) to control 74LS259 chips
-rw-r--r-- | sw-avr/rom-loader/main.c | 48 |
1 files changed, 38 insertions, 10 deletions
diff --git a/sw-avr/rom-loader/main.c b/sw-avr/rom-loader/main.c index 784afb6..de1dbee 100644 --- a/sw-avr/rom-loader/main.c +++ b/sw-avr/rom-loader/main.c @@ -1,12 +1,11 @@ #include <avr/io.h> +#include <util/delay.h> +#include <stdint.h> + #include "usart.h" #include "pinmap.h" -// TODO: remove -#include <util/delay.h> - - inline void io_init(void) { ADDRL_DDR |= (_BV(ADDRL_bitE) | _BV(ADDRL_bitD)); @@ -19,19 +18,48 @@ inline void io_init(void) DATA_DDR = 0xFF; } +inline void set_addr(uint16_t addr) +{ + uint8_t i; + + // disable 74LS259 chips + ADDRL_PORT &= ~(_BV(ADDRL_bitE)); + ADDRH_PORT &= ~(_BV(ADDRH_bitE)); + + for (i = 0; i < 8; i++) { + ADDRL_PORT &= ~(0x7<<ADDRL_bitA0); + ADDRL_PORT |= (i<<ADDRL_bitA0); + + if (bit_is_set(addr, i)) + ADDRL_PORT |= _BV(ADDRL_bitD); + else + ADDRL_PORT &= ~(_BV(ADDRL_bitD)); + + if (bit_is_set(addr, i+8)) + ADDRH_PORT |= _BV(ADDRH_bitD); + else + ADDRH_PORT &= ~(_BV(ADDRH_bitD)); + } + + // enable 74LS259 chips + ADDRL_PORT |= _BV(ADDRL_bitE); + ADDRH_PORT |= _BV(ADDRH_bitE); +} + int main(void) { + uint16_t addr = 0; + io_init(); usart_init(); - // TODO: remove - DATA_PORT |= _BV(1); - while (1) { - DATA_PORT ^= _BV(1); - _delay_ms(500); + DATA_PORT = usart_recv(); + set_addr(addr); + + _delay_ms(1); - usart_send('c'); + addr++; } return 0; |