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| author | Nao Pross <naopross@thearcway.org> | 2017-05-19 09:41:19 +0200 |
|---|---|---|
| committer | Nao Pross <naopross@thearcway.org> | 2017-05-19 09:41:19 +0200 |
| commit | 3c5918139029f8740c46cab4d946e103bdc29706 (patch) | |
| tree | f1bc2ebc4843b552ec0bfb4a89dc960f9c4b21d4 /hw/History/HITACHI Memory Non-Volatile RAM.~(5).SchLib.Zip | |
| parent | new traces for cpu signals and for high address to the MMU / addr decoder (diff) | |
| download | z80uPC-3c5918139029f8740c46cab4d946e103bdc29706.tar.gz z80uPC-3c5918139029f8740c46cab4d946e103bdc29706.zip | |
wiring for 7 segment displays and traces for the remaining CPU signals
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