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authorNao Pross <naopross@thearcway.org>2017-05-19 16:14:00 +0200
committerNao Pross <naopross@thearcway.org>2017-05-19 16:14:00 +0200
commitf2418d7f5a9734590c4e0d3392886423b2e818a9 (patch)
tree8b1c928cee9f975b81b77135174610161e0120ab /hw/History/MainBoard.~(356).PcbDoc.Zip
parentwiring for 7 segment displays and traces for the remaining CPU signals (diff)
downloadz80uPC-f2418d7f5a9734590c4e0d3392886423b2e818a9.tar.gz
z80uPC-f2418d7f5a9734590c4e0d3392886423b2e818a9.zip
finish wiring and add eurocard compliant standard holes
since there wasn't enough space (I should have added the holes before beginning) there are only 4 holes instead of 6 (2 will be cut out since the space is unused).
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