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authorleleraffa97@hotmail.it <leleraffa97@hotmail.it>2017-06-19 13:50:25 +0200
committerleleraffa97@hotmail.it <leleraffa97@hotmail.it>2017-06-19 13:50:25 +0200
commit335bc4afe0648ede6c7699541367db8e22355d72 (patch)
tree09175c9e14496ab7b36733f6c3c3bd9b85e1fbb8 /hw/Project Outputs for z80uPC/Status Report.Txt
parentAuthentication section (diff)
parentmerge branch 'naopross' (diff)
downloadz80uPC-335bc4afe0648ede6c7699541367db8e22355d72.tar.gz
z80uPC-335bc4afe0648ede6c7699541367db8e22355d72.zip
Merge branch 'master' of github.com:NaoPross/z80uPC into atlas
Serial updates from NaoPross
Diffstat (limited to 'hw/Project Outputs for z80uPC/Status Report.Txt')
-rw-r--r--hw/Project Outputs for z80uPC/Status Report.Txt36
1 files changed, 30 insertions, 6 deletions
diff --git a/hw/Project Outputs for z80uPC/Status Report.Txt b/hw/Project Outputs for z80uPC/Status Report.Txt
index 6b5e7df..3cf8803 100644
--- a/hw/Project Outputs for z80uPC/Status Report.Txt
+++ b/hw/Project Outputs for z80uPC/Status Report.Txt
@@ -1,10 +1,34 @@
-Output: Protel
-Type : ProtelNetlist
-From : Project [z80uPC.PrjPCB]
- Generated File[MainSheet.NET]
+Project Outputs Generation Report
+---------------------------------
+Start Output Generation At 09:54:31 On 23.05.2017
+Output: Gerber X2 Files
+Type : GerberX2
+From : PCB Document [MainBoard.PcbDoc]
+ Generated File[MainBoard_Copper_Signal_Top.gbr]
+ Generated File[MainBoard_Copper_Plane_1.gbr]
+ Generated File[MainBoard_Copper_Plane_2.gbr]
+ Generated File[MainBoard_Copper_Signal_Bot.gbr]
+ Generated File[MainBoard_Pads_Bot.gbr]
+ Generated File[MainBoard_Pads_Top.gbr]
+ Generated File[MainBoard_Legend_Top.gbr]
+ Generated File[MainBoard_Soldermask_Top.gbr]
+ Generated File[MainBoard_Paste_Bot.gbr]
+ Generated File[MainBoard_Legend_Bot.gbr]
+ Generated File[MainBoard_Soldermask_Bot.gbr]
+ Generated File[MainBoard_Paste_Top.gbr]
+ Generated File[MainBoard_Mechanical_15.gbr]
+ Generated File[MainBoard_Profile.gbr]
+ Generated File[MainBoard_NPTH_Drill.gbr]
+ Generated File[MainBoard_PTH_Drill.gbr]
+ Generated File[MainBoard_Drawing_1.gbr]
+ Generated File[MainBoard_Drillmap_1.gbr]
+ Generated File[MainBoard.RUL]
+ Generated File[MainBoard.EXTREP]
+ Generated File[MainBoard.REP]
-Files Generated : 1
+
+Files Generated : 21
Documents Printed : 0
-Finished Output Generation At 10:54:34 On 06.03.2017
+Finished Output Generation At 09:54:33 On 23.05.2017