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authorNao Pross <naopross@thearcway.org>2017-06-10 17:55:23 +0200
committerNao Pross <naopross@thearcway.org>2017-06-10 17:55:23 +0200
commitd39e080627f55d39c9596a590a9c7ade05008d2d (patch)
tree774afa28ca9152ea662d311d69d792e25ab34631 /hw/Project Outputs for z80uPC/Status Report.Txt
parentswitch to sdcc (diff)
parentboard complete, generate gerber (x2) files (diff)
downloadz80uPC-d39e080627f55d39c9596a590a9c7ade05008d2d.tar.gz
z80uPC-d39e080627f55d39c9596a590a9c7ade05008d2d.zip
merge branch 'hardware'
this is probably the last merge from this branch since the board has been sent to print
Diffstat (limited to 'hw/Project Outputs for z80uPC/Status Report.Txt')
-rw-r--r--hw/Project Outputs for z80uPC/Status Report.Txt36
1 files changed, 30 insertions, 6 deletions
diff --git a/hw/Project Outputs for z80uPC/Status Report.Txt b/hw/Project Outputs for z80uPC/Status Report.Txt
index 6b5e7df..3cf8803 100644
--- a/hw/Project Outputs for z80uPC/Status Report.Txt
+++ b/hw/Project Outputs for z80uPC/Status Report.Txt
@@ -1,10 +1,34 @@
-Output: Protel
-Type : ProtelNetlist
-From : Project [z80uPC.PrjPCB]
- Generated File[MainSheet.NET]
+Project Outputs Generation Report
+---------------------------------
+Start Output Generation At 09:54:31 On 23.05.2017
+Output: Gerber X2 Files
+Type : GerberX2
+From : PCB Document [MainBoard.PcbDoc]
+ Generated File[MainBoard_Copper_Signal_Top.gbr]
+ Generated File[MainBoard_Copper_Plane_1.gbr]
+ Generated File[MainBoard_Copper_Plane_2.gbr]
+ Generated File[MainBoard_Copper_Signal_Bot.gbr]
+ Generated File[MainBoard_Pads_Bot.gbr]
+ Generated File[MainBoard_Pads_Top.gbr]
+ Generated File[MainBoard_Legend_Top.gbr]
+ Generated File[MainBoard_Soldermask_Top.gbr]
+ Generated File[MainBoard_Paste_Bot.gbr]
+ Generated File[MainBoard_Legend_Bot.gbr]
+ Generated File[MainBoard_Soldermask_Bot.gbr]
+ Generated File[MainBoard_Paste_Top.gbr]
+ Generated File[MainBoard_Mechanical_15.gbr]
+ Generated File[MainBoard_Profile.gbr]
+ Generated File[MainBoard_NPTH_Drill.gbr]
+ Generated File[MainBoard_PTH_Drill.gbr]
+ Generated File[MainBoard_Drawing_1.gbr]
+ Generated File[MainBoard_Drillmap_1.gbr]
+ Generated File[MainBoard.RUL]
+ Generated File[MainBoard.EXTREP]
+ Generated File[MainBoard.REP]
-Files Generated : 1
+
+Files Generated : 21
Documents Printed : 0
-Finished Output Generation At 10:54:34 On 06.03.2017
+Finished Output Generation At 09:54:33 On 23.05.2017