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author | Nao Pross <naopross@thearcway.org> | 2017-04-13 16:03:11 +0200 |
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committer | Nao Pross <naopross@thearcway.org> | 2017-04-13 16:03:11 +0200 |
commit | 985e16b181fd55e28538f2d4524550bd425b86e9 (patch) | |
tree | 3d444d9e6a651a4345069c8fc96a60a811a57ac8 /sw/cpld/ADDRESS_DECODER.STY | |
parent | Merge branch 'master' into naopross (diff) | |
download | z80uPC-985e16b181fd55e28538f2d4524550bd425b86e9.tar.gz z80uPC-985e16b181fd55e28538f2d4524550bd425b86e9.zip |
switch from GAL (pld) to M4 32/32 CPLD
add M4 32/32 CPLD datasheet
new VHDL code with better control over the address space thanks to the
M4 which has a 16 bit input port
Diffstat (limited to 'sw/cpld/ADDRESS_DECODER.STY')
-rw-r--r-- | sw/cpld/ADDRESS_DECODER.STY | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sw/cpld/ADDRESS_DECODER.STY b/sw/cpld/ADDRESS_DECODER.STY new file mode 100644 index 0000000..afd24c5 --- /dev/null +++ b/sw/cpld/ADDRESS_DECODER.STY @@ -0,0 +1,4 @@ +[STRATEGY-LIST] +Normal=True, 1491209776 +[synthesis-type] +tool=Synplify |