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author | Nao Pross <naopross@thearcway.org> | 2018-10-30 11:41:24 +0100 |
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committer | Nao Pross <naopross@thearcway.org> | 2018-10-30 11:41:24 +0100 |
commit | 43be150dc6e84f6f6eeb071cd3cdb7fc21125d60 (patch) | |
tree | 541fd3d690c1bdfd7b68d684029a400b80f4aa06 /sw/cpld/ADDRESS_DECODER.abt | |
parent | Add datasheets for ATmega328 and 74LS259 (diff) | |
download | z80uPC-43be150dc6e84f6f6eeb071cd3cdb7fc21125d60.tar.gz z80uPC-43be150dc6e84f6f6eeb071cd3cdb7fc21125d60.zip |
Move sw to sw-old and hw to hw-altium, add kicad files
Diffstat (limited to 'sw/cpld/ADDRESS_DECODER.abt')
-rwxr-xr-x | sw/cpld/ADDRESS_DECODER.abt | 62 |
1 files changed, 0 insertions, 62 deletions
diff --git a/sw/cpld/ADDRESS_DECODER.abt b/sw/cpld/ADDRESS_DECODER.abt deleted file mode 100755 index 8d21960..0000000 --- a/sw/cpld/ADDRESS_DECODER.abt +++ /dev/null @@ -1,62 +0,0 @@ -
-
-MODULE ADDRESS_DECODER
-
-" TOOL: vhdl2tf
-" DATE: 11/23/17 11:54:50
-" TITLE: Lattice Semiconductor Corporation
-" MODULE: ADDRESS_DECODER
-" DESIGN: ADDRESS_DECODER
-" FILENAME: ADDRESS_DECODER.abt
-" PROJECT: address_decoder
-" VERSION: 1.0
-" NOTE: DO NOT EDIT THIS FILE DIRECTLY.
-" This file is auto generated by ispDesignEXPERT System.
-" It can be removed or overwritten automatically.
-" If you want to edit this file, copy it to another file or
-" rename it with different file extension first.
-
-
-" Inputs
- MMU_IN_15_ pin;
- MMU_IN_14_ pin;
- MMU_IN_13_ pin;
- MMU_IN_12_ pin;
- MMU_IN_11_ pin;
- MMU_IN_10_ pin;
- MMU_IN_9_ pin;
- MMU_IN_8_ pin;
- MMU_IN_7_ pin;
- MMU_IN_6_ pin;
- MMU_IN_5_ pin;
- MMU_IN_4_ pin;
- MMU_IN_3_ pin;
- MMU_IN_2_ pin;
- MMU_IN_1_ pin;
- MMU_IN_0_ pin;
- IORQ pin;
- RD pin;
-
-
-" Outputs
- MMU_OUT_15_ pin;
- MMU_OUT_14_ pin;
- MMU_OUT_13_ pin;
- MMU_OUT_12_ pin;
- CSROML pin;
- CSROMH pin;
- CSRAM pin;
- CSUART pin;
- CSCTC pin;
- CSPIO pin;
-
-
-" Bidirs
-
-
-
-Test_vectors
-([MMU_IN_15_,MMU_IN_14_,MMU_IN_13_,MMU_IN_12_,MMU_IN_11_,MMU_IN_10_,MMU_IN_9_,MMU_IN_8_,MMU_IN_7_,MMU_IN_6_,MMU_IN_5_,MMU_IN_4_,MMU_IN_3_,MMU_IN_2_,MMU_IN_1_,MMU_IN_0_,IORQ,RD] -> [MMU_OUT_15_,MMU_OUT_14_,MMU_OUT_13_,MMU_OUT_12_,CSROML,CSROMH,CSRAM,CSUART,CSCTC,CSPIO])
-
-
-END
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