summaryrefslogtreecommitdiffstats
path: root/sw/cpld/address_decoder.eq3
diff options
context:
space:
mode:
authorNao Pross <naopross@thearcway.org>2017-11-23 14:34:55 +0100
committerNao Pross <naopross@thearcway.org>2017-11-23 14:34:55 +0100
commit141137dfe5bdc7400d5cc1ad388b670f9f2e9446 (patch)
treebef58de3c44787dadb22ec9cf452a3606ddd6708 /sw/cpld/address_decoder.eq3
parentImprovements in PIO driver, pio test rewritten in inline asm (diff)
downloadz80uPC-141137dfe5bdc7400d5cc1ad388b670f9f2e9446.tar.gz
z80uPC-141137dfe5bdc7400d5cc1ad388b670f9f2e9446.zip
update cpld files from VHDL dev machine and delete programmer code (unused)
Diffstat (limited to '')
-rwxr-xr-xsw/cpld/address_decoder.eq349
1 files changed, 49 insertions, 0 deletions
diff --git a/sw/cpld/address_decoder.eq3 b/sw/cpld/address_decoder.eq3
new file mode 100755
index 0000000..8eb8577
--- /dev/null
+++ b/sw/cpld/address_decoder.eq3
@@ -0,0 +1,49 @@
+ ispDesignEXPERT 8.3.02.12
+
+Design address_decoder created Thu Nov 23 11:54:43 2017
+
+
+ P-Terms Fan-in Fan-out Type Name (attributes)
+--------- ------ ------- ---- -----------------
+ 1 1 1 Pin MMU_OUT_15_
+ 1 3 1 Pin CSROML-
+ 1 3 1 Pin CSROMH-
+ 1 1 1 Pin MMU_OUT_14_
+ 1 1 1 Pin CSRAM
+ 1 1 1 Pin MMU_OUT_13_
+ 0 0 1 Pin CSUART
+ 1 1 1 Pin MMU_OUT_12_
+ 0 0 1 Pin CSCTC
+ 1 7 1 Pin CSPIO-
+=========
+ 8 P-Term Total: 8
+ Total Pins: 21
+ Total Nodes: 0
+ Average P-Term/Output: 0
+
+
+Equations:
+
+MMU_OUT_15_ = (MMU_IN_15_);
+
+!CSROML = (!MMU_IN_15_ & !MMU_IN_14_ & !MMU_IN_13_);
+
+!CSROMH = (!MMU_IN_15_ & !MMU_IN_14_ & MMU_IN_13_);
+
+MMU_OUT_14_ = (MMU_IN_14_);
+
+CSRAM = (!MMU_IN_15_);
+
+MMU_OUT_13_ = (MMU_IN_13_);
+
+CSUART = (0);
+
+MMU_OUT_12_ = (MMU_IN_12_);
+
+CSCTC = (0);
+
+!CSPIO = (!IORQ & !MMU_IN_7_ & !MMU_IN_6_ & !MMU_IN_5_ & MMU_IN_4_ & !MMU_IN_3_ & !MMU_IN_2_);
+
+
+Reverse-Polarity Equations:
+