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| author | Nao Pross <naopross@thearcway.org> | 2017-11-23 14:34:55 +0100 |
|---|---|---|
| committer | Nao Pross <naopross@thearcway.org> | 2017-11-23 14:34:55 +0100 |
| commit | 141137dfe5bdc7400d5cc1ad388b670f9f2e9446 (patch) | |
| tree | bef58de3c44787dadb22ec9cf452a3606ddd6708 /sw/cpld/address_decoder.nrp | |
| parent | Improvements in PIO driver, pio test rewritten in inline asm (diff) | |
| download | z80uPC-141137dfe5bdc7400d5cc1ad388b670f9f2e9446.tar.gz z80uPC-141137dfe5bdc7400d5cc1ad388b670f9f2e9446.zip | |
update cpld files from VHDL dev machine and delete programmer code (unused)
Diffstat (limited to 'sw/cpld/address_decoder.nrp')
| -rwxr-xr-x | sw/cpld/address_decoder.nrp | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/sw/cpld/address_decoder.nrp b/sw/cpld/address_decoder.nrp new file mode 100755 index 0000000..6b40d36 --- /dev/null +++ b/sw/cpld/address_decoder.nrp @@ -0,0 +1,17 @@ +ispDesignExpert 8.3.02.12_DE_HDL_BASE Copyright ©, 1992-1999,
+Lattice Semiconductor Corporation, All Rights Reserved
+
+Output Files:
+ Netlist File: address_decoder.vho
+ Delay File: address_decoder.sdf
+
+Parsing C:\ISPTOOLS\ISPSYS/dat/sdf.mdl
+Input file: c:\_prossn\cpld\address_decoder.tte
+Reading library information ...
+Mapping to combinational gates
+Mapping to netlist view.
+Utilization Estimate
+ Combinational Macros: 27
+ Flip-Flop and Latch Macros: 0
+ I/O Pads: 24
+Elapsed time: 1 seconds
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