diff options
author | Nao Pross <naopross@thearcway.org> | 2017-03-23 20:49:25 +0100 |
---|---|---|
committer | Nao Pross <naopross@thearcway.org> | 2017-03-23 20:49:25 +0100 |
commit | be51fc021f18aa6c0fc0006ebbc4fa34ebca4c62 (patch) | |
tree | 07934fe1084d1906372e19b66afb39ae4ff0bf55 /sw/z80/crt0.s.old | |
parent | changed scheme layout (diff) | |
download | z80uPC-be51fc021f18aa6c0fc0006ebbc4fa34ebca4c62.tar.gz z80uPC-be51fc021f18aa6c0fc0006ebbc4fa34ebca4c62.zip |
created bios/kernel source code structure
Diffstat (limited to '')
-rw-r--r-- | sw/z80/crt0.s.old | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/sw/z80/crt0.s.old b/sw/z80/crt0.s.old new file mode 100644 index 0000000..f3bf8e8 --- /dev/null +++ b/sw/z80/crt0.s.old @@ -0,0 +1,43 @@ + .module crt0 + .globl _main + + .area _HEADER (ABS) +;; reset vector + .org 0x0000 + jp init + + .org 0x0100 + +init: +;; Stack at the top of memory. + ld sp,#0xffff + + ;; initialise global variables + call gsinit + call _main + jp _exit + + ;; Ordering of segments for the linker. + .area _HOME + .area _CODE + .area _GSINIT + .area _GSFINAL + + .area _DATA + .area _BSS + .area _HEAP + + .area _CODE +__clock:: + ret + +_exit:: + ret + + .area _GSINIT + +gsinit:: + +.area _GSFINAL + ret + |