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author | Nao Pross <naopross@thearcway.org> | 2017-11-09 13:17:35 +0100 |
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committer | Nao Pross <naopross@thearcway.org> | 2017-11-09 13:17:35 +0100 |
commit | 3b2f2ea6c6fbfcb23ea9ab324c83d602d45a8820 (patch) | |
tree | 2362bfb36432e551f2f0025d4f12554bddc863c9 /sw/z80/drivers/pio.c | |
parent | Update gitignore and add sdcc manual (diff) | |
download | z80uPC-3b2f2ea6c6fbfcb23ea9ab324c83d602d45a8820.tar.gz z80uPC-3b2f2ea6c6fbfcb23ea9ab324c83d602d45a8820.zip |
Update makefile, and bug fix in pio driver and usart
Diffstat (limited to '')
-rw-r--r-- | sw/z80/drivers/pio.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/sw/z80/drivers/pio.c b/sw/z80/drivers/pio.c index 18697d8..272e191 100644 --- a/sw/z80/drivers/pio.c +++ b/sw/z80/drivers/pio.c @@ -1,6 +1,7 @@ #include "pio.h" -#if 0 /* old inline asm implementation */ +#ifdef PIO_ASM_INTERFACE +/* old inline asm implementation */ inline void _pio_write(uint8_t reg, uint8_t data) { __asm @@ -17,7 +18,6 @@ inline void _pio_write(uint8_t reg, uint8_t data) __endasm; } -// incomplete inline uint8_t _pio_read(uint8_t reg) __naked { __asm @@ -31,7 +31,8 @@ inline uint8_t _pio_read(uint8_t reg) __naked ret __endasm; } -#endif + +#else inline void _pio_write(uint8_t reg, uint8_t data) { @@ -43,6 +44,8 @@ inline uint8_t _pio_read(uint8_t reg) return *((uint8_t *) (ADDR_DEV_PIO + reg)); } +#endif + void pio_set_mode(int port, int mode, uint8_t io) { // 0x0F is a control sequence to set mode @@ -58,7 +61,7 @@ void pio_set_mode(int port, int mode, uint8_t io) void pio_set_interrupts(int port, int control) { // 0x07 is a control sequence to set interrupts - _pio_write((PIO_REG_CTRL + port), (control | 0x07)); + _pio_write((PIO_REG_CTRL + port), (control<<4 | 0x07)); } void pio_set_interrupts_mask(int port, int control, uint8_t mask) |