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authorNao Pross <naopross@thearcway.org>2017-08-28 13:55:35 +0200
committerNao Pross <naopross@thearcway.org>2017-08-28 13:55:35 +0200
commit9b9e656da951138f7d5523fd717c86a834211096 (patch)
tree397be6d5fb2ea3566efcf7d6684660e8a2ab9593 /sw/z80_test/pio.c
parentupdate gitignore to ignore sdcc output (diff)
downloadz80uPC-9b9e656da951138f7d5523fd717c86a834211096.tar.gz
z80uPC-9b9e656da951138f7d5523fd717c86a834211096.zip
add test program for z80
Diffstat (limited to '')
-rw-r--r--sw/z80_test/pio.c40
1 files changed, 40 insertions, 0 deletions
diff --git a/sw/z80_test/pio.c b/sw/z80_test/pio.c
new file mode 100644
index 0000000..5ca9149
--- /dev/null
+++ b/sw/z80_test/pio.c
@@ -0,0 +1,40 @@
+#include "pio.h"
+
+static uint8_t *pio_port = (uint8_t *) ADDR_DEV_PIO;
+static uint8_t *pio_ctrl = (uint8_t *) (ADDR_DEV_PIO + 2);
+
+inline void _pio_data(int port, uint8_t data)
+{
+ *(pio_port + port) = data;
+}
+
+inline void _pio_control(int port, uint8_t cmd)
+{
+ *(pio_ctrl + port) = cmd;
+}
+
+void pio_set_mode(int port, int mode, uint8_t io)
+{
+ // 0x0F is a control sequence to set mode
+ _pio_control(port, ((mode << 6) | 0x0F));
+
+ // this mode requires an additional argument that sets
+ // a mode for each pin
+ if (mode == PIO_MODE_BIT_IO) {
+ _pio_control(port, io);
+ }
+}
+
+void pio_set_interrupts(int port, int control)
+{
+ // 0x07 is a control sequence to set interrupts
+ _pio_control(port, (control | 0x07));
+}
+
+void pio_set_interrupts_mask(int port, int control, uint8_t mask)
+{
+ // 0x17 is a control sequence to set interrupts
+ // and to interpret the next byte as a mask
+ _pio_control(port, (control | 0x17));
+ _pio_control(port, mask);
+}