diff options
| author | Nao Pross <naopross@thearcway.org> | 2018-10-30 11:41:24 +0100 |
|---|---|---|
| committer | Nao Pross <naopross@thearcway.org> | 2018-10-30 11:41:24 +0100 |
| commit | 43be150dc6e84f6f6eeb071cd3cdb7fc21125d60 (patch) | |
| tree | 541fd3d690c1bdfd7b68d684029a400b80f4aa06 /sw | |
| parent | Add datasheets for ATmega328 and 74LS259 (diff) | |
| download | z80uPC-43be150dc6e84f6f6eeb071cd3cdb7fc21125d60.tar.gz z80uPC-43be150dc6e84f6f6eeb071cd3cdb7fc21125d60.zip | |
Move sw to sw-old and hw to hw-altium, add kicad files
Diffstat (limited to 'sw')
110 files changed, 0 insertions, 8164 deletions
diff --git a/sw/cpld/ADDRESS_DECODER.TCL b/sw/cpld/ADDRESS_DECODER.TCL deleted file mode 100755 index e83cb1f..0000000 --- a/sw/cpld/ADDRESS_DECODER.TCL +++ /dev/null @@ -1,37 +0,0 @@ -#-- Lattice Semiconductor Corporation Ltd.
-#-- Synplify OEM project file .\ADDRESS_DECODER.TCL
-#-- Written on Thu Nov 23 11:54:33 2017
-
-
-#-- begin a new section
-project -new
-
-#-- Device options
-set_option -technology mach
-
-#-- add_file options
-add_file -vhdl -lib work "address_decoder.vhd"
-
-#-- top module name
-set_option -top_module ADDRESS_DECODER
-
-#simulation options
-set_option -write_verilog true
-set_option -write_vhdl true
-
-#-- set result format/file last
-project -result_file "ADDRESS_DECODER.edi"
-
-#-- error message log file
-project -log_file ADDRESS_DECODER.log
-
-#-- let's save it
-project -save ADDRESS_DECODER.tc_
-
-#-- run Synplify
-project -run
-
-#-- **************************************************
-
-#-- exit from Synplify
-exit
diff --git a/sw/cpld/ADDRESS_DECODER.abt b/sw/cpld/ADDRESS_DECODER.abt deleted file mode 100755 index 8d21960..0000000 --- a/sw/cpld/ADDRESS_DECODER.abt +++ /dev/null @@ -1,62 +0,0 @@ -
-
-MODULE ADDRESS_DECODER
-
-" TOOL: vhdl2tf
-" DATE: 11/23/17 11:54:50
-" TITLE: Lattice Semiconductor Corporation
-" MODULE: ADDRESS_DECODER
-" DESIGN: ADDRESS_DECODER
-" FILENAME: ADDRESS_DECODER.abt
-" PROJECT: address_decoder
-" VERSION: 1.0
-" NOTE: DO NOT EDIT THIS FILE DIRECTLY.
-" This file is auto generated by ispDesignEXPERT System.
-" It can be removed or overwritten automatically.
-" If you want to edit this file, copy it to another file or
-" rename it with different file extension first.
-
-
-" Inputs
- MMU_IN_15_ pin;
- MMU_IN_14_ pin;
- MMU_IN_13_ pin;
- MMU_IN_12_ pin;
- MMU_IN_11_ pin;
- MMU_IN_10_ pin;
- MMU_IN_9_ pin;
- MMU_IN_8_ pin;
- MMU_IN_7_ pin;
- MMU_IN_6_ pin;
- MMU_IN_5_ pin;
- MMU_IN_4_ pin;
- MMU_IN_3_ pin;
- MMU_IN_2_ pin;
- MMU_IN_1_ pin;
- MMU_IN_0_ pin;
- IORQ pin;
- RD pin;
-
-
-" Outputs
- MMU_OUT_15_ pin;
- MMU_OUT_14_ pin;
- MMU_OUT_13_ pin;
- MMU_OUT_12_ pin;
- CSROML pin;
- CSROMH pin;
- CSRAM pin;
- CSUART pin;
- CSCTC pin;
- CSPIO pin;
-
-
-" Bidirs
-
-
-
-Test_vectors
-([MMU_IN_15_,MMU_IN_14_,MMU_IN_13_,MMU_IN_12_,MMU_IN_11_,MMU_IN_10_,MMU_IN_9_,MMU_IN_8_,MMU_IN_7_,MMU_IN_6_,MMU_IN_5_,MMU_IN_4_,MMU_IN_3_,MMU_IN_2_,MMU_IN_1_,MMU_IN_0_,IORQ,RD] -> [MMU_OUT_15_,MMU_OUT_14_,MMU_OUT_13_,MMU_OUT_12_,CSROML,CSROMH,CSRAM,CSUART,CSCTC,CSPIO])
-
-
-END
diff --git a/sw/cpld/ADDRESS_DECODER.bl0 b/sw/cpld/ADDRESS_DECODER.bl0 deleted file mode 100755 index 6c4f5d5..0000000 --- a/sw/cpld/ADDRESS_DECODER.bl0 +++ /dev/null @@ -1,107 +0,0 @@ -#$ DATE Thu Nov 23 11:54:43 2017
-#$ TOOL Edif2Blif version 8.2
-#$ MODULE address_decoder
-#$ PINS 28 MMU_IN_7_ MMU_IN_6_ MMU_IN_15_ MMU_IN_5_ MMU_IN_4_ MMU_OUT_15_ MMU_IN_3_ IORQ MMU_IN_2_ RD MMU_IN_1_ CSROML MMU_IN_0_ CSROMH MMU_OUT_14_ CSRAM MMU_OUT_13_ CSUART MMU_OUT_12_ CSCTC CSPIO MMU_IN_14_ MMU_IN_13_ MMU_IN_12_ MMU_IN_11_ MMU_IN_10_ MMU_IN_9_ MMU_IN_8_
-#$ NODES 34 op_ge_un24_csromh op_lt_un11_csromh un12_csromhZ0 N_117 N_181 op_lt_un11_cspio N_56 N_54 N_51 IORQ_iZ0
-MMU_IN_i_0_7 MMU_IN_i_0_6 MMU_IN_i_0_5 MMU_IN_i_0_3 MMU_IN_i_0_2 MMU_IN_i_0_14 MMU_IN_i_0_13 MMU_IN_c_2 MMU_IN_c_3 MMU_IN_c_4
-MMU_IN_c_5 MMU_IN_c_6 MMU_IN_c_7 MMU_IN_c_c_12 MMU_IN_c_c_13 MMU_IN_c_c_14 MMU_IN_c_c_15 IORQ_c op_ge_un24_csromh_i_c un12_csromh_i_c
-MMU_IN_i_c_15 N_181_i_0_c GND N_184
-.model address_decoder
-.inputs MMU_IN_15_.BLIF IORQ.BLIF MMU_IN_14_.BLIF MMU_IN_13_.BLIF MMU_IN_12_.BLIF MMU_IN_11_.BLIF MMU_IN_10_.BLIF MMU_IN_9_.BLIF MMU_IN_8_.BLIF \
- MMU_IN_7_.BLIF MMU_IN_6_.BLIF MMU_IN_5_.BLIF MMU_IN_4_.BLIF MMU_IN_3_.BLIF MMU_IN_2_.BLIF MMU_IN_1_.BLIF MMU_IN_0_.BLIF op_ge_un24_csromh.BLIF \
- op_lt_un11_csromh.BLIF un12_csromhZ0.BLIF N_117.BLIF N_181.BLIF op_lt_un11_cspio.BLIF N_56.BLIF N_54.BLIF N_51.BLIF IORQ_iZ0.BLIF \
- MMU_IN_i_0_7.BLIF MMU_IN_i_0_6.BLIF MMU_IN_i_0_5.BLIF MMU_IN_i_0_3.BLIF MMU_IN_i_0_2.BLIF MMU_IN_i_0_14.BLIF MMU_IN_i_0_13.BLIF MMU_IN_c_2.BLIF MMU_IN_c_3.BLIF \
- MMU_IN_c_4.BLIF MMU_IN_c_5.BLIF MMU_IN_c_6.BLIF MMU_IN_c_7.BLIF MMU_IN_c_c_12.BLIF MMU_IN_c_c_13.BLIF MMU_IN_c_c_14.BLIF MMU_IN_c_c_15.BLIF IORQ_c.BLIF \
- op_ge_un24_csromh_i_c.BLIF un12_csromh_i_c.BLIF MMU_IN_i_c_15.BLIF N_181_i_0_c.BLIF GND.BLIF N_184.BLIF
-.outputs MMU_OUT_15_ CSROML CSROMH CSRAM CSUART CSCTC CSPIO MMU_OUT_14_ MMU_OUT_13_ MMU_OUT_12_ op_ge_un24_csromh \
- op_lt_un11_csromh un12_csromhZ0 N_117 N_181 op_lt_un11_cspio N_56 N_54 N_51 IORQ_iZ0 MMU_IN_i_0_7 MMU_IN_i_0_6 \
- MMU_IN_i_0_5 MMU_IN_i_0_3 MMU_IN_i_0_2 MMU_IN_i_0_14 MMU_IN_i_0_13 MMU_IN_c_2 MMU_IN_c_3 MMU_IN_c_4 MMU_IN_c_5 MMU_IN_c_6 MMU_IN_c_7 \
- MMU_IN_c_c_12 MMU_IN_c_c_13 MMU_IN_c_c_14 MMU_IN_c_c_15 IORQ_c op_ge_un24_csromh_i_c un12_csromh_i_c MMU_IN_i_c_15 N_181_i_0_c GND N_184
-.names MMU_IN_2_.BLIF MMU_IN_c_2
-1 1
-.names MMU_IN_3_.BLIF MMU_IN_c_3
-1 1
-.names MMU_IN_4_.BLIF MMU_IN_c_4
-1 1
-.names MMU_IN_5_.BLIF MMU_IN_c_5
-1 1
-.names MMU_IN_6_.BLIF MMU_IN_c_6
-1 1
-.names MMU_IN_7_.BLIF MMU_IN_c_7
-1 1
-.names MMU_IN_12_.BLIF MMU_IN_c_c_12
-1 1
-.names MMU_IN_13_.BLIF MMU_IN_c_c_13
-1 1
-.names MMU_IN_14_.BLIF MMU_IN_c_c_14
-1 1
-.names MMU_IN_15_.BLIF MMU_IN_c_c_15
-1 1
-.names MMU_IN_c_c_12.BLIF MMU_OUT_12_
-1 1
-.names MMU_IN_c_c_13.BLIF MMU_OUT_13_
-1 1
-.names MMU_IN_c_c_14.BLIF MMU_OUT_14_
-1 1
-.names MMU_IN_c_c_15.BLIF MMU_OUT_15_
-1 1
-.names IORQ.BLIF IORQ_c
-1 1
-.names op_ge_un24_csromh_i_c.BLIF CSROML
-1 1
-.names un12_csromh_i_c.BLIF CSROMH
-1 1
-.names MMU_IN_i_c_15.BLIF CSRAM
-1 1
-.names GND.BLIF CSUART
-1 1
-.names GND.BLIF CSCTC
-1 1
-.names N_181_i_0_c.BLIF CSPIO
-1 1
-.names op_lt_un11_cspio.BLIF N_184.BLIF N_181
-11 1
-.names MMU_IN_c_4.BLIF IORQ_iZ0.BLIF N_184
-11 1
-.names MMU_IN_c_6.BLIF MMU_IN_i_0_6
-0 1
-.names MMU_IN_c_5.BLIF MMU_IN_i_0_5
-0 1
-.names MMU_IN_c_3.BLIF MMU_IN_i_0_3
-0 1
-.names MMU_IN_c_2.BLIF MMU_IN_i_0_2
-0 1
-.names MMU_IN_c_c_14.BLIF MMU_IN_i_0_14
-0 1
-.names MMU_IN_c_c_13.BLIF MMU_IN_i_0_13
-0 1
-.names op_lt_un11_csromh.BLIF op_ge_un24_csromh_i_c.BLIF un12_csromhZ0
-11 1
-.names MMU_IN_i_0_14.BLIF MMU_IN_i_0_13.BLIF N_117
-11 1
-.names MMU_IN_i_c_15.BLIF N_117.BLIF op_ge_un24_csromh
-11 1
-.names MMU_IN_i_c_15.BLIF MMU_IN_i_0_14.BLIF op_lt_un11_csromh
-11 1
-.names MMU_IN_i_0_3.BLIF MMU_IN_i_0_2.BLIF N_51
-11 1
-.names N_51.BLIF MMU_IN_i_0_5.BLIF N_54
-11 1
-.names N_54.BLIF MMU_IN_i_0_6.BLIF N_56
-11 1
-.names N_56.BLIF MMU_IN_i_0_7.BLIF op_lt_un11_cspio
-11 1
-.names N_181.BLIF N_181_i_0_c
-0 1
-.names MMU_IN_c_c_15.BLIF MMU_IN_i_c_15
-0 1
-.names un12_csromhZ0.BLIF un12_csromh_i_c
-0 1
-.names op_ge_un24_csromh.BLIF op_ge_un24_csromh_i_c
-0 1
-.names IORQ_c.BLIF IORQ_iZ0
-0 1
-.names MMU_IN_c_7.BLIF MMU_IN_i_0_7
-0 1
-.names GND
-.end
diff --git a/sw/cpld/ADDRESS_DECODER.bl1 b/sw/cpld/ADDRESS_DECODER.bl1 deleted file mode 100755 index b5f7d35..0000000 --- a/sw/cpld/ADDRESS_DECODER.bl1 +++ /dev/null @@ -1,142 +0,0 @@ -#$ TOOL ispDesignEXPERT 8.3.02.12
-#$ DATE Thu Nov 23 11:54:43 2017
-#$ MODULE address_decoder
-#$ PINS 28 MMU_IN_7_ MMU_IN_6_ MMU_IN_15_ MMU_IN_5_ MMU_IN_4_ MMU_OUT_15_ MMU_IN_3_ \
-# IORQ MMU_IN_2_ RD MMU_IN_1_ CSROML MMU_IN_0_ CSROMH MMU_OUT_14_ CSRAM MMU_OUT_13_ CSUART \
-# MMU_OUT_12_ CSCTC CSPIO MMU_IN_14_ MMU_IN_13_ MMU_IN_12_ MMU_IN_11_ MMU_IN_10_ \
-# MMU_IN_9_ MMU_IN_8_
-#$ NODES 34 op_ge_un24_csromh op_lt_un11_csromh un12_csromhZ0 N_117 N_181 \
-# op_lt_un11_cspio N_56 N_54 N_51 IORQ_iZ0 MMU_IN_i_0_7 MMU_IN_i_0_6 MMU_IN_i_0_5 \
-# MMU_IN_i_0_3 MMU_IN_i_0_2 MMU_IN_i_0_14 MMU_IN_i_0_13 MMU_IN_c_2 MMU_IN_c_3 \
-# MMU_IN_c_4 MMU_IN_c_5 MMU_IN_c_6 MMU_IN_c_7 MMU_IN_c_c_12 MMU_IN_c_c_13 \
-# MMU_IN_c_c_14 MMU_IN_c_c_15 IORQ_c op_ge_un24_csromh_i_c un12_csromh_i_c \
-# MMU_IN_i_c_15 N_181_i_0_c GND N_184
-.model address_decoder
-.inputs MMU_IN_15_.BLIF IORQ.BLIF MMU_IN_14_.BLIF MMU_IN_13_.BLIF \
-MMU_IN_12_.BLIF MMU_IN_11_.BLIF MMU_IN_10_.BLIF MMU_IN_9_.BLIF MMU_IN_8_.BLIF \
-MMU_IN_7_.BLIF MMU_IN_6_.BLIF MMU_IN_5_.BLIF MMU_IN_4_.BLIF MMU_IN_3_.BLIF \
-MMU_IN_2_.BLIF MMU_IN_1_.BLIF MMU_IN_0_.BLIF op_ge_un24_csromh.BLIF \
-op_lt_un11_csromh.BLIF un12_csromhZ0.BLIF N_117.BLIF N_181.BLIF \
-op_lt_un11_cspio.BLIF N_56.BLIF N_54.BLIF N_51.BLIF IORQ_iZ0.BLIF \
-MMU_IN_i_0_7.BLIF MMU_IN_i_0_6.BLIF MMU_IN_i_0_5.BLIF MMU_IN_i_0_3.BLIF \
-MMU_IN_i_0_2.BLIF MMU_IN_i_0_14.BLIF MMU_IN_i_0_13.BLIF MMU_IN_c_2.BLIF \
-MMU_IN_c_3.BLIF MMU_IN_c_4.BLIF MMU_IN_c_5.BLIF MMU_IN_c_6.BLIF \
-MMU_IN_c_7.BLIF MMU_IN_c_c_12.BLIF MMU_IN_c_c_13.BLIF MMU_IN_c_c_14.BLIF \
-MMU_IN_c_c_15.BLIF IORQ_c.BLIF op_ge_un24_csromh_i_c.BLIF un12_csromh_i_c.BLIF \
-MMU_IN_i_c_15.BLIF N_181_i_0_c.BLIF GND.BLIF N_184.BLIF
-.outputs MMU_OUT_15_ CSROML CSROMH CSRAM CSUART CSCTC CSPIO MMU_OUT_14_ \
-MMU_OUT_13_ MMU_OUT_12_ op_ge_un24_csromh op_lt_un11_csromh un12_csromhZ0 \
-N_117 N_181 op_lt_un11_cspio N_56 N_54 N_51 IORQ_iZ0 MMU_IN_i_0_7 MMU_IN_i_0_6 \
-MMU_IN_i_0_5 MMU_IN_i_0_3 MMU_IN_i_0_2 MMU_IN_i_0_14 MMU_IN_i_0_13 MMU_IN_c_2 \
-MMU_IN_c_3 MMU_IN_c_4 MMU_IN_c_5 MMU_IN_c_6 MMU_IN_c_7 MMU_IN_c_c_12 \
-MMU_IN_c_c_13 MMU_IN_c_c_14 MMU_IN_c_c_15 IORQ_c op_ge_un24_csromh_i_c \
-un12_csromh_i_c MMU_IN_i_c_15 N_181_i_0_c GND N_184
-.names MMU_IN_i_c_15.BLIF N_117.BLIF op_ge_un24_csromh
-11 1
-.names MMU_IN_i_c_15.BLIF MMU_IN_i_0_14.BLIF op_lt_un11_csromh
-11 1
-.names op_lt_un11_csromh.BLIF op_ge_un24_csromh_i_c.BLIF un12_csromhZ0
-11 1
-.names MMU_IN_i_0_14.BLIF MMU_IN_i_0_13.BLIF N_117
-11 1
-.names op_lt_un11_cspio.BLIF N_184.BLIF N_181
-11 1
-.names N_56.BLIF MMU_IN_i_0_7.BLIF op_lt_un11_cspio
-11 1
-.names N_54.BLIF MMU_IN_i_0_6.BLIF N_56
-11 1
-.names N_51.BLIF MMU_IN_i_0_5.BLIF N_54
-11 1
-.names MMU_IN_i_0_3.BLIF MMU_IN_i_0_2.BLIF N_51
-11 1
-.names IORQ_c.BLIF IORQ_iZ0
-0 1
-.names MMU_IN_c_7.BLIF MMU_IN_i_0_7
-0 1
-.names MMU_IN_c_6.BLIF MMU_IN_i_0_6
-0 1
-.names MMU_IN_c_5.BLIF MMU_IN_i_0_5
-0 1
-.names MMU_IN_c_3.BLIF MMU_IN_i_0_3
-0 1
-.names MMU_IN_c_2.BLIF MMU_IN_i_0_2
-0 1
-.names MMU_IN_c_c_14.BLIF MMU_IN_i_0_14
-0 1
-.names MMU_IN_c_c_13.BLIF MMU_IN_i_0_13
-0 1
-.names op_ge_un24_csromh.BLIF op_ge_un24_csromh_i_c
-0 1
-.names un12_csromhZ0.BLIF un12_csromh_i_c
-0 1
-.names MMU_IN_c_c_15.BLIF MMU_IN_i_c_15
-0 1
-.names N_181.BLIF N_181_i_0_c
-0 1
-.names GND
-.names MMU_IN_c_4.BLIF IORQ_iZ0.BLIF N_184
-11 1
-.names MMU_IN_c_c_15.BLIF MMU_OUT_15_
-1 1
-0 0
-.names op_ge_un24_csromh_i_c.BLIF CSROML
-1 1
-0 0
-.names un12_csromh_i_c.BLIF CSROMH
-1 1
-0 0
-.names MMU_IN_i_c_15.BLIF CSRAM
-1 1
-0 0
-.names GND.BLIF CSUART
-1 1
-0 0
-.names GND.BLIF CSCTC
-1 1
-0 0
-.names N_181_i_0_c.BLIF CSPIO
-1 1
-0 0
-.names MMU_IN_c_c_14.BLIF MMU_OUT_14_
-1 1
-0 0
-.names MMU_IN_c_c_13.BLIF MMU_OUT_13_
-1 1
-0 0
-.names MMU_IN_c_c_12.BLIF MMU_OUT_12_
-1 1
-0 0
-.names MMU_IN_2_.BLIF MMU_IN_c_2
-1 1
-0 0
-.names MMU_IN_3_.BLIF MMU_IN_c_3
-1 1
-0 0
-.names MMU_IN_4_.BLIF MMU_IN_c_4
-1 1
-0 0
-.names MMU_IN_5_.BLIF MMU_IN_c_5
-1 1
-0 0
-.names MMU_IN_6_.BLIF MMU_IN_c_6
-1 1
-0 0
-.names MMU_IN_7_.BLIF MMU_IN_c_7
-1 1
-0 0
-.names MMU_IN_12_.BLIF MMU_IN_c_c_12
-1 1
-0 0
-.names MMU_IN_13_.BLIF MMU_IN_c_c_13
-1 1
-0 0
-.names MMU_IN_14_.BLIF MMU_IN_c_c_14
-1 1
-0 0
-.names MMU_IN_15_.BLIF MMU_IN_c_c_15
-1 1
-0 0
-.names IORQ.BLIF IORQ_c
-1 1
-0 0
-.end
diff --git a/sw/cpld/ADDRESS_DECODER.eq0 b/sw/cpld/ADDRESS_DECODER.eq0 deleted file mode 100755 index a63d155..0000000 --- a/sw/cpld/ADDRESS_DECODER.eq0 +++ /dev/null @@ -1,193 +0,0 @@ -Edif2Blif version 8.2
-
-Design address_decoder created Thu Nov 23 11:54:43 2017
-
-
- P-Terms Fan-in Fan-out Type Name (attributes)
---------- ------ ------- ---- -----------------
- 1/1 1 1 Pin MMU_OUT_15_
- 1/1 1 1 Pin CSROML
- 1/1 1 1 Pin CSROMH
- 1/1 1 1 Pin MMU_OUT_14_
- 1/1 1 1 Pin CSRAM
- 1/1 1 1 Pin MMU_OUT_13_
- 1/1 1 1 Pin CSUART
- 1/1 1 1 Pin MMU_OUT_12_
- 1/1 1 1 Pin CSCTC
- 1/1 1 1 Pin CSPIO
- 1 2 1 Node op_ge_un24_csromh
- 1 2 1 Node op_lt_un11_csromh
- 1 2 1 Node un12_csromhZ0
- 1 2 1 Node N_117
- 1 2 1 Node N_181
- 1 2 1 Node op_lt_un11_cspio
- 1 2 1 Node N_56
- 1 2 1 Node N_54
- 1 2 1 Node N_51
- 1 1 1 Node IORQ_iZ0
- 1 1 1 Node MMU_IN_i_0_7
- 1 1 1 Node MMU_IN_i_0_6
- 1 1 1 Node MMU_IN_i_0_5
- 1 1 1 Node MMU_IN_i_0_3
- 1 1 1 Node MMU_IN_i_0_2
- 1 1 1 Node MMU_IN_i_0_14
- 1 1 1 Node MMU_IN_i_0_13
- 1/1 1 1 Node MMU_IN_c_2
- 1/1 1 1 Node MMU_IN_c_3
- 1/1 1 1 Node MMU_IN_c_4
- 1/1 1 1 Node MMU_IN_c_5
- 1/1 1 1 Node MMU_IN_c_6
- 1/1 1 1 Node MMU_IN_c_7
- 1/1 1 1 Node MMU_IN_c_c_12
- 1/1 1 1 Node MMU_IN_c_c_13
- 1/1 1 1 Node MMU_IN_c_c_14
- 1/1 1 1 Node MMU_IN_c_c_15
- 1/1 1 1 Node IORQ_c
- 1 1 1 Node op_ge_un24_csromh_i_c
- 1 1 1 Node un12_csromh_i_c
- 1 1 1 Node MMU_IN_i_c_15
- 1 1 1 Node N_181_i_0_c
- 0 0 1 Node GND
- 1 2 1 Node N_184
-=========
- 43/21 Best P-Term Total: 43
- Total Pins: 28
- Total Nodes: 34
- Average P-Term/Output: 0
-
-
-Equations:
-
-MMU_OUT_15_ = (MMU_IN_c_c_15);
-
-CSROML = (op_ge_un24_csromh_i_c);
-
-CSROMH = (un12_csromh_i_c);
-
-MMU_OUT_14_ = (MMU_IN_c_c_14);
-
-CSRAM = (MMU_IN_i_c_15);
-
-MMU_OUT_13_ = (MMU_IN_c_c_13);
-
-CSUART = (GND);
-
-MMU_OUT_12_ = (MMU_IN_c_c_12);
-
-CSCTC = (GND);
-
-CSPIO = (N_181_i_0_c);
-
-op_ge_un24_csromh = (MMU_IN_i_c_15 & N_117);
-
-op_lt_un11_csromh = (MMU_IN_i_c_15 & MMU_IN_i_0_14);
-
-un12_csromhZ0 = (op_lt_un11_csromh & op_ge_un24_csromh_i_c);
-
-N_117 = (MMU_IN_i_0_14 & MMU_IN_i_0_13);
-
-N_181 = (op_lt_un11_cspio & N_184);
-
-op_lt_un11_cspio = (N_56 & MMU_IN_i_0_7);
-
-N_56 = (N_54 & MMU_IN_i_0_6);
-
-N_54 = (N_51 & MMU_IN_i_0_5);
-
-N_51 = (MMU_IN_i_0_3 & MMU_IN_i_0_2);
-
-IORQ_iZ0 = (!IORQ_c);
-
-MMU_IN_i_0_7 = (!MMU_IN_c_7);
-
-MMU_IN_i_0_6 = (!MMU_IN_c_6);
-
-MMU_IN_i_0_5 = (!MMU_IN_c_5);
-
-MMU_IN_i_0_3 = (!MMU_IN_c_3);
-
-MMU_IN_i_0_2 = (!MMU_IN_c_2);
-
-MMU_IN_i_0_14 = (!MMU_IN_c_c_14);
-
-MMU_IN_i_0_13 = (!MMU_IN_c_c_13);
-
-MMU_IN_c_2 = (MMU_IN_2_);
-
-MMU_IN_c_3 = (MMU_IN_3_);
-
-MMU_IN_c_4 = (MMU_IN_4_);
-
-MMU_IN_c_5 = (MMU_IN_5_);
-
-MMU_IN_c_6 = (MMU_IN_6_);
-
-MMU_IN_c_7 = (MMU_IN_7_);
-
-MMU_IN_c_c_12 = (MMU_IN_12_);
-
-MMU_IN_c_c_13 = (MMU_IN_13_);
-
-MMU_IN_c_c_14 = (MMU_IN_14_);
-
-MMU_IN_c_c_15 = (MMU_IN_15_);
-
-IORQ_c = (IORQ);
-
-op_ge_un24_csromh_i_c = (!op_ge_un24_csromh);
-
-un12_csromh_i_c = (!un12_csromhZ0);
-
-MMU_IN_i_c_15 = (!MMU_IN_c_c_15);
-
-N_181_i_0_c = (!N_181);
-
-GND = (0);
-
-N_184 = (MMU_IN_c_4 & IORQ_iZ0);
-
-
-Reverse-Polarity Equations:
-
-!MMU_OUT_15_ = (!MMU_IN_c_c_15);
-
-!CSROML = (!op_ge_un24_csromh_i_c);
-
-!CSROMH = (!un12_csromh_i_c);
-
-!MMU_OUT_14_ = (!MMU_IN_c_c_14);
-
-!CSRAM = (!MMU_IN_i_c_15);
-
-!MMU_OUT_13_ = (!MMU_IN_c_c_13);
-
-!CSUART = (!GND);
-
-!MMU_OUT_12_ = (!MMU_IN_c_c_12);
-
-!CSCTC = (!GND);
-
-!CSPIO = (!N_181_i_0_c);
-
-!MMU_IN_c_2 = (!MMU_IN_2_);
-
-!MMU_IN_c_3 = (!MMU_IN_3_);
-
-!MMU_IN_c_4 = (!MMU_IN_4_);
-
-!MMU_IN_c_5 = (!MMU_IN_5_);
-
-!MMU_IN_c_6 = (!MMU_IN_6_);
-
-!MMU_IN_c_7 = (!MMU_IN_7_);
-
-!MMU_IN_c_c_12 = (!MMU_IN_12_);
-
-!MMU_IN_c_c_13 = (!MMU_IN_13_);
-
-!MMU_IN_c_c_14 = (!MMU_IN_14_);
-
-!MMU_IN_c_c_15 = (!MMU_IN_15_);
-
-!IORQ_c = (!IORQ);
-
diff --git a/sw/cpld/ADDRESS_DECODER.exf b/sw/cpld/ADDRESS_DECODER.exf deleted file mode 100755 index 02c560b..0000000 --- a/sw/cpld/ADDRESS_DECODER.exf +++ /dev/null @@ -1,33 +0,0 @@ -Section Type Array Num Name Real Name Base Number Increment
-// -------------------------------------------------------------------------------------------------
- Port 1 MMU_IN(15:0) MMU_IN 15 16 -1
- Port 2 MMU_OUT(15:12) MMU_OUT 15 4 -1
-End
-Section Member Rename Array-Notation Array Number Index
-// -------------------------------------------------------------------------------------
- Port MMU_IN_15_ MMU_IN[15] 1 0
- Port MMU_IN_14_ MMU_IN[14] 1 1
- Port MMU_IN_13_ MMU_IN[13] 1 2
- Port MMU_IN_12_ MMU_IN[12] 1 3
- Port MMU_IN_11_ MMU_IN[11] 1 4
- Port MMU_IN_10_ MMU_IN[10] 1 5
- Port MMU_IN_9_ MMU_IN[9] 1 6
- Port MMU_IN_8_ MMU_IN[8] 1 7
- Port MMU_IN_7_ MMU_IN[7] 1 8
- Port MMU_IN_6_ MMU_IN[6] 1 9
- Port MMU_IN_5_ MMU_IN[5] 1 10
- Port MMU_IN_4_ MMU_IN[4] 1 11
- Port MMU_IN_3_ MMU_IN[3] 1 12
- Port MMU_IN_2_ MMU_IN[2] 1 13
- Port MMU_IN_1_ MMU_IN[1] 1 14
- Port MMU_IN_0_ MMU_IN[0] 1 15
- Port MMU_OUT_15_ MMU_OUT[15] 2 0
- Port MMU_OUT_14_ MMU_OUT[14] 2 1
- Port MMU_OUT_13_ MMU_OUT[13] 2 2
- Port MMU_OUT_12_ MMU_OUT[12] 2 3
-End
-Section Cross Reference File
-Design 'ADDRESS_DECODER' created Thu Nov 23 11:54:43 2017
- Type New Name Original Name
-// ----------------------------------------------------------------------
-End
diff --git a/sw/cpld/ADDRESS_DECODER.naf b/sw/cpld/ADDRESS_DECODER.naf deleted file mode 100755 index 08db701..0000000 --- a/sw/cpld/ADDRESS_DECODER.naf +++ /dev/null @@ -1,28 +0,0 @@ -MMU_IN[15] i
-MMU_IN[14] i
-MMU_IN[13] i
-MMU_IN[12] i
-MMU_IN[11] i
-MMU_IN[10] i
-MMU_IN[9] i
-MMU_IN[8] i
-MMU_IN[7] i
-MMU_IN[6] i
-MMU_IN[5] i
-MMU_IN[4] i
-MMU_IN[3] i
-MMU_IN[2] i
-MMU_IN[1] i
-MMU_IN[0] i
-MMU_OUT[15] o
-MMU_OUT[14] o
-MMU_OUT[13] o
-MMU_OUT[12] o
-IORQ i
-RD i
-CSROML o
-CSROMH o
-CSRAM o
-CSUART o
-CSCTC o
-CSPIO o
diff --git a/sw/cpld/ADDRESS_DECODER.vht b/sw/cpld/ADDRESS_DECODER.vht deleted file mode 100755 index 9894b9f..0000000 --- a/sw/cpld/ADDRESS_DECODER.vht +++ /dev/null @@ -1,76 +0,0 @@ -
--- VHDL Test Bench Created from source file ADDRESS_DECODER.vhd -- 11/23/17 11:54:48
---
--- Notes:
--- 1) This testbench template has been automatically generated using types
--- std_logic and std_logic_vector for the ports of the unit under test.
--- Lattice recommends that these types always be used for the top-level
--- I/O of a design in order to guarantee that the testbench will bind
--- correctly to the timing (post-route) simulation model.
--- 2) To use this template as your testbench, change the filename to any
--- name of your choice with the extension .vhd, and use the "source->import"
--- menu in the ispDesignExpert System Project Navigator to import the testbench.
--- Then edit the user defined section below, adding code to generate the
--- stimulus for your design.
---
-LIBRARY ieee;
-LIBRARY generics;
-USE ieee.std_logic_1164.ALL;
-USE ieee.numeric_std.ALL;
-USE generics.components.ALL;
-
-ENTITY testbench IS
-END testbench;
-
-ARCHITECTURE behavior OF testbench IS
-
- COMPONENT ADDRESS_DECODER
- PORT(
- MMU_IN : IN std_logic_vector(15 downto 0);
- IORQ : IN std_logic;
- RD : IN std_logic;
- MMU_OUT : OUT std_logic_vector(15 downto 12);
- CSROML : OUT std_logic;
- CSROMH : OUT std_logic;
- CSRAM : OUT std_logic;
- CSUART : OUT std_logic;
- CSCTC : OUT std_logic;
- CSPIO : OUT std_logic
- );
- END COMPONENT;
-
- SIGNAL MMU_IN : std_logic_vector(15 downto 0);
- SIGNAL MMU_OUT : std_logic_vector(15 downto 12);
- SIGNAL IORQ : std_logic;
- SIGNAL RD : std_logic;
- SIGNAL CSROML : std_logic;
- SIGNAL CSROMH : std_logic;
- SIGNAL CSRAM : std_logic;
- SIGNAL CSUART : std_logic;
- SIGNAL CSCTC : std_logic;
- SIGNAL CSPIO : std_logic;
-
-BEGIN
-
- uut: ADDRESS_DECODER PORT MAP(
- MMU_IN => MMU_IN,
- MMU_OUT => MMU_OUT,
- IORQ => IORQ,
- RD => RD,
- CSROML => CSROML,
- CSROMH => CSROMH,
- CSRAM => CSRAM,
- CSUART => CSUART,
- CSCTC => CSCTC,
- CSPIO => CSPIO
- );
-
-
--- *** Test Bench - User Defined Section ***
- tb : PROCESS
- BEGIN
- wait; -- will wait forever
- END PROCESS;
--- *** End Test Bench - User Defined Section ***
-
-END;
diff --git a/sw/cpld/address_decoder.STY b/sw/cpld/address_decoder.STY deleted file mode 100755 index e9ce747..0000000 --- a/sw/cpld/address_decoder.STY +++ /dev/null @@ -1,2 +0,0 @@ -[STRATEGY-LIST]
-Normal=True, 1506346678
diff --git a/sw/cpld/address_decoder.b2_ b/sw/cpld/address_decoder.b2_ deleted file mode 100755 index 432d996..0000000 --- a/sw/cpld/address_decoder.b2_ +++ /dev/null @@ -1 +0,0 @@ - -collapse all -pterms 16 -nfanlimit 32 -cluster 5 -reduce bypin choose -xorsyn
diff --git a/sw/cpld/address_decoder.bl2 b/sw/cpld/address_decoder.bl2 deleted file mode 100755 index b5f7d35..0000000 --- a/sw/cpld/address_decoder.bl2 +++ /dev/null @@ -1,142 +0,0 @@ -#$ TOOL ispDesignEXPERT 8.3.02.12
-#$ DATE Thu Nov 23 11:54:43 2017
-#$ MODULE address_decoder
-#$ PINS 28 MMU_IN_7_ MMU_IN_6_ MMU_IN_15_ MMU_IN_5_ MMU_IN_4_ MMU_OUT_15_ MMU_IN_3_ \
-# IORQ MMU_IN_2_ RD MMU_IN_1_ CSROML MMU_IN_0_ CSROMH MMU_OUT_14_ CSRAM MMU_OUT_13_ CSUART \
-# MMU_OUT_12_ CSCTC CSPIO MMU_IN_14_ MMU_IN_13_ MMU_IN_12_ MMU_IN_11_ MMU_IN_10_ \
-# MMU_IN_9_ MMU_IN_8_
-#$ NODES 34 op_ge_un24_csromh op_lt_un11_csromh un12_csromhZ0 N_117 N_181 \
-# op_lt_un11_cspio N_56 N_54 N_51 IORQ_iZ0 MMU_IN_i_0_7 MMU_IN_i_0_6 MMU_IN_i_0_5 \
-# MMU_IN_i_0_3 MMU_IN_i_0_2 MMU_IN_i_0_14 MMU_IN_i_0_13 MMU_IN_c_2 MMU_IN_c_3 \
-# MMU_IN_c_4 MMU_IN_c_5 MMU_IN_c_6 MMU_IN_c_7 MMU_IN_c_c_12 MMU_IN_c_c_13 \
-# MMU_IN_c_c_14 MMU_IN_c_c_15 IORQ_c op_ge_un24_csromh_i_c un12_csromh_i_c \
-# MMU_IN_i_c_15 N_181_i_0_c GND N_184
-.model address_decoder
-.inputs MMU_IN_15_.BLIF IORQ.BLIF MMU_IN_14_.BLIF MMU_IN_13_.BLIF \
-MMU_IN_12_.BLIF MMU_IN_11_.BLIF MMU_IN_10_.BLIF MMU_IN_9_.BLIF MMU_IN_8_.BLIF \
-MMU_IN_7_.BLIF MMU_IN_6_.BLIF MMU_IN_5_.BLIF MMU_IN_4_.BLIF MMU_IN_3_.BLIF \
-MMU_IN_2_.BLIF MMU_IN_1_.BLIF MMU_IN_0_.BLIF op_ge_un24_csromh.BLIF \
-op_lt_un11_csromh.BLIF un12_csromhZ0.BLIF N_117.BLIF N_181.BLIF \
-op_lt_un11_cspio.BLIF N_56.BLIF N_54.BLIF N_51.BLIF IORQ_iZ0.BLIF \
-MMU_IN_i_0_7.BLIF MMU_IN_i_0_6.BLIF MMU_IN_i_0_5.BLIF MMU_IN_i_0_3.BLIF \
-MMU_IN_i_0_2.BLIF MMU_IN_i_0_14.BLIF MMU_IN_i_0_13.BLIF MMU_IN_c_2.BLIF \
-MMU_IN_c_3.BLIF MMU_IN_c_4.BLIF MMU_IN_c_5.BLIF MMU_IN_c_6.BLIF \
-MMU_IN_c_7.BLIF MMU_IN_c_c_12.BLIF MMU_IN_c_c_13.BLIF MMU_IN_c_c_14.BLIF \
-MMU_IN_c_c_15.BLIF IORQ_c.BLIF op_ge_un24_csromh_i_c.BLIF un12_csromh_i_c.BLIF \
-MMU_IN_i_c_15.BLIF N_181_i_0_c.BLIF GND.BLIF N_184.BLIF
-.outputs MMU_OUT_15_ CSROML CSROMH CSRAM CSUART CSCTC CSPIO MMU_OUT_14_ \
-MMU_OUT_13_ MMU_OUT_12_ op_ge_un24_csromh op_lt_un11_csromh un12_csromhZ0 \
-N_117 N_181 op_lt_un11_cspio N_56 N_54 N_51 IORQ_iZ0 MMU_IN_i_0_7 MMU_IN_i_0_6 \
-MMU_IN_i_0_5 MMU_IN_i_0_3 MMU_IN_i_0_2 MMU_IN_i_0_14 MMU_IN_i_0_13 MMU_IN_c_2 \
-MMU_IN_c_3 MMU_IN_c_4 MMU_IN_c_5 MMU_IN_c_6 MMU_IN_c_7 MMU_IN_c_c_12 \
-MMU_IN_c_c_13 MMU_IN_c_c_14 MMU_IN_c_c_15 IORQ_c op_ge_un24_csromh_i_c \
-un12_csromh_i_c MMU_IN_i_c_15 N_181_i_0_c GND N_184
-.names MMU_IN_i_c_15.BLIF N_117.BLIF op_ge_un24_csromh
-11 1
-.names MMU_IN_i_c_15.BLIF MMU_IN_i_0_14.BLIF op_lt_un11_csromh
-11 1
-.names op_lt_un11_csromh.BLIF op_ge_un24_csromh_i_c.BLIF un12_csromhZ0
-11 1
-.names MMU_IN_i_0_14.BLIF MMU_IN_i_0_13.BLIF N_117
-11 1
-.names op_lt_un11_cspio.BLIF N_184.BLIF N_181
-11 1
-.names N_56.BLIF MMU_IN_i_0_7.BLIF op_lt_un11_cspio
-11 1
-.names N_54.BLIF MMU_IN_i_0_6.BLIF N_56
-11 1
-.names N_51.BLIF MMU_IN_i_0_5.BLIF N_54
-11 1
-.names MMU_IN_i_0_3.BLIF MMU_IN_i_0_2.BLIF N_51
-11 1
-.names IORQ_c.BLIF IORQ_iZ0
-0 1
-.names MMU_IN_c_7.BLIF MMU_IN_i_0_7
-0 1
-.names MMU_IN_c_6.BLIF MMU_IN_i_0_6
-0 1
-.names MMU_IN_c_5.BLIF MMU_IN_i_0_5
-0 1
-.names MMU_IN_c_3.BLIF MMU_IN_i_0_3
-0 1
-.names MMU_IN_c_2.BLIF MMU_IN_i_0_2
-0 1
-.names MMU_IN_c_c_14.BLIF MMU_IN_i_0_14
-0 1
-.names MMU_IN_c_c_13.BLIF MMU_IN_i_0_13
-0 1
-.names op_ge_un24_csromh.BLIF op_ge_un24_csromh_i_c
-0 1
-.names un12_csromhZ0.BLIF un12_csromh_i_c
-0 1
-.names MMU_IN_c_c_15.BLIF MMU_IN_i_c_15
-0 1
-.names N_181.BLIF N_181_i_0_c
-0 1
-.names GND
-.names MMU_IN_c_4.BLIF IORQ_iZ0.BLIF N_184
-11 1
-.names MMU_IN_c_c_15.BLIF MMU_OUT_15_
-1 1
-0 0
-.names op_ge_un24_csromh_i_c.BLIF CSROML
-1 1
-0 0
-.names un12_csromh_i_c.BLIF CSROMH
-1 1
-0 0
-.names MMU_IN_i_c_15.BLIF CSRAM
-1 1
-0 0
-.names GND.BLIF CSUART
-1 1
-0 0
-.names GND.BLIF CSCTC
-1 1
-0 0
-.names N_181_i_0_c.BLIF CSPIO
-1 1
-0 0
-.names MMU_IN_c_c_14.BLIF MMU_OUT_14_
-1 1
-0 0
-.names MMU_IN_c_c_13.BLIF MMU_OUT_13_
-1 1
-0 0
-.names MMU_IN_c_c_12.BLIF MMU_OUT_12_
-1 1
-0 0
-.names MMU_IN_2_.BLIF MMU_IN_c_2
-1 1
-0 0
-.names MMU_IN_3_.BLIF MMU_IN_c_3
-1 1
-0 0
-.names MMU_IN_4_.BLIF MMU_IN_c_4
-1 1
-0 0
-.names MMU_IN_5_.BLIF MMU_IN_c_5
-1 1
-0 0
-.names MMU_IN_6_.BLIF MMU_IN_c_6
-1 1
-0 0
-.names MMU_IN_7_.BLIF MMU_IN_c_7
-1 1
-0 0
-.names MMU_IN_12_.BLIF MMU_IN_c_c_12
-1 1
-0 0
-.names MMU_IN_13_.BLIF MMU_IN_c_c_13
-1 1
-0 0
-.names MMU_IN_14_.BLIF MMU_IN_c_c_14
-1 1
-0 0
-.names MMU_IN_15_.BLIF MMU_IN_c_c_15
-1 1
-0 0
-.names IORQ.BLIF IORQ_c
-1 1
-0 0
-.end
diff --git a/sw/cpld/address_decoder.bl3 b/sw/cpld/address_decoder.bl3 deleted file mode 100755 index 70065ad..0000000 --- a/sw/cpld/address_decoder.bl3 +++ /dev/null @@ -1,52 +0,0 @@ -#$ TOOL ispDesignEXPERT 8.3.02.12
-#$ DATE Thu Nov 23 11:54:43 2017
-#$ MODULE address_decoder
-#$ PINS 21 MMU_IN_7_ MMU_IN_6_ MMU_IN_15_ MMU_IN_5_ MMU_IN_4_ MMU_OUT_15_ MMU_IN_3_ \
-# IORQ MMU_IN_2_ CSROML CSROMH MMU_OUT_14_ CSRAM MMU_OUT_13_ CSUART MMU_OUT_12_ CSCTC \
-# CSPIO MMU_IN_14_ MMU_IN_13_ MMU_IN_12_
-.model address_decoder
-.inputs MMU_IN_15_.BLIF IORQ.BLIF MMU_IN_14_.BLIF MMU_IN_13_.BLIF \
-MMU_IN_12_.BLIF MMU_IN_7_.BLIF MMU_IN_6_.BLIF MMU_IN_5_.BLIF MMU_IN_4_.BLIF \
-MMU_IN_3_.BLIF MMU_IN_2_.BLIF
-.outputs MMU_OUT_15_ CSROML CSROMH CSRAM CSUART CSCTC CSPIO MMU_OUT_14_ \
-MMU_OUT_13_ MMU_OUT_12_
-.names MMU_IN_15_.BLIF MMU_OUT_15_
-1 1
-0 0
-.names MMU_IN_15_.BLIF MMU_IN_14_.BLIF MMU_IN_13_.BLIF CSROML
--1- 1
-1-- 1
---1 1
-000 0
-.names MMU_IN_15_.BLIF MMU_IN_14_.BLIF MMU_IN_13_.BLIF CSROMH
---0 1
--1- 1
-1-- 1
-001 0
-.names MMU_IN_15_.BLIF CSRAM
-0 1
-1 0
-.names CSUART
- 0
-.names CSCTC
- 0
-.names IORQ.BLIF MMU_IN_7_.BLIF MMU_IN_6_.BLIF MMU_IN_5_.BLIF MMU_IN_4_.BLIF \
-MMU_IN_3_.BLIF MMU_IN_2_.BLIF CSPIO
------1- 1
-----0-- 1
----1--- 1
---1---- 1
--1----- 1
-1------ 1
-------1 1
-0000100 0
-.names MMU_IN_14_.BLIF MMU_OUT_14_
-1 1
-0 0
-.names MMU_IN_13_.BLIF MMU_OUT_13_
-1 1
-0 0
-.names MMU_IN_12_.BLIF MMU_OUT_12_
-1 1
-0 0
-.end
diff --git a/sw/cpld/address_decoder.d0 b/sw/cpld/address_decoder.d0 deleted file mode 100755 index cb8545c..0000000 --- a/sw/cpld/address_decoder.d0 +++ /dev/null @@ -1 +0,0 @@ - -dev mach4_DT_NCE -cluster 5
diff --git a/sw/cpld/address_decoder.data b/sw/cpld/address_decoder.data deleted file mode 100755 index a01c4bd..0000000 --- a/sw/cpld/address_decoder.data +++ /dev/null @@ -1,240 +0,0 @@ -MODELDATA
-MODELDATA_VERSION "1.0";
-DESIGN "address_decoder";
-DATE "Mon Nov 13 11:47:14 2017";
-VENDOR "Lattice Semiconductor Co. Ltd.";
-PROGRAM "STAMP Model Generator";
-
-/* port drive, max transition and max capacitance */
-PORTDATA
-MMU_IN_2: MAXTRANS(0.0);
-MMU_IN_3: MAXTRANS(0.0);
-MMU_IN_4: MAXTRANS(0.0);
-MMU_IN_5: MAXTRANS(0.0);
-MMU_IN_6: MAXTRANS(0.0);
-MMU_IN_7: MAXTRANS(0.0);
-MMU_IN_8: MAXTRANS(0.0);
-MMU_IN_9: MAXTRANS(0.0);
-MMU_IN_10: MAXTRANS(0.0);
-MMU_IN_11: MAXTRANS(0.0);
-MMU_IN_12: MAXTRANS(0.0);
-MMU_IN_13: MAXTRANS(0.0);
-MMU_IN_14: MAXTRANS(0.0);
-MMU_IN_15: MAXTRANS(0.0);
-CSCTC: MAXTRANS(0.0);
-CSPIO: MAXTRANS(0.0);
-CSRAM: MAXTRANS(0.0);
-CSROMH: MAXTRANS(0.0);
-CSROML: MAXTRANS(0.0);
-CSUART: MAXTRANS(0.0);
-MMU_OUT_12: MAXTRANS(0.0);
-MMU_OUT_13: MAXTRANS(0.0);
-MMU_OUT_14: MAXTRANS(0.0);
-MMU_OUT_15: MAXTRANS(0.0);
-ENDPORTDATA
-
-/* timing arc data */
-TIMINGDATA
-
-ARCDATA
-MMU_IN_2_CSUART_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_3_CSUART_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_4_CSUART_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_5_CSUART_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_6_CSUART_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_7_CSUART_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_8_CSCTC_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_8_CSPIO_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_8_CSUART_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_9_CSCTC_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_9_CSPIO_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_9_CSUART_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_10_CSCTC_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_10_CSPIO_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_10_CSUART_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_11_CSCTC_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_11_CSPIO_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_11_CSUART_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_12_CSCTC_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ARCDATA
-MMU_IN_12_CSPIO_delay:
-CELL_RISE(scalar) {
-VALUES(15.0);
-}
-CELL_FALL(scalar) {
-VALUES(15.0);
-}
-ENDARCDATA
-
-ENDTIMINGDATA
-ENDMODELDATA
diff --git a/sw/cpld/address_decoder.edi b/sw/cpld/address_decoder.edi deleted file mode 100755 index d0d8378..0000000 --- a/sw/cpld/address_decoder.edi +++ /dev/null @@ -1,367 +0,0 @@ -@Eq6wVJKxL#xTixT#_x2#aLiL
-q6wVVK lbD7wLLpFtL
-p6LVLKqkwVV1[tL
-p6L.LfVb G vq6B.LfVb k Vq1[LVtp
-t6LDLddyvLDL
-6LfLd dw
-VL7LLLLdLw6TMdVBvLMsFmpsLLsLFsn5sQL5LtnL
-LLLL6Ldv9yLb" 7TB e1ww,dL eCN7
-"LtLLLLBL 6 bvO"MTLB 17 w"K[LV6w bD"75LNNpnt"
-tLLLL
-LLttL
-L6LVLVH d17LveM9vLsL
-6LVLKqkwVV1[tL
-pLLLLV6edb917 bLOy6M7 hxVwV7Kwwbdt7tLL
-LLeLV6L1J1F8LxV61e 1BgzV#Li8C#
-2LtLLLL6L[LfwLVwBM [Lw6gV fLB8Vk#CgtT
-gLLLLLLLLwL76 dKVVv
-eLLLLLLLLLL6L BdbLL6a qVwwebda7ULUggj
-tLtLLLLLLLL6LBLdbL LC6p qVwwebdC78LgjtULtL
-LLLLLLLLBLb6L Cd6sqLVwe bd7w8LjCtUtgL
-LLLLLLtL
-LLLLLLLtLL
-LL
-LLtLL6L1e1VSLUC6ueL1Vg1V LB8z##2itCL
-LLLLLLw6V[Bf LLw6MV[fwBgV #Lg8TkgCLtL
-LLLLLL6LdwV7v eKLVL
-LLLLLLLLBLb6L adqLw6e dV7wLbgajUtUtgL
-LLLLLLLLLLb6 BCdpLqLw6e dV7wLbjCU8tg
-tLLLLLLLL
-LLtLLLLtL
-LLLLLLtL
-6LeL1VL1lCL8V61e 1BgzV#Li8C#
-2LtLLLL6L[LfwLVwBM [Lw6gV fLB8Vk#CgtT
-gLLLLLLLLwL76 dKVVv
-eLLLLLLLLLL6L BdbLL6a qVwwebda7ULUggj
-tLtLLLLLLLL6LBLdbL LC6p qVwwebdC78LgjtULtL
-LLLLLLtLL
-LLLLLLLtL
-tL
-LLLLLV61ea1SLLU6u1e1VBgV #L8zC#2iLtL
-LLLL[Lw6LVBfM Lww6V[ fBg8V#LCgTk
-gLtLLLLLLLL76dwKVv
-eLVLLLLLLLL6LBLdbL 6aqLVwe bd7wULgagjtULtL
-LLLLLLLLBLb6L Cd6pqLVwe bd7w8LjCtUtgL
-LLLLLLtL
-LLLLLLLtLL
-LL
-LLt
-LLt1Lw6vh f bL
- L.LL6LwVKq[kVVp1tLL
-LLdLV67eb9O1 b7Ly6VM hKxwVd7wwLbt7LtL
-6LeL1VL1xJixT#_T2xa#ixL#V61e 1BgzV#Li8C#
-2LtLLLL6L[LfwLV9hvVb[ wLv61V[fwBgV #Lg8TkgCLtL
-LLLLLL6LdwV7v eKLVL
-LLLLLLLLBLb6L 6d vv 6 LvVM7GVGLCU8_GLG"CU8_56:s"ptt(LtsqLw6e dV7wLbjCU8tg
-tLLLLLLLLLL6L BdbvL 6 LvV67 VvLMUG_GgaLUG"UGU_ga56:sts"FQttLqLw6e dV7wLbgajUtUtgL
-LLLLLLLLLLb6 BCdaLLi6] qVwwebdC78LgjtULtL
-LLLLLLLLBLb6L id6xqLVwe bd7w8LjCtUtgL
-LLLLLLLLLLb6 B2dTLGikaqLw6e dV7wLbgajUtUtgL
-LLLLLLLLLLb6 B2dTLGi)aqLw6e dV7wLbgajUtUtgL
-LLLLLLLLLLb6 B2dTLGiLJw6 qdVweLba7jUUgtg
-tLLLLLLLLLL6L BdbTLU2gJLiw6 qdVweLba7jUUgtg
-tLLLLLLLLLL6L BdbTL22Lg62 qVwwebda7ULUggj
-tLtLLLLLLLL6LBLdbL j2CT6aqLVwe bd7wULgagjtULtL
-LLLLLLtLL
-LLLLLL6LeLdbV7D7
-dLLLLLLLL6LwLd7vDV7LeUG_GZCp8FZL_w6V[VfKi LwB6MeL1Vi1LVCKuSLUw6h1 vKiLVeM9vtsttLLLLLLLLtL
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-LLLLLLLLL6LwLd7vDV7LeUG_GZCp85ZL_w6V[VfKi LwB6MeL1Vi1LVCKuSLUw6h1 vKiLVeM9vtsttLLLLLLLLtL
-LLLLLLLLL6LwLd7vDV7LeUG_GZCp8(ZL_w6V[VfKi LwB6MeL1Vi1LVCKuSLUw6h1 vKiLVeM9vtsttLLLLLLLLtL
-LLLLLLLLL6LwLd7vDV7LeUG_GZCp8mZL_w6V[VfKi LwB6MeL1Vi1LVCKuSLUw6h1 vKiLVeM9vtsttLLLLLLLLtL
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-LLLLLLLLL6LwLd7vDV7LeUG_GgaZU_psZ6F[LfwiVLVBKM LwV61eV1KiSLUa6u1L wvhi V MKvLset9LtLtLLLLLLLLLtL
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-LLLLLLLL76Dw7devGVGLaUU_pgZZ5_Lsw6V[VfKi LwB6MeL1Vi1LVaKuSLUw6h1 vKiLVeM9vtsttLLLLLLLLtL
-LLLLLLLLL6LwLd7vDV7LeiC]aLZ6pV[fwKiLVwBM eLV6i1V1CKSLLU6uh1 w vi LVMK9vsettLtLLLLLLLL
-LLtLLLLLLLLwL76vD7dLe2VaTGipkLZw6V[VfKi LwB6MeL1Vi1LVaKuSLUw6h1 vKiLVeM9vtsttLLLLLLLLtL
-LLLLLLLLL6LwLd7vDV7Lei2aTZGp)[Lw6iVVfBK LLw6M1e1VKiLVUauS1Lw6vh V KivLeMt9tsLtLLLLLLLLtLL
-LLLLLLLL6LDwd7evV7TLi2ZJpG[Lw6iVVfBK LLw6M1e1VKiLVUauS1Lw6vh V KivLeMt9tsLtLLLLLLLLtLL
-LLLLLLLL6LDwd7evV7TLU2gJZi6p[LfwiVLVBKM LwV61eV1KiSLUa6u1L wvhi V MKvLset9LtLtLLLLLLLLLtL
-LLLLLLLL76Dw7dev2VTL22Zg6p[LfwiVLVBKM LwV61eV1KiSLUa6u1L wvhi V MKvLset9LtLtLLLLLLLLLtL
-LLLLLLLL76Dw7dev2VTLajZC6p[LfwiVLVBKM LwV61eV1KiSLUa6u1L wvhi V MKvLset9LtLtLLLLLLLLLtL
-LLLLLLLL76Dw7devyV7L_Fe(wDbB[Lw6iVVfBK LLw6M1e1VKiLVxJF81Lw6vh V KivLeMt9tsLtLLLLLLLLtLL
-LLLLLLLL6LDwd7evV77LFye(D_bB_wszP_6Q[LfwiVLVBKM LwV61eV1Ki8LxJ6F1L wvhi V MKvLset9LtLtLLLLLLLLLtL
-LLLLLLLL76Dw7devGVGLCU8___(w[Lw6iVVfBK LLw6M1e1VKiLVlCL8w6h1 vKiLVeM9vtsttLLLLLLLLtL
-LLLLLLLLL6LwLd7vDV7LeUG_G_Cw8L_65V[fwKiLVwBM eLV6i1V1CK8L6l1L wvhi V MKvLset9LtLtLLLLLLLLLtL
-LLLLLLLL76Dw7devGVGLCU8___nw[Lw6iVVfBK LLw6M1e1VKiLVlCL8w6h1 vKiLVeM9vtsttLLLLLLLLtL
-LLLLLLLLL6LwLd7vDV7LeUG_G_Cw8L_6FV[fwKiLVwBM eLV6i1V1CK8L6l1L wvhi V MKvLset9LtLtLLLLLLLLLtL
-LLLLLLLL76Dw7devGVGLCU8___sw6Q[LfwiVLVBKM LwV61eV1Ki8LlC1Lw6vh V KivLeMt9tsLtLLLLLLLLtLL
-LLLLLLLL6LDwd7evV7GLUG8__Cswn_[Lw6iVVfBK LLw6M1e1VKiLVlCL8w6h1 vKiLVeM9vtsttLLLLLLLLtL
-LLLLLLLLL6LwLd7vDV7LesyF7D_ e9bLMw6V[VfKi LwB6MeL1Vi1LVJKF8Lxw6h1 vKiLVeM9vtsttLLLLLLLLtL
-LLLLLLLLL6LwLd7vDV7Leszs_6([LfwiVLVBKM LwV61eV1Ki8LxJ6F1L wvhi V MKvLset9LtLtLLLLLLLLLtL
-LLLLLLLL76Dw7devzV_LPsLsw6V[VfKi LwB6MeL1Vi1LVJKF8Lxw6h1 vKiLVeM9vtsttLLLLLLLLtL
-LLLLLLLLL6LwLd7vDV7Leszm_6o[LfwiVLVBKM LwV61eV1Ki8LxJ6F1L wvhi V MKvLset9LtLtLLLLLLLLLtL
-LLLLLLLL76Dw7devzV_LLQ6oV[fwKiLVwBM eLV6i1V1JK8LLx6Fh1 w vi LVMK9vsettLtLLLLLLLL
-LLtLLLLLLLLwL76vD7dLezVn_L5w6V[VfKi LwB6MeL1Vi1LVJKF8Lxw6h1 vKiLVeM9vtsttLLLLLLLLtL
-LLLLLLLLL6LwLd7vDV7Le5z5_[Lw6iVVfBK LLw6M1e1VKiLVxJF81Lw6vh V KivLeMt9tsLtLLLLLLLLtLL
-LLLLLLLL6LDwd7evV7_L5z6m[LfwiVLVBKM LwV61eV1Ki8LxJ6F1L wvhi V MKvLset9LtLtLLLLLLLLLtL
-LLLLLLLL76Dw7dev8V_Lss_P6w[LfwiVLVBKM LwV61eV1Ki8LlC1Lw6vh V KivLeMt9tsLtLLLLLLLLtLL
-LLLLLLLL6LDwd7evV7GLUG8__Csw5_[Lw6iVVfBK LLw6M1e1VKiLVlCL8w6h1 vKiLVeM9vtsttLLLLLLLLtL
-LLLLLLLLL6LwLd7vDV7LesyF7D_ e9b_M6w[LfwiVLVBKM LwV61eV1Ki8LlC1Lw6vh V KivLeMt9tsLtLLLLLLLLtLL
-LLLLLLLL6LDwd7evV7BL_b_OyVQ7_F ebD_Mw9[Lw6iVVfBK LLw6M1e1VKiLVlCL8w6h1 vKiLVeM9vtsttLLLLLLLLtL
-LLLLLLLLL6LwLd7vDV7LeiC]aL_6wV[fwKiLVwBM eLV6i1V1CK8L6l1L wvhi V MKvLset9LtLtLLLLLLLLLtL
-LLLLLLLL76Dw7devGVGLCU8___mw[Lw6iVVfBK LLw6M1e1VKiLVlCL8w6h1 vKiLVeM9vtsttLLLLLLLLtL
-LLLLLLLLL6L7LLVbdOBV_7_FyeQD_M 9bALb6Vwq7L
-LLLLLLLLLLb6 BVdKiLL6aDwd7evV7KiLVszs_tP
-tLLLLLLLLLL6L BdbKiLVLC6pDwd7evV7KiLV_bOByV7__FeQbDM w9t_LtL
-LLLLLLLL
-tLtLLLLLLLL7LV6bdBLd__1sys7D_ e9bLMb6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVzKm_os
-tLtLLLLLLLL6LBLdbi LVCK6pwLd7vDV7ieLVyKF7_s ebDtMt9L
-LLLLLLLLtLLtL
-LLLLLLLLV6d77LsyeFD_M 9bLZ6pwA7b
-VLqLLLLLLLL6LBLdbi LVaKwL76vD7dieVVyK7L_seFbDM t9
-tLLLLLLLLLL6L BdbKiLVLC6pDwd7evV7KiLVsyF7D_ e9b_Mtw
-tLLLLLLLLtLtLL
-LLLLLLLL6Ld7LVs8s_6mAL7bVwLqL
-LLLLLLLLBLb6i VdaKLL76Dw7devVVKi_Lsztst(L
-LLLLLLLLLLb6 BVdKisLLC76Dw7devVVKi_LsztstPL
-LLLLLLLLtLLtL
-LLLLLLLLV6d7_Ls8LP6swA7b
-VLqLLLLLLLL6LBLdbi LVaKwL76vD7dieVVyK7L_Fe(wDbB
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-LLLLLLLLtLLtL
-LLLLLLLLV6d7BL_b_1yds7_sBewD6bAL7bVwLqL
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-LLLLLLLLV6d7_L586(AL7bVwLqL
-LLLLLLLLBLb6i VdaKLL76Dw7devVVKi_L5zt5
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-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVzKn_t5LtL
-LLLLLLLLBLb6i VdCKpLwL76vD7dieVVzK_Lt5t5L
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-LLLLLLLLBLb6i VdaKLL76Dw7devVVKi_LQzto
-tLLLLLLLLLL6L BdbKiLVLC6pDwd7evV7KiLV5zn_
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVCd]a_ipwLZb6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVCK]a_itw
-tLLLLLLLLLL6L BdbKiLVLC6sDwd7evV7KiLVFy(7D_Be_wzbP_Qs
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVGd_GCUw8__mpL_b6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVGK_GCUw8__tm
-tLLLLLLLLLL6L BdbKiLVLC6sDwd7evV7KiLV5zm_
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVGd_GCUw8__(pL_b6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVGK_GCUw8__t(
-tLLLLLLLLLL6L BdbKiLVLC6sDwd7evV7KiLV5z5_
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVGd_GCUw8__5pL_b6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVGK_GCUw8__t5
-tLLLLLLLLLL6L BdbKiLVLC6sDwd7evV7KiLV5zn_
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVGd_GCUw8__npL_b6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVGK_GCUw8__tn
-tLLLLLLLLLL6L BdbKiLVLC6pDwd7evV7KiLVQzo_
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVGd_GCUw8__FpL_b6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVGK_GCUw8__tF
-tLLLLLLLLLL6L BdbKiLVLC6sDwd7evV7KiLVQzo_
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-tLLLLLLLL6L7LLVGd_GCUw8__spQ_ALb6Vwq7L
-LLLLLLLLLLb6 BVdKiLL6aDwd7evV7KiLVUG_G_Cw8Q_tsLtL
-LLLLLLLLBLb6i VdCKsLwL76vD7dieVVzK_LostmLtL
-LLLLLLLLBLb6i VdCKpLwL76vD7dieVVzK_L(stsLtL
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-tLtLLLLLLLL7LV6GdGLCU8___pwn_Lsb6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVGK_GCUw8__tstnL
-LLLLLLLLLLb6 BVdKisLLC76Dw7devVVKi_Lsztst(L
-LLLLLLLLtLLtL
-LLLLLLLLV6d7GLUG8__C6pAL7bVwLqL
-LLLLLLLLBLb6i Vd6KMLhVVMG GLCU8_5LtsLtL
-LLLLLLLL
-tLtLLLLLLLL7LV6GdGLCU8_L_6swA7b
-VLqLLLLLLLL6LBLdbi LV6KMMhVLVG _GCUs8QL
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVGd_GCUe8__6FAL7bVwLqL
-LLLLLLLLBLb6i VdaKLL76Dw7devVVKiGLUG8_ZC_pFZ
-tLtLLLLLLLL6LBLdbi LVCK6pwLd7vDV7ieLVGK_GCUw8__tF
-tLLLLLLLLtLtLL
-LLLLLLLL6Ld7LVUG_G_CF8ALb6Vwq7L
-LLLLLLLLLLb6 BVdKiMLV6VM hGLUG8_LCtstnL
-LLLLLLLLLLb6 BVdKipLLC76Dw7devVVKiGLUG8_ZC_pFZ
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVGd_GCUe8__6nAL7bVwLqL
-LLLLLLLLBLb6i VdaKLL76Dw7devVVKiGLUG8_ZC_pnZ
-tLtLLLLLLLL6LBLdbi LVCK6pwLd7vDV7ieLVGK_GCUw8__tn
-tLLLLLLLLtLtLL
-LLLLLLLL6Ld7LVUG_G_Cn8ALb6Vwq7L
-LLLLLLLLLLb6 BVdKiMLV6VM hGLUG8_LCtstFL
-LLLLLLLLLLb6 BVdKipLLC76Dw7devVVKiGLUG8_ZC_pnZ
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVGd_GCUe8__6QAL7bVwLqL
-LLLLLLLLBLb6i VdaKLL76Dw7devVVKiGLUG8_ZC_pQZ
-tLtLLLLLLLL6LBLdbi LVCK6pwLd7vDV7ieLVyK(7_FBewDzb__QstPLtL
-LLLLLLLL
-tLtLLLLLLLL7LV6GdGLCU8_L_6QwA7b
-VLqLLLLLLLL6LBLdbi LV6KMMhVLVG _GCUs8sL
-tLtLLLLLLLL6LBLdbi LVCK6pwLd7vDV7ieLVGK_GCUp8ZZt_tQL
-LLLLLLLLtLLtL
-LLLLLLLLV6d7GLUG8__C5eL_b6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVGK_GCUp8ZZt_t5L
-LLLLLLLLLLb6 BVdKipLLC76Dw7devVVKiGLUG8__C5wt_LtL
-LLLLLLLL
-tLtLLLLLLLL7LV6GdGLCU8_L_65wA7b
-VLqLLLLLLLL6LBLdbi LV6KMMhVLVG _GCUs8pL
-tLtLLLLLLLL6LBLdbi LVCK6pwLd7vDV7ieLVGK_GCUp8ZZt_t5L
-LLLLLLLLtLLtL
-LLLLLLLLV6d7GLUG8__C(eL_b6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVGK_GCUp8ZZt_t(L
-LLLLLLLLLLb6 BVdKipLLC76Dw7devVVKiGLUG8__C(wt_LtL
-LLLLLLLL
-tLtLLLLLLLL7LV6GdGLCU8_L_6(wA7b
-VLqLLLLLLLL6LBLdbi LV6KMMhVLVG _GCUo8tLLtL
-LLLLLLLLBLb6i VdCKpLwL76vD7dieVVGKGLCU8_ZZ_pt(
-tLLLLLLLLtLtLL
-LLLLLLLL6Ld7LVUG_G_Ce8L_6mwA7b
-VLqLLLLLLLL6LBLdbi LVaKwL76vD7dieVVGKGLCU8_ZZ_ptm
-tLLLLLLLLLL6L BdbKiLVLC6pDwd7evV7KiLVUG_G_Cw8t_tmL
-LLLLLLLLtLLtL
-LLLLLLLLV6d7GLUG8__C6mAL7bVwLqL
-LLLLLLLLBLb6i Vd6KMLhVVMG GLCU8_tLtPL
-LLLLLLLLLLb6 BVdKipLLC76Dw7devVVKiGLUG8_ZC_pmZ
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVGd_GCUP8L_b6wAq7
-VLLLLLLLLLL6L BdbKiLVV6MM hLVUG_GLCm8
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVGd_GCUo8L_b6wAq7
-VLLLLLLLLLL6L BdbKiLVV6MM hLVUG_GLC(8
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVGd_GCUs8p_ALb6Vwq7L
-LLLLLLLLLLb6 BVdKiMLV6VM hGLUG8_LCt5
-tLLLLLLLLtLtLL
-LLLLLLLL6Ld7LVUG_G_Cs86sAL7bVwLqL
-LLLLLLLLBLb6i Vd6KMLhVVMG GLCU8_tLtQL
-LLLLLLLLtLLtL
-LLLLLLLLV6d7GLUG8__CLs6FwA7b
-VLqLLLLLLLL6LBLdbi LV6KMMhVLVG _GCUn8tLLtL
-LLLLLLLLBLb6i VdCKpLwL76vD7dieVVGKGLCU8_ZZ_ptstFL
-LLLLLLLLtLLtL
-LLLLLLLLV6d7GLUG8__CLs6nwA7b
-VLqLLLLLLLL6LBLdbi LV6KMMhVLVG _GCUF8tLLtL
-LLLLLLLLBLb6i VdCKpLwL76vD7dieVVGKGLCU8_ZZ_ptstnL
-LLLLLLLLtLLtL
-LLLLLLLLV6d7GLUG8__CLs6QwA7b
-VLqLLLLLLLL6LBLdbi LV6KMMhVLVG _GCUs8tLLtL
-LLLLLLLLBLb6i VdCKpLwL76vD7dieVVGKGLCU8_ZZ_ptstQL
-LLLLLLLLtLLtL
-LLLLLLLLV6d7GLUG8__CLs65wA7b
-VLqLLLLLLLL6LBLdbi LV6KMMhVLVG _GCUp8tLLtL
-LLLLLLLLBLb6i VdCKpLwL76vD7dieVVGKGLCU8_ZZ_ptst5L
-LLLLLLLLtLLtL
-LLLLLLLLV6d7GLUG8__Cee__Ls6FwA7b
-VLqLLLLLLLL6LBLdbi LVaKwL76vD7dieVVGKGLCU8_ZZ_ptstFL
-LLLLLLLLLLb6 BVdKipLLC76Dw7devVVKiGLUGU_gaZZ_ptstFL
-LLLLLLLLtLLtL
-LLLLLLLLV6d7GLUGU_gaF_Lsb6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVGK_GaUZUpgsZF_
-tLtLLLLLLLL6LBLdbi LV6KMMhVLVG _GaULUng
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVGd_GCUe8__sen_ALb6Vwq7L
-LLLLLLLLLLb6 BVdKiLL6aDwd7evV7KiLVUG_GZCp8sZn_
-tLtLLLLLLLL6LBLdbi LVCK6pwLd7vDV7ieLVGK_GCUw8__tstnL
-LLLLLLLLLLb6 BVdKipLLC76Dw7devVVKiGLUGU_gaZZ_ptstnL
-LLLLLLLLtLLtL
-LLLLLLLLV6d7GLUGU_gan_Lsb6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVGK_GaUZUpgsZn_
-tLtLLLLLLLL6LBLdbi LV6KMMhVLVG _GaULUFg
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVGd_GCUe8__seQ_ALb6Vwq7L
-LLLLLLLLLLb6 BVdKiLL6aDwd7evV7KiLVUG_GZCp8sZQ_
-tLtLLLLLLLL6LBLdbi LVCK6pwLd7vDV7ieLVGK_GCUw8__tstQL
-LLLLLLLLLLb6 BVdKipLLC76Dw7devVVKiGLUGU_gaZZ_ptstQL
-LLLLLLLLtLLtL
-LLLLLLLLV6d7GLUGU_gaQ_Lsb6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVGK_GaUZUpgsZQ_
-tLtLLLLLLLL6LBLdbi LV6KMMhVLVG _GaULUsg
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVGd_GCUe8__se5_ALb6Vwq7L
-LLLLLLLLLLb6 BVdKiLL6aDwd7evV7KiLVUG_GZCp8sZ5_
-tLtLLLLLLLL6LBLdbi LVCK6pwLd7vDV7ieLVGK_GCUw8__tst5L
-LLLLLLLLLLb6 BVdKipLLC76Dw7devVVKiGLUGU_gaZZ_ptst5L
-LLLLLLLLtLLtL
-LLLLLLLLV6d7GLUGU_ga5_Lsb6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVGK_GaUZUpgsZ5_
-tLtLLLLLLLL6LBLdbi LV6KMMhVLVG _GaULUpg
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVCd]a_i6eAL7bVwLqL
-LLLLLLLLBLb6i VdaKLL76Dw7devVVKiaLiCp]tZLtL
-LLLLLLLLBLb6i VdCKpLwL76vD7dieVVCKaL_iw]
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVCd]aLib6wAq7
-VLLLLLLLLLL6L BdbKiLViC]aLtL
-LLLLLLLLBLb6i VdCKpLwL76vD7dieVVCKaLZip]
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVid6xAL7bVwLqL
-LLLLLLLLBLb6i VdiKxLLtL
-LLLLLLLL
-tLtLLLLLLLL7LV6bdBLV__OFyQ7D_ e9b_MewL_b6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVbKOBV_7_FyeQD_M 9bt_twL
-LLLLLLLLLLb6 BVdKisLLC76Dw7devVVKi7LsyeFD_M 9b
-tLtLLLLLLLL6LBLdbi LVCK6pwLd7vDV7ieLV2KaTGipktZLtL
-LLLLLLLL
-tLtLLLLLLLL7LV62dTLGikaALb6Vwq7L
-LLLLLLLLLLb6 BVdKiLL6aDwd7evV7KiLVi2aTZGpk
-tLtLLLLLLLL6LBLdbi LV2KaTGi
-kLtLLLLLLLLtL
-tLLLLLLLL6L7LLVydF7_s ebD_Mw9L_6ewA7b
-VLqLLLLLLLL6LBLdbi LVaKwL76vD7dieVVyK7L_seFbDM w9t_LtL
-LLLLLLLLBLb6i VdCKpLwL76vD7dieVV2KTLGi)atZtpL
-LLLLLLLLtLLtL
-LLLLLLLLV6d7TLi2)aLGb6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLV2KaTGip)tZLtL
-LLLLLLLLBLb6i Vd2KTLGi)aLtL
-LLLLLLLL
-tLtLLLLLLLL7LV6GdGLCU8___ew5_Lsb6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVGK_GCUw8__tst5L
-LLLLLLLLLLb6 BVdKipLLC76Dw7devVVKi_LsztmtoL
-LLLLLLLLLLb6 BVdKipLLC76Dw7devVVKi_LsztstPL
-LLLLLLLLLLb6 BVdKipLLC76Dw7devVVKiTLi2ZJpG
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLV2dJTGiALb6Vwq7L
-LLLLLLLLLLb6 BVdKiLL6aDwd7evV7KiLVi2JTpGtZLtL
-LLLLLLLLBLb6i Vd2KTLGitJL
-LLLLLLLLtLLtL
-LLLLLLLLV6d7TLU2gJLib6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLV2KJTiUpgtZLtL
-LLLLLLLLBLb6i Vd2KTLiUgJLtL
-LLLLLLLL
-tLtLLLLLLLL7LV62dTL22Lgb6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLV2KgT22tZtpL
-LLLLLLLLLLb6 BVdKiTL22tg
-2LLLLLLLLtLtLL
-LLLLLLLL6Ld7LVs8P_ws__epL_b6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLV8KP_sst_twL
-LLLLLLLLLLb6 BVdKipLLC76Dw7devVVKiTLj2ZCpa
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLV2dCTajALb6Vwq7L
-LLLLLLLLLLb6 BVdKiLL6aDwd7evV7KiLVj2CTpatZLtL
-LLLLLLLLBLb6i Vd2KTLajtCL
-LLLLLLLLtLLtL
-LLLLLLLLV6d78LxzALb6Vwq7L
-LLLLLLLLLLb6 BVdKipLLC76Dw7devVVKiTL22Zgp2
-tLtLLLLLLLL6LBLdbi LVCK6pwLd7vDV7ieLV2KJTiUpgtZLtL
-LLLLLLLL
-tLtLLLLLLLL7LV68d_LQsLPb6wAq7
-VLLLLLLLLLL6L BdbKiLV6awLd7vDV7ieLVyK(7_FBewDzb__QstPLtL
-LLLLLLLLBLb6i VdCKsLwL76vD7dieVVyK7L_Fe(wDbB
-tLtLLLLLLLLtL
-tLLLLLLLL6L7LLVldL262wA7b
-VLqLLLLLLLLtL
-tLLLLLLLL
-LLtLLLLtL
-LLLLLLtL
-LtL
-V6Dq7wLOxJixT#_T2xa#ixL#V61eV1KixLxJTiT##_2x#aix1Lw6vh V KibL ft.tt
-
-
-t
\ No newline at end of file diff --git a/sw/cpld/address_decoder.eq3 b/sw/cpld/address_decoder.eq3 deleted file mode 100755 index 8eb8577..0000000 --- a/sw/cpld/address_decoder.eq3 +++ /dev/null @@ -1,49 +0,0 @@ - ispDesignEXPERT 8.3.02.12
-
-Design address_decoder created Thu Nov 23 11:54:43 2017
-
-
- P-Terms Fan-in Fan-out Type Name (attributes)
---------- ------ ------- ---- -----------------
- 1 1 1 Pin MMU_OUT_15_
- 1 3 1 Pin CSROML-
- 1 3 1 Pin CSROMH-
- 1 1 1 Pin MMU_OUT_14_
- 1 1 1 Pin CSRAM
- 1 1 1 Pin MMU_OUT_13_
- 0 0 1 Pin CSUART
- 1 1 1 Pin MMU_OUT_12_
- 0 0 1 Pin CSCTC
- 1 7 1 Pin CSPIO-
-=========
- 8 P-Term Total: 8
- Total Pins: 21
- Total Nodes: 0
- Average P-Term/Output: 0
-
-
-Equations:
-
-MMU_OUT_15_ = (MMU_IN_15_);
-
-!CSROML = (!MMU_IN_15_ & !MMU_IN_14_ & !MMU_IN_13_);
-
-!CSROMH = (!MMU_IN_15_ & !MMU_IN_14_ & MMU_IN_13_);
-
-MMU_OUT_14_ = (MMU_IN_14_);
-
-CSRAM = (!MMU_IN_15_);
-
-MMU_OUT_13_ = (MMU_IN_13_);
-
-CSUART = (0);
-
-MMU_OUT_12_ = (MMU_IN_12_);
-
-CSCTC = (0);
-
-!CSPIO = (!IORQ & !MMU_IN_7_ & !MMU_IN_6_ & !MMU_IN_5_ & MMU_IN_4_ & !MMU_IN_3_ & !MMU_IN_2_);
-
-
-Reverse-Polarity Equations:
-
diff --git a/sw/cpld/address_decoder.fti b/sw/cpld/address_decoder.fti deleted file mode 100755 index b762b12..0000000 --- a/sw/cpld/address_decoder.fti +++ /dev/null @@ -1,90 +0,0 @@ -#PLAFILE address_decoder.tt4
-#DATE 09/25/2017
-#DESIGN <no design name>
-#DEVICE mach432
-
-DATA LOCATION CSCTC:B_12_28 // OUT
-DATA LOCATION CSPIO:B_8_29 // OUT
-DATA LOCATION CSRAM:B_13_26 // OUT
-DATA LOCATION CSROMH:B_10_25 // OUT
-DATA LOCATION CSROML:B_14_24 // OUT
-DATA LOCATION CSUART:B_9_27 // OUT
-DATA LOCATION IORQ:B_*_30 // INP
-DATA LOCATION MMU_IN_12_:A_*_18 // INP
-DATA LOCATION MMU_IN_13_:A_*_19 // INP
-DATA LOCATION MMU_IN_14_:A_*_20 // INP
-DATA LOCATION MMU_IN_15_:A_*_21 // INP
-DATA LOCATION MMU_IN_2_:A_*_7 // INP
-DATA LOCATION MMU_IN_3_:A_*_6 // INP
-DATA LOCATION MMU_IN_4_:A_*_5 // INP
-DATA LOCATION MMU_IN_5_:A_*_4 // INP
-DATA LOCATION MMU_IN_6_:A_*_3 // INP
-DATA LOCATION MMU_IN_7_:A_*_2 // INP
-DATA LOCATION MMU_OUT_12_:B_0_39 // OUT
-DATA LOCATION MMU_OUT_13_:B_4_38 // OUT
-DATA LOCATION MMU_OUT_14_:B_1_37 // OUT
-DATA LOCATION MMU_OUT_15_:B_5_36 // OUT
-DATA IO_DIR CSCTC:OUT
-DATA IO_DIR CSPIO:OUT
-DATA IO_DIR CSRAM:OUT
-DATA IO_DIR CSROMH:OUT
-DATA IO_DIR CSROML:OUT
-DATA IO_DIR CSUART:OUT
-DATA IO_DIR IORQ:IN
-DATA IO_DIR MMU_IN_12_:IN
-DATA IO_DIR MMU_IN_13_:IN
-DATA IO_DIR MMU_IN_14_:IN
-DATA IO_DIR MMU_IN_15_:IN
-DATA IO_DIR MMU_IN_2_:IN
-DATA IO_DIR MMU_IN_3_:IN
-DATA IO_DIR MMU_IN_4_:IN
-DATA IO_DIR MMU_IN_5_:IN
-DATA IO_DIR MMU_IN_6_:IN
-DATA IO_DIR MMU_IN_7_:IN
-DATA IO_DIR MMU_OUT_12_:OUT
-DATA IO_DIR MMU_OUT_13_:OUT
-DATA IO_DIR MMU_OUT_14_:OUT
-DATA IO_DIR MMU_OUT_15_:OUT
-DATA PW_LEVEL MMU_IN_7_:0
-DATA SLEW MMU_IN_7_:0
-DATA PW_LEVEL MMU_IN_6_:0
-DATA SLEW MMU_IN_6_:0
-DATA PW_LEVEL MMU_IN_15_:0
-DATA SLEW MMU_IN_15_:0
-DATA PW_LEVEL MMU_IN_5_:0
-DATA SLEW MMU_IN_5_:0
-DATA PW_LEVEL MMU_IN_4_:0
-DATA SLEW MMU_IN_4_:0
-DATA PW_LEVEL MMU_OUT_15_:0
-DATA SLEW MMU_OUT_15_:0
-DATA PW_LEVEL MMU_IN_3_:0
-DATA SLEW MMU_IN_3_:0
-DATA PW_LEVEL IORQ:0
-DATA SLEW IORQ:0
-DATA PW_LEVEL MMU_IN_2_:0
-DATA SLEW MMU_IN_2_:0
-DATA PW_LEVEL CSROML:0
-DATA SLEW CSROML:0
-DATA PW_LEVEL CSROMH:0
-DATA SLEW CSROMH:0
-DATA PW_LEVEL MMU_OUT_14_:0
-DATA SLEW MMU_OUT_14_:0
-DATA PW_LEVEL CSRAM:0
-DATA SLEW CSRAM:0
-DATA PW_LEVEL MMU_OUT_13_:0
-DATA SLEW MMU_OUT_13_:0
-DATA PW_LEVEL CSUART:0
-DATA SLEW CSUART:0
-DATA PW_LEVEL MMU_OUT_12_:0
-DATA SLEW MMU_OUT_12_:0
-DATA PW_LEVEL CSCTC:0
-DATA SLEW CSCTC:0
-DATA PW_LEVEL CSPIO:0
-DATA SLEW CSPIO:0
-DATA PW_LEVEL MMU_IN_14_:0
-DATA SLEW MMU_IN_14_:0
-DATA PW_LEVEL MMU_IN_13_:0
-DATA SLEW MMU_IN_13_:0
-DATA PW_LEVEL MMU_IN_12_:0
-DATA SLEW MMU_IN_12_:0
-END
diff --git a/sw/cpld/address_decoder.grp b/sw/cpld/address_decoder.grp deleted file mode 100755 index eb72f1f..0000000 --- a/sw/cpld/address_decoder.grp +++ /dev/null @@ -1,3 +0,0 @@ -
-GROUP MACH_SEG_B CSPIO CSROML CSROMH MMU_OUT_12_ MMU_OUT_14_ MMU_OUT_13_
- CSRAM MMU_OUT_15_ CSUART CSCTC
\ No newline at end of file diff --git a/sw/cpld/address_decoder.jed b/sw/cpld/address_decoder.jed deleted file mode 100755 index dcf247b..0000000 --- a/sw/cpld/address_decoder.jed +++ /dev/null @@ -1,288 +0,0 @@ -|--------------------------------------------|
-|- ispDesignExpert Fitter Report File -|
-|- Version 8.3.02.12_DE_HDL_BASE -|
-|- (c)Copyright, Lattice Semiconductor 1999 -|
-|--------------------------------------------|
-
-
-TITLE:
-AUTHOR:
-PATTERN:
-COMPANY:
-REVISION:
-DATE: Thu Nov 23 11:55:45 2017
-
-ABEL mach432
- *
-QP44*
-QF16160*
-G0*F0*
-NOTE Part Number : M4-32/32-15JC *
-NOTE Handling of Preplacements No Change *
-NOTE Use placement data from address_decoder.vct *
-NOTE Global clocks routable as PT clocks? N *
-NOTE 22V10/MACH1XX/2XX S/R Compatibility? Y *
-NOTE SET/RESET treated as DONT_CARE? N *
-NOTE Reduce Unforced Global Clocks? N *
-NOTE Iterate between partitioning and place/route? Y *
-NOTE Balanced partitioning? Y *
-NOTE Reduce Routes Per Placement? N *
-NOTE Spread Placement? Y *
-NOTE Run Time Upper Bound in 15 minutes 0 *
-NOTE Table of pin names and numbers*
-NOTE PINS MMU_IN_7_:2 MMU_IN_6_:3 MMU_IN_15_:21 MMU_IN_5_:4*
-NOTE PINS MMU_IN_4_:5 MMU_OUT_15_:36:66 MMU_IN_3_:6 IORQ:30*
-NOTE PINS MMU_IN_2_:7 CSROML:24:75 CSROMH:25:71 MMU_OUT_14_:37:62*
-NOTE PINS CSRAM:26:74 MMU_OUT_13_:38:65 CSUART:27:70 MMU_OUT_12_:39:61*
-NOTE PINS CSCTC:28:73 CSPIO:29:69 MMU_IN_14_:20 MMU_IN_13_:19*
-NOTE PINS MMU_IN_12_:18 *
-NOTE Table of node names and numbers*
-NOTE Interleaved Central Switch Matrices for BLOCKS 0 and 1 *
-L000000
- 101111111111101110111111111111101111111111111111111111111111111111 11101110101011
- 111011111111111011101011101111111111111111111111111111111111111111 11111111111111
- 111111111111111111111111111111111111101111111111111111111111111111 11111111111111
- 111111111111111111111111111011111111111111111111111111111111111111 11111111111111
- 111111111111111111111111111111111111111111111111111111111111111111 11111111111111
- 111111111111111111111111111111111111111111111111111111111111111111 11101110101011*
-NOTE Non-CSM fuses for BLOCK 0 *
-L000480
- 000000000000000000000000000000000000000000000000000000000000000000 11111111111111*
-L000560 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L000640 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L000720 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L000800 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L000880 111111111111111111111111111111111111111111111111111111111111111111 11010011111110*
-L000960
- 000000000000000000000000000000000000000000000000000000000000000000 11111111111111*
-L001040 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L001120 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L001200 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L001280 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L001360 111111111111111111111111111111111111111111111111111111111111111111 11111011111110*
-L001440
- 000000000000000000000000000000000000000000000000000000000000000000 11111111111111*
-L001520 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L001600 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L001680 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L001760 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L001840 111111111111111111111111111111111111111111111111111111111111111111 11110111111110*
-L001920
- 000000000000000000000000000000000000000000000000000000000000000000 11111111111111*
-L002000 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L002080 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L002160 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L002240 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L002320 111111111111111111111111111111111111111111111111111111111111111111 11111111111110*
-L002400
- 000000000000000000000000000000000000000000000000000000000000000000 11111111111111*
-L002480 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L002560 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L002640 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L002720 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L002800 111111111111111111111111111111111111111111111111111111111111111111 11110011111110*
-L002880
- 000000000000000000000000000000000000000000000000000000000000000000 11111111111111*
-L002960 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L003040 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L003120 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L003200 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L003280 111111111111111111111111111111111111111111111111111111111111111111 11111011111110*
-L003360
- 000000000000000000000000000000000000000000000000000000000000000000 11111111111111*
-L003440 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L003520 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L003600 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L003680 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L003760 111111111111111111111111111111111111111111111111111111111111111111 11110111111110*
-L003840
- 000000000000000000000000000000000000000000000000000000000000000000 11111111111111*
-L003920 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L004000 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L004080 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L004160 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L004240 111111111111111111111111111111111111111111111111111111111111111111 11111111111110*
-L004320
- 000000000000000000000000000000000000000000000000000000000000000000 11111111111111*
-L004400 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L004480 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L004560 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L004640 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L004720 111111111111111111111111111111111111111111111111111111111111111111 11110011111110*
-L004800
- 000000000000000000000000000000000000000000000000000000000000000000 11111111111111*
-L004880 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L004960 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L005040 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L005120 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
-L005200 111111111111111111111111111111111111111111111111111111111111111111 11111011111110*
-L005280
- 000000000000000000000000000000000000000000000000000000000000000000 11111111111111*
-L005360 111111111111111111111111111111111111111111111111111111111111111111 11111111111111*
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diff --git a/sw/cpld/address_decoder.jhd b/sw/cpld/address_decoder.jhd deleted file mode 100755 index f17745e..0000000 --- a/sw/cpld/address_decoder.jhd +++ /dev/null @@ -1,3 +0,0 @@ -
-
-MODULE ADDRESS_DECODER
diff --git a/sw/cpld/address_decoder.jid b/sw/cpld/address_decoder.jid deleted file mode 100755 index 2de560b..0000000 --- a/sw/cpld/address_decoder.jid +++ /dev/null @@ -1 +0,0 @@ -. ADDRESS_DECODER address_decoder.vhd c:\_prossn\cpld.nao\address_decoder.vhd
diff --git a/sw/cpld/address_decoder.l0 b/sw/cpld/address_decoder.l0 deleted file mode 100755 index 9624ee4..0000000 --- a/sw/cpld/address_decoder.l0 +++ /dev/null @@ -1 +0,0 @@ - -ck Min -ce On -ar On -ap On -oe On -split 16 -cluster 5 -xor on -speed -ifb yes -sr no
diff --git a/sw/cpld/address_decoder.log b/sw/cpld/address_decoder.log deleted file mode 100755 index cd0a45f..0000000 --- a/sw/cpld/address_decoder.log +++ /dev/null @@ -1,46 +0,0 @@ -|--------------------------------------------|
-|- ispDesignExpert Fitter Report File -|
-|- Version 8.3.02.12_DE_HDL_BASE -|
-|- (c)Copyright, Lattice Semiconductor 1999 -|
-|--------------------------------------------|
-
-
-
-*** Source file is address_decoder.tt4 . Device is M4-32/32-15JC .
-
-<Note> F35109: For this device, all input pairing is ignored since input
- registers or latches do not exist. All signals must pass
- through the central switch matrix before being latched or
- registered.
-<Note> F40016: 0 pins have been reserved out of 34 .
-<Note> F40021: 34 pins are available after reservation, 21 are required
- by the design.
-<Note> F35065: For outputs, implicit output enables will be set to VCC.
-
-*** End of Pla2db.
-Check preplaced pins/nodes
-Check preplaced blocks
-Check unreferenced pins/nodes
-Check clock rules
-
-List of non-global clocks:
- None.
-
-*** End of Normalization.
-
-*** End of DRC.
-
-*** Start Partitioning
-
-*** Partitioning successful.
-
-
-*** Starting Place&Route
-
-*** Place&Route Successful
-*** The JEDEC file generated is address_decoder.jed .
-*** Report Generator invoked.
-*** Report Generator end.
-
-// Fitting successful.
-// ERROR count 0 WARNING count 0 .
diff --git a/sw/cpld/address_decoder.mod b/sw/cpld/address_decoder.mod deleted file mode 100755 index 8724fa0..0000000 --- a/sw/cpld/address_decoder.mod +++ /dev/null @@ -1,58 +0,0 @@ -MODEL
-MODEL_VERSION "1.0";
-DESIGN "address_decoder";
-DATE "Mon Nov 13 11:47:14 2017";
-VENDOR "Lattice Semiconductor Co. Ltd.";
-PROGRAM "STAMP Model Generator";
-
-/* port name and type */
-INPUT MMU_IN_2;
-INPUT MMU_IN_3;
-INPUT MMU_IN_4;
-INPUT MMU_IN_5;
-INPUT MMU_IN_6;
-INPUT MMU_IN_7;
-INPUT MMU_IN_8;
-INPUT MMU_IN_9;
-INPUT MMU_IN_10;
-INPUT MMU_IN_11;
-INPUT MMU_IN_12;
-INPUT MMU_IN_13;
-INPUT MMU_IN_14;
-INPUT MMU_IN_15;
-OUTPUT CSCTC;
-OUTPUT CSPIO;
-OUTPUT CSRAM;
-OUTPUT CSROMH;
-OUTPUT CSROML;
-OUTPUT CSUART;
-OUTPUT MMU_OUT_12;
-OUTPUT MMU_OUT_13;
-OUTPUT MMU_OUT_14;
-OUTPUT MMU_OUT_15;
-
-/* timing arc definitions */
-MMU_IN_2_CSUART_delay: DELAY MMU_IN_2 CSUART;
-MMU_IN_3_CSUART_delay: DELAY MMU_IN_3 CSUART;
-MMU_IN_4_CSUART_delay: DELAY MMU_IN_4 CSUART;
-MMU_IN_5_CSUART_delay: DELAY MMU_IN_5 CSUART;
-MMU_IN_6_CSUART_delay: DELAY MMU_IN_6 CSUART;
-MMU_IN_7_CSUART_delay: DELAY MMU_IN_7 CSUART;
-MMU_IN_8_CSCTC_delay: DELAY MMU_IN_8 CSCTC;
-MMU_IN_8_CSPIO_delay: DELAY MMU_IN_8 CSPIO;
-MMU_IN_8_CSUART_delay: DELAY MMU_IN_8 CSUART;
-MMU_IN_9_CSCTC_delay: DELAY MMU_IN_9 CSCTC;
-MMU_IN_9_CSPIO_delay: DELAY MMU_IN_9 CSPIO;
-MMU_IN_9_CSUART_delay: DELAY MMU_IN_9 CSUART;
-MMU_IN_10_CSCTC_delay: DELAY MMU_IN_10 CSCTC;
-MMU_IN_10_CSPIO_delay: DELAY MMU_IN_10 CSPIO;
-MMU_IN_10_CSUART_delay: DELAY MMU_IN_10 CSUART;
-MMU_IN_11_CSCTC_delay: DELAY MMU_IN_11 CSCTC;
-MMU_IN_11_CSPIO_delay: DELAY MMU_IN_11 CSPIO;
-MMU_IN_11_CSUART_delay: DELAY MMU_IN_11 CSUART;
-MMU_IN_12_CSCTC_delay: DELAY MMU_IN_12 CSCTC;
-MMU_IN_12_CSPIO_delay: DELAY MMU_IN_12 CSPIO;
-
-/* timing check arc definitions */
-
-ENDMODEL
diff --git a/sw/cpld/address_decoder.nrp b/sw/cpld/address_decoder.nrp deleted file mode 100755 index 6b40d36..0000000 --- a/sw/cpld/address_decoder.nrp +++ /dev/null @@ -1,17 +0,0 @@ -ispDesignExpert 8.3.02.12_DE_HDL_BASE Copyright ©, 1992-1999,
-Lattice Semiconductor Corporation, All Rights Reserved
-
-Output Files:
- Netlist File: address_decoder.vho
- Delay File: address_decoder.sdf
-
-Parsing C:\ISPTOOLS\ISPSYS/dat/sdf.mdl
-Input file: c:\_prossn\cpld\address_decoder.tte
-Reading library information ...
-Mapping to combinational gates
-Mapping to netlist view.
-Utilization Estimate
- Combinational Macros: 27
- Flip-Flop and Latch Macros: 0
- I/O Pads: 24
-Elapsed time: 1 seconds
diff --git a/sw/cpld/address_decoder.out b/sw/cpld/address_decoder.out deleted file mode 100755 index 163d8a9..0000000 --- a/sw/cpld/address_decoder.out +++ /dev/null @@ -1,437 +0,0 @@ -
-19 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 80 CSRAM 0 0 0 -1 -1 2 0 21
- 83 CSPIO 0 0 0 -1 -1 1 0 21
- 82 CSCTC 0 1 0 -1 -1 1 0 21
- 81 CSUART 0 0 0 -1 -1 1 0 21
- 79 CSROML 0 1 0 -1 -1 1 0 21
- 78 CSROMH 0 1 0 -1 -1 1 0 21
- 93 PA_5_ 1 -1 -1 2 0 1 -1 -1
- 92 PA_6_ 1 -1 -1 2 0 1 -1 -1
- 91 PA_7_ 1 -1 -1 2 0 1 -1 -1
- 90 PA_8_ 1 -1 -1 2 0 1 -1 -1
- 89 PA_9_ 1 -1 -1 2 0 1 -1 -1
- 88 PA_10_ 1 -1 -1 2 0 1 -1 -1
- 87 PA_11_ 1 -1 -1 2 0 1 -1 -1
- 86 PA_12_ 1 -1 -1 2 0 1 -1 -1
- 85 PA_13_ 1 -1 -1 2 0 1 -1 -1
- 84 PA_14_ 1 -1 -1 2 0 1 -1 -1
- 77 PA_15_ 1 -1 -1 2 0 1 -1 -1
- 95 PA_3_ 1 -1 -1 1 0 -1 -1
- 94 PA_4_ 1 -1 -1 1 0 -1 -1
-19 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 80 CSRAM 0 0 0 -1 -1 2 0 21
- 83 CSPIO 0 0 0 -1 -1 1 0 21
- 82 CSCTC 0 1 0 -1 -1 1 0 21
- 81 CSUART 0 0 0 -1 -1 1 0 21
- 79 CSROML 0 1 0 -1 -1 1 0 21
- 78 CSROMH 0 1 0 -1 -1 1 0 21
- 93 PA_5_ 1 -1 -1 2 0 1 -1 -1
- 92 PA_6_ 1 -1 -1 2 0 1 -1 -1
- 91 PA_7_ 1 -1 -1 2 0 1 -1 -1
- 90 PA_8_ 1 -1 -1 2 0 1 -1 -1
- 89 PA_9_ 1 -1 -1 2 0 1 -1 -1
- 88 PA_10_ 1 -1 -1 2 0 1 -1 -1
- 87 PA_11_ 1 -1 -1 2 0 1 -1 -1
- 86 PA_12_ 1 -1 -1 2 0 1 -1 -1
- 85 PA_13_ 1 -1 -1 2 0 1 -1 -1
- 84 PA_14_ 1 -1 -1 2 0 1 -1 -1
- 77 PA_15_ 1 -1 -1 2 0 1 -1 -1
- 95 PA_3_ 1 -1 -1 1 0 -1 -1
- 94 PA_4_ 1 -1 -1 1 0 -1 -1
-22 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 28 CSPIO 0 1 0 28 -1 3 0 21
- 25 CSRAM 0 1 0 25 -1 2 0 21
- 27 CSCTC 0 1 0 27 -1 1 0 21
- 26 CSUART 0 1 0 26 -1 1 0 21
- 24 CSROMH 0 1 0 24 -1 1 0 21
- 23 CSROML 0 1 0 23 -1 1 0 21
- 20 PA_15_ 1 -1 -1 1 1 20 -1
- 19 PA_14_ 1 -1 -1 1 1 19 -1
- 18 PA_13_ 1 -1 -1 1 1 18 -1
- 17 PA_12_ 1 -1 -1 1 1 17 -1
- 16 PA_11_ 1 -1 -1 1 1 16 -1
- 15 PA_10_ 1 -1 -1 1 1 15 -1
- 14 PA_9_ 1 -1 -1 1 1 14 -1
- 13 PA_8_ 1 -1 -1 1 1 13 -1
- 8 PA_0_ 1 -1 -1 1 1 8 -1
- 7 PA_1_ 1 -1 -1 1 1 7 -1
- 6 PA_2_ 1 -1 -1 1 1 6 -1
- 5 PA_3_ 1 -1 -1 1 1 5 -1
- 4 PA_4_ 1 -1 -1 1 1 4 -1
- 3 PA_5_ 1 -1 -1 1 1 3 -1
- 2 PA_6_ 1 -1 -1 1 1 2 -1
- 1 PA_7_ 1 -1 -1 1 1 1 -1
-26 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 28 CSPIO 0 1 0 28 -1 3 0 21
- 25 CSRAM 0 1 0 25 -1 2 0 21
- 38 MMU_OUT_12_ 0 1 0 38 -1 1 0 21
- 37 MMU_OUT_13_ 0 1 0 37 -1 1 0 21
- 36 MMU_OUT_14_ 0 1 0 36 -1 1 0 21
- 35 MMU_OUT_15_ 0 1 0 35 -1 1 0 21
- 27 CSCTC 0 1 0 27 -1 1 0 21
- 26 CSUART 0 1 0 26 -1 1 0 21
- 24 CSROMH 0 1 0 24 -1 1 0 21
- 23 CSROML 0 1 0 23 -1 1 0 21
- 20 MMU_IN_15_ 1 -1 -1 1 1 20 -1
- 19 MMU_IN_14_ 1 -1 -1 1 1 19 -1
- 18 MMU_IN_13_ 1 -1 -1 1 1 18 -1
- 17 MMU_IN_12_ 1 -1 -1 1 1 17 -1
- 16 MMU_IN_11_ 1 -1 -1 1 1 16 -1
- 15 MMU_IN_10_ 1 -1 -1 1 1 15 -1
- 14 MMU_IN_9_ 1 -1 -1 1 1 14 -1
- 13 MMU_IN_8_ 1 -1 -1 1 1 13 -1
- 8 MMU_IN_0_ 1 -1 -1 1 1 8 -1
- 7 MMU_IN_1_ 1 -1 -1 1 1 7 -1
- 6 MMU_IN_2_ 1 -1 -1 1 1 6 -1
- 5 MMU_IN_3_ 1 -1 -1 1 1 5 -1
- 4 MMU_IN_4_ 1 -1 -1 1 1 4 -1
- 3 MMU_IN_5_ 1 -1 -1 1 1 3 -1
- 2 MMU_IN_6_ 1 -1 -1 1 1 2 -1
- 1 MMU_IN_7_ 1 -1 -1 1 1 1 -1
-26 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 28 CSPIO 0 1 0 28 -1 3 0 21
- 25 CSRAM 0 1 0 25 -1 2 0 21
- 38 MMU_OUT_12_ 0 1 0 38 -1 1 0 21
- 37 MMU_OUT_13_ 0 1 0 37 -1 1 0 21
- 36 MMU_OUT_14_ 0 1 0 36 -1 1 0 21
- 35 MMU_OUT_15_ 0 1 0 35 -1 1 0 21
- 27 CSCTC 0 1 0 27 -1 1 0 21
- 26 CSUART 0 1 0 26 -1 1 0 21
- 24 CSROMH 0 1 0 24 -1 1 0 21
- 23 CSROML 0 1 0 23 -1 1 0 21
- 20 MMU_IN_15_ 1 -1 -1 1 1 20 -1
- 19 MMU_IN_14_ 1 -1 -1 1 1 19 -1
- 18 MMU_IN_13_ 1 -1 -1 1 1 18 -1
- 17 MMU_IN_12_ 1 -1 -1 1 1 17 -1
- 16 MMU_IN_11_ 1 -1 -1 1 1 16 -1
- 15 MMU_IN_10_ 1 -1 -1 1 1 15 -1
- 14 MMU_IN_9_ 1 -1 -1 1 1 14 -1
- 13 MMU_IN_8_ 1 -1 -1 1 1 13 -1
- 8 MMU_IN_0_ 1 -1 -1 1 1 8 -1
- 7 MMU_IN_1_ 1 -1 -1 1 1 7 -1
- 6 MMU_IN_2_ 1 -1 -1 1 1 6 -1
- 5 MMU_IN_3_ 1 -1 -1 1 1 5 -1
- 4 MMU_IN_4_ 1 -1 -1 1 1 4 -1
- 3 MMU_IN_5_ 1 -1 -1 1 1 3 -1
- 2 MMU_IN_6_ 1 -1 -1 1 1 2 -1
- 1 MMU_IN_7_ 1 -1 -1 1 1 1 -1
-26 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 28 CSPIO 0 1 0 28 -1 3 0 21
- 25 CSRAM 0 1 0 25 -1 2 0 21
- 38 MMU_OUT_12_ 0 1 0 38 -1 1 0 21
- 37 MMU_OUT_13_ 0 1 0 37 -1 1 0 21
- 36 MMU_OUT_14_ 0 1 0 36 -1 1 0 21
- 35 MMU_OUT_15_ 0 1 0 35 -1 1 0 21
- 27 CSCTC 0 1 0 27 -1 1 0 21
- 26 CSUART 0 1 0 26 -1 1 0 21
- 24 CSROMH 0 1 0 24 -1 1 0 21
- 23 CSROML 0 1 0 23 -1 1 0 21
- 20 MMU_IN_15_ 1 -1 -1 1 1 20 -1
- 19 MMU_IN_14_ 1 -1 -1 1 1 19 -1
- 18 MMU_IN_13_ 1 -1 -1 1 1 18 -1
- 17 MMU_IN_12_ 1 -1 -1 1 1 17 -1
- 16 MMU_IN_11_ 1 -1 -1 1 1 16 -1
- 15 MMU_IN_10_ 1 -1 -1 1 1 15 -1
- 14 MMU_IN_9_ 1 -1 -1 1 1 14 -1
- 13 MMU_IN_8_ 1 -1 -1 1 1 13 -1
- 8 MMU_IN_0_ 1 -1 -1 1 1 8 -1
- 7 MMU_IN_1_ 1 -1 -1 1 1 7 -1
- 6 MMU_IN_2_ 1 -1 -1 1 1 6 -1
- 5 MMU_IN_3_ 1 -1 -1 1 1 5 -1
- 4 MMU_IN_4_ 1 -1 -1 1 1 4 -1
- 3 MMU_IN_5_ 1 -1 -1 1 1 3 -1
- 2 MMU_IN_6_ 1 -1 -1 1 1 2 -1
- 1 MMU_IN_7_ 1 -1 -1 1 1 1 -1
-26 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 28 CSPIO 0 1 0 28 -1 3 0 21
- 38 MMU_OUT_12_ 0 1 0 38 -1 1 0 21
- 37 MMU_OUT_13_ 0 1 0 37 -1 1 0 21
- 36 MMU_OUT_14_ 0 1 0 36 -1 1 0 21
- 35 MMU_OUT_15_ 0 1 0 35 -1 1 0 21
- 27 CSCTC 0 1 0 27 -1 1 0 21
- 26 CSUART 0 1 0 26 -1 1 0 21
- 25 CSRAM 0 1 0 25 -1 1 0 21
- 24 CSROMH 0 1 0 24 -1 1 0 21
- 23 CSROML 0 1 0 23 -1 1 0 21
- 20 MMU_IN_15_ 1 -1 -1 1 1 20 -1
- 19 MMU_IN_14_ 1 -1 -1 1 1 19 -1
- 18 MMU_IN_13_ 1 -1 -1 1 1 18 -1
- 17 MMU_IN_12_ 1 -1 -1 1 1 17 -1
- 16 MMU_IN_11_ 1 -1 -1 1 1 16 -1
- 15 MMU_IN_10_ 1 -1 -1 1 1 15 -1
- 14 MMU_IN_9_ 1 -1 -1 1 1 14 -1
- 13 MMU_IN_8_ 1 -1 -1 1 1 13 -1
- 8 MMU_IN_0_ 1 -1 -1 1 1 8 -1
- 7 MMU_IN_1_ 1 -1 -1 1 1 7 -1
- 6 MMU_IN_2_ 1 -1 -1 1 1 6 -1
- 5 MMU_IN_3_ 1 -1 -1 1 1 5 -1
- 4 MMU_IN_4_ 1 -1 -1 1 1 4 -1
- 3 MMU_IN_5_ 1 -1 -1 1 1 3 -1
- 2 MMU_IN_6_ 1 -1 -1 1 1 2 -1
- 1 MMU_IN_7_ 1 -1 -1 1 1 1 -1
-18 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 38 MMU_OUT_12_ 0 1 0 38 -1 1 0 21
- 37 MMU_OUT_13_ 0 1 0 37 -1 1 0 21
- 36 MMU_OUT_14_ 0 1 0 36 -1 1 0 21
- 35 MMU_OUT_15_ 0 1 0 35 -1 1 0 21
- 28 CSPIO 0 1 0 28 -1 1 0 21
- 27 CSCTC 0 1 0 27 -1 1 0 21
- 26 CSUART 0 1 0 26 -1 1 0 21
- 25 CSRAM 0 1 0 25 -1 1 0 21
- 24 CSROMH 0 1 0 24 -1 1 0 21
- 23 CSROML 0 1 0 23 -1 1 0 21
- 20 MMU_IN_15_ 1 -1 -1 1 1 20 -1
- 19 MMU_IN_14_ 1 -1 -1 1 1 19 -1
- 18 MMU_IN_13_ 1 -1 -1 1 1 18 -1
- 17 MMU_IN_12_ 1 -1 -1 1 1 17 -1
- 16 MMU_IN_11_ 1 -1 -1 1 1 16 -1
- 15 MMU_IN_10_ 1 -1 -1 1 1 15 -1
- 14 MMU_IN_9_ 1 -1 -1 1 1 14 -1
- 13 MMU_IN_8_ 1 -1 -1 1 1 13 -1
-24 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 38 MMU_OUT_12_ 0 1 0 38 -1 1 0 21
- 37 MMU_OUT_13_ 0 1 0 37 -1 1 0 21
- 36 MMU_OUT_14_ 0 1 0 36 -1 1 0 21
- 35 MMU_OUT_15_ 0 1 0 35 -1 1 0 21
- 28 CSPIO 0 1 0 28 -1 1 0 21
- 27 CSCTC 0 1 0 27 -1 1 0 21
- 26 CSUART 0 1 0 26 -1 1 0 21
- 25 CSRAM 0 1 0 25 -1 1 0 21
- 24 CSROMH 0 1 0 24 -1 1 0 21
- 23 CSROML 0 1 0 23 -1 1 0 21
- 20 MMU_IN_15_ 1 -1 -1 1 1 20 -1
- 19 MMU_IN_14_ 1 -1 -1 1 1 19 -1
- 18 MMU_IN_13_ 1 -1 -1 1 1 18 -1
- 17 MMU_IN_12_ 1 -1 -1 1 1 17 -1
- 16 MMU_IN_11_ 1 -1 -1 1 1 16 -1
- 15 MMU_IN_10_ 1 -1 -1 1 1 15 -1
- 14 MMU_IN_9_ 1 -1 -1 1 1 14 -1
- 13 MMU_IN_8_ 1 -1 -1 1 1 13 -1
- 6 MMU_IN_2_ 1 -1 -1 1 1 6 -1
- 5 MMU_IN_3_ 1 -1 -1 1 1 5 -1
- 4 MMU_IN_4_ 1 -1 -1 1 1 4 -1
- 3 MMU_IN_5_ 1 -1 -1 1 1 3 -1
- 2 MMU_IN_6_ 1 -1 -1 1 1 2 -1
- 1 MMU_IN_7_ 1 -1 -1 1 1 1 -1
-24 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 38 MMU_OUT_12_ 0 1 0 38 -1 1 0 21
- 37 MMU_OUT_13_ 0 1 0 37 -1 1 0 21
- 36 MMU_OUT_14_ 0 1 0 36 -1 1 0 21
- 35 MMU_OUT_15_ 0 1 0 35 -1 1 0 21
- 28 CSPIO 0 1 0 28 -1 1 0 21
- 27 CSCTC 0 1 0 27 -1 1 0 21
- 26 CSUART 0 1 0 26 -1 1 0 21
- 25 CSRAM 0 1 0 25 -1 1 0 21
- 24 CSROMH 0 1 0 24 -1 1 0 21
- 23 CSROML 0 1 0 23 -1 1 0 21
- 20 MMU_IN_15_ 1 -1 -1 1 1 20 -1
- 19 MMU_IN_14_ 1 -1 -1 1 1 19 -1
- 18 MMU_IN_13_ 1 -1 -1 1 1 18 -1
- 17 MMU_IN_12_ 1 -1 -1 1 1 17 -1
- 16 MMU_IN_11_ 1 -1 -1 1 1 16 -1
- 15 MMU_IN_10_ 1 -1 -1 1 1 15 -1
- 14 MMU_IN_9_ 1 -1 -1 1 1 14 -1
- 13 MMU_IN_8_ 1 -1 -1 1 1 13 -1
- 6 MMU_IN_2_ 1 -1 -1 1 1 6 -1
- 5 MMU_IN_3_ 1 -1 -1 1 1 5 -1
- 4 MMU_IN_4_ 1 -1 -1 1 1 4 -1
- 3 MMU_IN_5_ 1 -1 -1 1 1 3 -1
- 2 MMU_IN_6_ 1 -1 -1 1 1 2 -1
- 1 MMU_IN_7_ 1 -1 -1 1 1 1 -1
-25 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 38 MMU_OUT_12_ 0 1 0 38 -1 1 0 21
- 37 MMU_OUT_13_ 0 1 0 37 -1 1 0 21
- 36 MMU_OUT_14_ 0 1 0 36 -1 1 0 21
- 35 MMU_OUT_15_ 0 1 0 35 -1 1 0 21
- 28 CSPIO 0 1 0 28 -1 1 0 21
- 27 CSCTC 0 1 0 27 -1 1 0 21
- 26 CSUART 0 1 0 26 -1 1 0 21
- 25 CSRAM 0 1 0 25 -1 1 0 21
- 24 CSROMH 0 1 0 24 -1 1 0 21
- 23 CSROML 0 1 0 23 -1 1 0 21
- 20 MMU_IN_15_ 1 -1 -1 1 1 20 -1
- 19 MMU_IN_14_ 1 -1 -1 1 1 19 -1
- 18 MMU_IN_13_ 1 -1 -1 1 1 18 -1
- 17 MMU_IN_12_ 1 -1 -1 1 1 17 -1
- 16 MMU_IN_11_ 1 -1 -1 1 1 16 -1
- 15 MMU_IN_10_ 1 -1 -1 1 1 15 -1
- 14 MMU_IN_9_ 1 -1 -1 1 1 14 -1
- 13 MMU_IN_8_ 1 -1 -1 1 1 13 -1
- 6 MMU_IN_2_ 1 -1 -1 1 1 6 -1
- 5 MMU_IN_3_ 1 -1 -1 1 1 5 -1
- 4 MMU_IN_4_ 1 -1 -1 1 1 4 -1
- 3 MMU_IN_5_ 1 -1 -1 1 1 3 -1
- 2 MMU_IN_6_ 1 -1 -1 1 1 2 -1
- 1 MMU_IN_7_ 1 -1 -1 1 1 1 -1
- 77 IORQ 1 -1 -1 1 1 -1 -1
-25 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 38 MMU_OUT_12_ 0 1 0 38 -1 1 0 21
- 37 MMU_OUT_13_ 0 1 0 37 -1 1 0 21
- 36 MMU_OUT_14_ 0 1 0 36 -1 1 0 21
- 35 MMU_OUT_15_ 0 1 0 35 -1 1 0 21
- 28 CSPIO 0 1 0 28 -1 1 0 21
- 27 CSCTC 0 1 0 27 -1 1 0 21
- 26 CSUART 0 1 0 26 -1 1 0 21
- 25 CSRAM 0 1 0 25 -1 1 0 21
- 24 CSROMH 0 1 0 24 -1 1 0 21
- 23 CSROML 0 1 0 23 -1 1 0 21
- 30 IORQ 1 -1 -1 1 1 30 -1
- 20 MMU_IN_15_ 1 -1 -1 1 1 20 -1
- 19 MMU_IN_14_ 1 -1 -1 1 1 19 -1
- 18 MMU_IN_13_ 1 -1 -1 1 1 18 -1
- 17 MMU_IN_12_ 1 -1 -1 1 1 17 -1
- 16 MMU_IN_11_ 1 -1 -1 1 1 16 -1
- 15 MMU_IN_10_ 1 -1 -1 1 1 15 -1
- 14 MMU_IN_9_ 1 -1 -1 1 1 14 -1
- 13 MMU_IN_8_ 1 -1 -1 1 1 13 -1
- 6 MMU_IN_2_ 1 -1 -1 1 1 6 -1
- 5 MMU_IN_3_ 1 -1 -1 1 1 5 -1
- 4 MMU_IN_4_ 1 -1 -1 1 1 4 -1
- 3 MMU_IN_5_ 1 -1 -1 1 1 3 -1
- 2 MMU_IN_6_ 1 -1 -1 1 1 2 -1
- 1 MMU_IN_7_ 1 -1 -1 1 1 1 -1
-24 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 38 MMU_OUT_12_ 0 1 0 38 -1 1 0 21
- 37 MMU_OUT_13_ 0 1 0 37 -1 1 0 21
- 36 MMU_OUT_14_ 0 1 0 36 -1 1 0 21
- 35 MMU_OUT_15_ 0 1 0 35 -1 1 0 21
- 28 CSPIO 0 1 0 28 -1 1 0 21
- 27 CSCTC 0 1 0 27 -1 1 0 21
- 26 CSUART 0 1 0 26 -1 1 0 21
- 25 CSRAM 0 1 0 25 -1 1 0 21
- 24 CSROMH 0 1 0 24 -1 1 0 21
- 23 CSROML 0 1 0 23 -1 1 0 21
- 20 MMU_IN_15_ 1 -1 -1 1 1 20 -1
- 19 MMU_IN_14_ 1 -1 -1 1 1 19 -1
- 18 MMU_IN_13_ 1 -1 -1 1 1 18 -1
- 17 MMU_IN_12_ 1 -1 -1 1 1 17 -1
- 16 MMU_IN_11_ 1 -1 -1 1 1 16 -1
- 15 MMU_IN_10_ 1 -1 -1 1 1 15 -1
- 14 MMU_IN_9_ 1 -1 -1 1 1 14 -1
- 13 MMU_IN_8_ 1 -1 -1 1 1 13 -1
- 6 MMU_IN_2_ 1 -1 -1 1 1 6 -1
- 5 MMU_IN_3_ 1 -1 -1 1 1 5 -1
- 4 MMU_IN_4_ 1 -1 -1 1 1 4 -1
- 3 MMU_IN_5_ 1 -1 -1 1 1 3 -1
- 2 MMU_IN_6_ 1 -1 -1 1 1 2 -1
- 1 MMU_IN_7_ 1 -1 -1 1 1 1 -1
-21 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 38 MMU_OUT_12_ 0 1 0 38 -1 1 0 21
- 37 MMU_OUT_13_ 0 1 0 37 -1 1 0 21
- 36 MMU_OUT_14_ 0 1 0 36 -1 1 0 21
- 35 MMU_OUT_15_ 0 1 0 35 -1 1 0 21
- 28 CSPIO 0 1 0 28 -1 1 0 21
- 27 CSCTC 0 1 0 27 -1 1 0 21
- 26 CSUART 0 1 0 26 -1 1 0 21
- 25 CSRAM 0 1 0 25 -1 1 0 21
- 24 CSROMH 0 1 0 24 -1 1 0 21
- 23 CSROML 0 1 0 23 -1 1 0 21
- 20 MMU_IN_15_ 1 -1 -1 1 1 20 -1
- 19 MMU_IN_14_ 1 -1 -1 1 1 19 -1
- 18 MMU_IN_13_ 1 -1 -1 1 1 18 -1
- 17 MMU_IN_12_ 1 -1 -1 1 1 17 -1
- 6 MMU_IN_2_ 1 -1 -1 1 1 6 -1
- 5 MMU_IN_3_ 1 -1 -1 1 1 5 -1
- 4 MMU_IN_4_ 1 -1 -1 1 1 4 -1
- 3 MMU_IN_5_ 1 -1 -1 1 1 3 -1
- 2 MMU_IN_6_ 1 -1 -1 1 1 2 -1
- 1 MMU_IN_7_ 1 -1 -1 1 1 1 -1
- 77 IORQ 1 -1 -1 1 1 -1 -1
-21 "number of signals after reading design file"
-
-"sig sig sig pair blk fan PT xor sync"
-"num name type sig num out pin node cnt PT type"
-"--- ---- ---- ---- --- --- --- ---- --- --- ----"
-
- 38 MMU_OUT_12_ 0 1 0 38 -1 1 0 21
- 37 MMU_OUT_13_ 0 1 0 37 -1 1 0 21
- 36 MMU_OUT_14_ 0 1 0 36 -1 1 0 21
- 35 MMU_OUT_15_ 0 1 0 35 -1 1 0 21
- 28 CSPIO 0 1 0 28 -1 1 0 21
- 27 CSCTC 0 1 0 27 -1 1 0 21
- 26 CSUART 0 1 0 26 -1 1 0 21
- 25 CSRAM 0 1 0 25 -1 1 0 21
- 24 CSROMH 0 1 0 24 -1 1 0 21
- 23 CSROML 0 1 0 23 -1 1 0 21
- 29 IORQ 1 -1 -1 1 1 29 -1
- 20 MMU_IN_15_ 1 -1 -1 1 1 20 -1
- 19 MMU_IN_14_ 1 -1 -1 1 1 19 -1
- 18 MMU_IN_13_ 1 -1 -1 1 1 18 -1
- 17 MMU_IN_12_ 1 -1 -1 1 1 17 -1
- 6 MMU_IN_2_ 1 -1 -1 1 1 6 -1
- 5 MMU_IN_3_ 1 -1 -1 1 1 5 -1
- 4 MMU_IN_4_ 1 -1 -1 1 1 4 -1
- 3 MMU_IN_5_ 1 -1 -1 1 1 3 -1
- 2 MMU_IN_6_ 1 -1 -1 1 1 2 -1
- 1 MMU_IN_7_ 1 -1 -1 1 1 1 -1
\ No newline at end of file diff --git a/sw/cpld/address_decoder.plc b/sw/cpld/address_decoder.plc deleted file mode 100755 index 1c799c1..0000000 --- a/sw/cpld/address_decoder.plc +++ /dev/null @@ -1,36 +0,0 @@ -|--------------------------------------------|
-|- ispDesignExpert Fitter Report File -|
-|- Version 8.3.02.12_DE_HDL_BASE -|
-|- (c)Copyright, Lattice Semiconductor 1999 -|
-|--------------------------------------------|
-
-
-; Source file address_decoder.tt4
-; FITTER-generated Placements.
-; DEVICE mach432
-; DATE Thu Nov 23 11:55:45 2017
-
-
-Pin 2 MMU_IN_7_
-Pin 3 MMU_IN_6_
-Pin 21 MMU_IN_15_
-Pin 4 MMU_IN_5_
-Pin 5 MMU_IN_4_
-Pin 36 MMU_OUT_15_ Comb ; S6=1 S9=1 Pair 66
-Pin 6 MMU_IN_3_
-Pin 30 IORQ
-Pin 7 MMU_IN_2_
-Pin 24 CSROML Comb ; S6=1 S9=1 Pair 75
-Pin 25 CSROMH Comb ; S6=1 S9=1 Pair 71
-Pin 37 MMU_OUT_14_ Comb ; S6=1 S9=1 Pair 62
-Pin 26 CSRAM Comb ; S6=1 S9=1 Pair 74
-Pin 38 MMU_OUT_13_ Comb ; S6=1 S9=1 Pair 65
-Pin 27 CSUART Comb ; S6=1 S9=1 Pair 70
-Pin 39 MMU_OUT_12_ Comb ; S6=1 S9=1 Pair 61
-Pin 28 CSCTC Comb ; S6=1 S9=1 Pair 73
-Pin 29 CSPIO Comb ; S6=1 S9=1 Pair 69
-Pin 20 MMU_IN_14_
-Pin 19 MMU_IN_13_
-Pin 18 MMU_IN_12_
-; Unused Pins & Nodes
-; -> None Found.
diff --git a/sw/cpld/address_decoder.prd b/sw/cpld/address_decoder.prd deleted file mode 100755 index 4258471..0000000 --- a/sw/cpld/address_decoder.prd +++ /dev/null @@ -1,464 +0,0 @@ -|--------------------------------------------|
-|- ispDesignExpert Fitter Report File -|
-|- Version 8.3.02.12_DE_HDL_BASE -|
-|- (c)Copyright, Lattice Semiconductor 1999 -|
-|--------------------------------------------|
-
-
-Start: Thu Nov 23 11:55:45 2017
-End : Thu Nov 23 11:55:45 2017 $$$ Elapsed time: 00:00:00
-===========================================================================
-Part [C:\ISPTOOLS\ISPSYS/dat/mach4/mach432] Design [address_decoder.tt4]
-
-* Place/Route options (keycode = 540674)
- = Spread Placement: ON
- = No. Routing Attempts/Placement 2
-
-* Placement Completion
-
- +- Block +------- IO Pins Available
- | +- Macrocells Available | +-- IO Pins Used
- | | +- Signals to Place | | +----- Logic Array Inputs
- | | | +- Placed | | | +- Array Inputs Used
-_|____|____|____|_______________|____|_____________|___|________________
- 0 | 16 | 0 | 0 => n/a | 16 | 10 => 62% | 33 | 0 => 0%
- 1 | 16 | 10 | 10 => 100% | 16 | 11 => 68% | 33 | 11 => 33%
----|----|----|------------|-------|------------|-----|------------------
- | Avg number of array inputs in used blocks : 11.00 => 33%
-
-* Input/Clock Signal count: 11 -> placed: 11 = 100%
-
- Resources Available Used
------------------------------------------------------------------
- Input Pins : 0 0 => 0%
- I/O Pins : 32 21 => 65%
- Clock Only Pins : 0 0 => 0%
- Clock/Input Pins : 2 0 => 0%
- Logic Blocks : 2 1 => 50%
- Macrocells : 32 10 => 31%
- PT Clusters : 32 0 => 0%
- - Single PT Clusters : 32 10 => 31%
- Input Registers : 0
-
-* Routing Completion: 100%
-* Attempts: Place [ 21] Route [ 0]
-===========================================================================
- Signal Fanout Table
-===========================================================================
- +- Signal Number
- | +- Block Location ('+' for dedicated inputs)
- | | +- Sig Type
- | | | +- Signal-to-Pin Assignment
- | | | | Fanout to Logic Blocks Signal Name
-___|__|__|____|____________________________________________________________
- 1| 1|OUT| 28|=> ..| CSCTC
- 2| 1|OUT| 29|=> ..| CSPIO
- 3| 1|OUT| 26|=> ..| CSRAM
- 4| 1|OUT| 25|=> ..| CSROMH
- 5| 1|OUT| 24|=> ..| CSROML
- 6| 1|OUT| 27|=> ..| CSUART
- 7| 1|INP| 30|=> .1| IORQ
- 8| 0|INP| 18|=> .1| MMU_IN_12_
- 9| 0|INP| 19|=> .1| MMU_IN_13_
- 10| 0|INP| 20|=> .1| MMU_IN_14_
- 11| 0|INP| 21|=> .1| MMU_IN_15_
- 12| 0|INP| 7|=> .1| MMU_IN_2_
- 13| 0|INP| 6|=> .1| MMU_IN_3_
- 14| 0|INP| 5|=> .1| MMU_IN_4_
- 15| 0|INP| 4|=> .1| MMU_IN_5_
- 16| 0|INP| 3|=> .1| MMU_IN_6_
- 17| 0|INP| 2|=> .1| MMU_IN_7_
- 18| 1|OUT| 39|=> ..| MMU_OUT_12_
- 19| 1|OUT| 38|=> ..| MMU_OUT_13_
- 20| 1|OUT| 37|=> ..| MMU_OUT_14_
- 21| 1|OUT| 36|=> ..| MMU_OUT_15_
----------------------------------------------------------------------------
-===========================================================================
- < C:\ISPTOOLS\ISPSYS/dat/mach4/mach432 Device Pin Assignments >
-===========================================================================
- +- Device Pin No
- | Pin Type +- Signal Fixed (*)
- | | | Signal Name
-____|_____|_________|______________________________________________________
- 1 | GND | | | (pwr/test)
- 2 | I_O | 0_07|*| MMU_IN_7_
- 3 | I_O | 0_06|*| MMU_IN_6_
- 4 | I_O | 0_05|*| MMU_IN_5_
- 5 | I_O | 0_04|*| MMU_IN_4_
- 6 | I_O | 0_03|*| MMU_IN_3_
- 7 | I_O | 0_02|*| MMU_IN_2_
- 8 | I_O | 0_01| | -
- 9 | I_O | 0_00| | -
- 10 | JTAG | | | (pwr/test)
- 11 | CkIn | | | -
- 12 | GND | | | (pwr/test)
- 13 | JTAG | | | (pwr/test)
- 14 | I_O | 0_08| | -
- 15 | I_O | 0_09| | -
- 16 | I_O | 0_10| | -
- 17 | I_O | 0_11| | -
- 18 | I_O | 0_12|*| MMU_IN_12_
- 19 | I_O | 0_13|*| MMU_IN_13_
- 20 | I_O | 0_14|*| MMU_IN_14_
- 21 | I_O | 0_15|*| MMU_IN_15_
- 22 | Vcc | | | (pwr/test)
- 23 | GND | | | (pwr/test)
- 24 | I_O | 1_15|*| CSROML
- 25 | I_O | 1_14|*| CSROMH
- 26 | I_O | 1_13|*| CSRAM
- 27 | I_O | 1_12|*| CSUART
- 28 | I_O | 1_11|*| CSCTC
- 29 | I_O | 1_10|*| CSPIO
- 30 | I_O | 1_09|*| IORQ
- 31 | I_O | 1_08| | -
- 32 | JTAG | | | (pwr/test)
- 33 | CkIn | | | -
- 34 | GND | | | (pwr/test)
- 35 | JTAG | | | (pwr/test)
- 36 | I_O | 1_00|*| MMU_OUT_15_
- 37 | I_O | 1_01|*| MMU_OUT_14_
- 38 | I_O | 1_02|*| MMU_OUT_13_
- 39 | I_O | 1_03|*| MMU_OUT_12_
- 40 | I_O | 1_04| | -
- 41 | I_O | 1_05| | -
- 42 | I_O | 1_06| | -
- 43 | I_O | 1_07| | -
- 44 | Vcc | | | (pwr/test)
----------------------------------------------------------------------------
-===========================================================================
- < Block [ 0] > IO-to-Node Pin Mapping
-===========================================================================
- +- Block IO Pin
- | Device Pin No.--------+
- | Pin Fixed(*)----+ |
- | Sig Type--+ | | |
- | Signal Name | | | | Node Destinations Via Output Matrix
-_|_________________|__|___|_____|___________________________________________
- 0| | | | 9| => | 0 1 2 3 4 5 6 7
- 1| | | | 8| => | 1 2 3 4 5 6 7 0
- 2| MMU_IN_2_|INP|*| 7| => | 2 3 4 5 6 7 0 1
- 3| MMU_IN_3_|INP|*| 6| => | 3 4 5 6 7 0 1 2
- 4| MMU_IN_4_|INP|*| 5| => | 4 5 6 7 0 1 2 3
- 5| MMU_IN_5_|INP|*| 4| => | 5 6 7 0 1 2 3 4
- 6| MMU_IN_6_|INP|*| 3| => | 6 7 0 1 2 3 4 5
- 7| MMU_IN_7_|INP|*| 2| => | 7 0 1 2 3 4 5 6
- 8| | | | 14| => | 8 9 10 11 12 13 14 15
- 9| | | | 15| => | 9 10 11 12 13 14 15 8
-10| | | | 16| => | 10 11 12 13 14 15 8 9
-11| | | | 17| => | 11 12 13 14 15 8 9 10
-12| MMU_IN_12_|INP|*| 18| => | 12 13 14 15 8 9 10 11
-13| MMU_IN_13_|INP|*| 19| => | 13 14 15 8 9 10 11 12
-14| MMU_IN_14_|INP|*| 20| => | 14 15 8 9 10 11 12 13
-15| MMU_IN_15_|INP|*| 21| => | 15 8 9 10 11 12 13 14
----------------------------------------------------------------------------
-===========================================================================
- < Block [ 0] > IO/Node and IO/Input Macrocell Pairing Table
-===========================================================================
- +- Block IO Pin
- | Device Pin No.--------+
- | Pin Fixed(*)----+ |
- | Sig Type--+ | | |
- | Signal Name | | | | Input Macrocell and Node Pairs
-_|_________________|__|___|_____|__________________________________________
- 0| | | | 9| => | Input macrocell [ -]
- 1| | | | 8| => | Input macrocell [ -]
- 2| MMU_IN_2_|INP|*| 7| => | Input macrocell [ -]
- 3| MMU_IN_3_|INP|*| 6| => | Input macrocell [ -]
- 4| MMU_IN_4_|INP|*| 5| => | Input macrocell [ -]
- 5| MMU_IN_5_|INP|*| 4| => | Input macrocell [ -]
- 6| MMU_IN_6_|INP|*| 3| => | Input macrocell [ -]
- 7| MMU_IN_7_|INP|*| 2| => | Input macrocell [ -]
- 8| | | | 14| => | Input macrocell [ -]
- 9| | | | 15| => | Input macrocell [ -]
-10| | | | 16| => | Input macrocell [ -]
-11| | | | 17| => | Input macrocell [ -]
-12| MMU_IN_12_|INP|*| 18| => | Input macrocell [ -]
-13| MMU_IN_13_|INP|*| 19| => | Input macrocell [ -]
-14| MMU_IN_14_|INP|*| 20| => | Input macrocell [ -]
-15| MMU_IN_15_|INP|*| 21| => | Input macrocell [ -]
----------------------------------------------------------------------------
-===========================================================================
- < Block [ 0] > Input Multiplexer (IMX) Assignments
-===========================================================================
- +----- IO pin/Input Register, or Macrocell
-IMX No. | +---- Block IO Pin or Macrocell Number
- | | | ABEL Node/ +-- Signal using the Pin or Macrocell
- | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell
- | | | | Sig Type | | +- Feedback Required (*)
----|-------|----|---|---|----------|------|-|------------------------------
- 0 [IOpin 0 | 9| -| | ]
- [MCell 0 | 45| -| | ]
-
- 1 [IOpin 1 | 8| -| | ]
- [MCell 1 | 46| -| | ]
-
- 2 [IOpin 2 | 7|INP MMU_IN_2_|*|*]
- [MCell 2 | 47| -| | ]
-
- 3 [IOpin 3 | 6|INP MMU_IN_3_|*|*]
- [MCell 3 | 48| -| | ]
-
- 4 [IOpin 4 | 5|INP MMU_IN_4_|*|*]
- [MCell 4 | 49| -| | ]
-
- 5 [IOpin 5 | 4|INP MMU_IN_5_|*|*]
- [MCell 5 | 50| -| | ]
-
- 6 [IOpin 6 | 3|INP MMU_IN_6_|*|*]
- [MCell 6 | 51| -| | ]
-
- 7 [IOpin 7 | 2|INP MMU_IN_7_|*|*]
- [MCell 7 | 52| -| | ]
-
- 8 [IOpin 8 | 14| -| | ]
- [MCell 8 | 53| -| | ]
-
- 9 [IOpin 9 | 15| -| | ]
- [MCell 9 | 54| -| | ]
-
- 10 [IOpin 10 | 16| -| | ]
- [MCell 10 | 55| -| | ]
-
- 11 [IOpin 11 | 17| -| | ]
- [MCell 11 | 56| -| | ]
-
- 12 [IOpin 12 | 18|INP MMU_IN_12_|*|*]
- [MCell 12 | 57| -| | ]
-
- 13 [IOpin 13 | 19|INP MMU_IN_13_|*|*]
- [MCell 13 | 58| -| | ]
-
- 14 [IOpin 14 | 20|INP MMU_IN_14_|*|*]
- [MCell 14 | 59| -| | ]
-
- 15 [IOpin 15 | 21|INP MMU_IN_15_|*|*]
- [MCell 15 | 60| -| | ]
----------------------------------------------------------------------------
-===========================================================================
- < Block [ 1] > Macrocell (MCell) Cluster Assignments
-===========================================================================
- + Macrocell Number
- | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size
- | Sync/Async-------+ | | | Cluster to Mcell Assignment
- | Node Fixed(*)----+ | | | | | +- XOR PT Size
- | Sig Type-+ | | | | | | | XOR to Mcell Assignment
- | Signal Name | | | | | | | | |
-_|_________________|__|__|___|_____|__|______|___|__________|______________
- 0| MMU_OUT_12_|OUT| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig
- 1| MMU_OUT_14_|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig
- 2| | ? | | S | | 4 free | 1 XOR free
- 3| | ? | | S | | 4 free | 1 XOR free
- 4| MMU_OUT_13_|OUT| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig
- 5| MMU_OUT_15_|OUT| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig
- 6| | ? | | S | | 4 free | 1 XOR free
- 7| | ? | | S | | 4 free | 1 XOR free
- 8| CSPIO|OUT| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig
- 9| CSUART|OUT| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig
-10| CSROMH|OUT| | S | 1 | 4 free | 1 XOR to [10] for 1 PT sig
-11| | ? | | S | | 4 free | 1 XOR free
-12| CSCTC|OUT| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig
-13| CSRAM|OUT| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig
-14| CSROML|OUT| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig
-15| | ? | | S | | 4 free | 1 XOR free
----------------------------------------------------------------------------
-===========================================================================
- < Block [ 1] > Maximum PT Capacity
-===========================================================================
- + Macrocell Number
- | PT Requirements------ Logic XOR+
- | Sync/Async-------+ | |
- | Node Fixed(*)----+ | | |
- | Sig Type-+ | | | |
- | Signal Name | | | | | Maximum PT Capacity
-_|_________________|__|__|___|_____|_______________________________________
- 0| MMU_OUT_12_|OUT| | S | 1 |=> can support up to [ 14] logic PT(s)
- 1| MMU_OUT_14_|OUT| | S | 1 |=> can support up to [ 19] logic PT(s)
- 2| | ? | | S | |=> can support up to [ 18] logic PT(s)
- 3| | ? | | S | |=> can support up to [ 18] logic PT(s)
- 4| MMU_OUT_13_|OUT| | S | 1 |=> can support up to [ 19] logic PT(s)
- 5| MMU_OUT_15_|OUT| | S | 1 |=> can support up to [ 19] logic PT(s)
- 6| | ? | | S | |=> can support up to [ 14] logic PT(s)
- 7| | ? | | S | |=> can support up to [ 10] logic PT(s)
- 8| CSPIO|OUT| | S | 1 |=> can support up to [ 13] logic PT(s)
- 9| CSUART|OUT| | S | 1 |=> can support up to [ 18] logic PT(s)
-10| CSROMH|OUT| | S | 1 |=> can support up to [ 18] logic PT(s)
-11| | ? | | S | |=> can support up to [ 17] logic PT(s)
-12| CSCTC|OUT| | S | 1 |=> can support up to [ 18] logic PT(s)
-13| CSRAM|OUT| | S | 1 |=> can support up to [ 18] logic PT(s)
-14| CSROML|OUT| | S | 1 |=> can support up to [ 14] logic PT(s)
-15| | ? | | S | |=> can support up to [ 9] logic PT(s)
----------------------------------------------------------------------------
-===========================================================================
- < Block [ 1] > Node-Pin Assignments
-===========================================================================
- + Macrocell Number
- | Node Fixed(*)------+
- | Sig Type---+ | to | Block [ 1] IO Pin | Device Pin
- | Signal Name | | pin | Numbers | Numbers
-_|_________________|__|_____|____________________|________________________
- 0| MMU_OUT_12_|OUT| | => | 0 1 2 ( 3) 4 5 6 7 | 36 37 38 ( 39) 40 41 42 43
- 1| MMU_OUT_14_|OUT| | => | 0 ( 1) 2 3 4 5 6 7 | 36 ( 37) 38 39 40 41 42 43
- 2| | | | => | 0 1 2 3 4 5 6 7 | 36 37 38 39 40 41 42 43
- 3| | | | => | 0 1 2 3 4 5 6 7 | 36 37 38 39 40 41 42 43
- 4| MMU_OUT_13_|OUT| | => | 0 1 ( 2) 3 4 5 6 7 | 36 37 ( 38) 39 40 41 42 43
- 5| MMU_OUT_15_|OUT| | => |( 0) 1 2 3 4 5 6 7 |( 36) 37 38 39 40 41 42 43
- 6| | | | => | 0 1 2 3 4 5 6 7 | 36 37 38 39 40 41 42 43
- 7| | | | => | 0 1 2 3 4 5 6 7 | 36 37 38 39 40 41 42 43
- 8| CSPIO|OUT| | => | 8 9 ( 10) 11 12 13 14 15 | 31 30 ( 29) 28 27 26 25 24
- 9| CSUART|OUT| | => | 8 9 10 11 ( 12) 13 14 15 | 31 30 29 28 ( 27) 26 25 24
-10| CSROMH|OUT| | => | 8 9 10 11 12 13 ( 14) 15 | 31 30 29 28 27 26 ( 25) 24
-11| | | | => | 8 9 10 11 12 13 14 15 | 31 30 29 28 27 26 25 24
-12| CSCTC|OUT| | => | 8 9 10 ( 11) 12 13 14 15 | 31 30 29 ( 28) 27 26 25 24
-13| CSRAM|OUT| | => | 8 9 10 11 12 ( 13) 14 15 | 31 30 29 28 27 ( 26) 25 24
-14| CSROML|OUT| | => | 8 9 10 11 12 13 14 ( 15)| 31 30 29 28 27 26 25 ( 24)
-15| | | | => | 8 9 10 11 12 13 14 15 | 31 30 29 28 27 26 25 24
----------------------------------------------------------------------------
-===========================================================================
- < Block [ 1] > IO-to-Node Pin Mapping
-===========================================================================
- +- Block IO Pin
- | Device Pin No.--------+
- | Pin Fixed(*)----+ |
- | Sig Type--+ | | |
- | Signal Name | | | | Node Destinations Via Output Matrix
-_|_________________|__|___|_____|___________________________________________
- 0| MMU_OUT_15_|OUT|*| 36| => | 0 1 2 3 4 ( 5) 6 7
- 1| MMU_OUT_14_|OUT|*| 37| => | ( 1) 2 3 4 5 6 7 0
- 2| MMU_OUT_13_|OUT|*| 38| => | 2 3 ( 4) 5 6 7 0 1
- 3| MMU_OUT_12_|OUT|*| 39| => | 3 4 5 6 7 ( 0) 1 2
- 4| | | | 40| => | 4 5 6 7 0 1 2 3
- 5| | | | 41| => | 5 6 7 0 1 2 3 4
- 6| | | | 42| => | 6 7 0 1 2 3 4 5
- 7| | | | 43| => | 7 0 1 2 3 4 5 6
- 8| | | | 31| => | 8 9 10 11 12 13 14 15
- 9| IORQ|INP|*| 30| => | 9 10 11 12 13 14 15 8
-10| CSPIO|OUT|*| 29| => | 10 11 12 13 14 15 ( 8) 9
-11| CSCTC|OUT|*| 28| => | 11 (12) 13 14 15 8 9 10
-12| CSUART|OUT|*| 27| => | 12 13 14 15 8 ( 9) 10 11
-13| CSRAM|OUT|*| 26| => | (13) 14 15 8 9 10 11 12
-14| CSROMH|OUT|*| 25| => | 14 15 8 9 (10) 11 12 13
-15| CSROML|OUT|*| 24| => | 15 8 9 10 11 12 13 (14)
----------------------------------------------------------------------------
-===========================================================================
- < Block [ 1] > IO/Node and IO/Input Macrocell Pairing Table
-===========================================================================
- +- Block IO Pin
- | Device Pin No.--------+
- | Pin Fixed(*)----+ |
- | Sig Type--+ | | |
- | Signal Name | | | | Input Macrocell and Node Pairs
-_|_________________|__|___|_____|__________________________________________
- 0| MMU_OUT_15_|OUT|*| 36| => | Input macrocell [ -]
- 1| MMU_OUT_14_|OUT|*| 37| => | Input macrocell [ -]
- 2| MMU_OUT_13_|OUT|*| 38| => | Input macrocell [ -]
- 3| MMU_OUT_12_|OUT|*| 39| => | Input macrocell [ -]
- 4| | | | 40| => | Input macrocell [ -]
- 5| | | | 41| => | Input macrocell [ -]
- 6| | | | 42| => | Input macrocell [ -]
- 7| | | | 43| => | Input macrocell [ -]
- 8| | | | 31| => | Input macrocell [ -]
- 9| IORQ|INP|*| 30| => | Input macrocell [ -]
-10| CSPIO|OUT|*| 29| => | Input macrocell [ -]
-11| CSCTC|OUT|*| 28| => | Input macrocell [ -]
-12| CSUART|OUT|*| 27| => | Input macrocell [ -]
-13| CSRAM|OUT|*| 26| => | Input macrocell [ -]
-14| CSROMH|OUT|*| 25| => | Input macrocell [ -]
-15| CSROML|OUT|*| 24| => | Input macrocell [ -]
----------------------------------------------------------------------------
-===========================================================================
- < Block [ 1] > Input Multiplexer (IMX) Assignments
-===========================================================================
- +----- IO pin/Input Register, or Macrocell
-IMX No. | +---- Block IO Pin or Macrocell Number
- | | | ABEL Node/ +-- Signal using the Pin or Macrocell
- | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell
- | | | | Sig Type | | +- Feedback Required (*)
----|-------|----|---|---|----------|------|-|------------------------------
- 0 [IOpin 0 | 36|OUT MMU_OUT_15_|*| ]
- [MCell 0 | 61|OUT MMU_OUT_12_| | ]
-
- 1 [IOpin 1 | 37|OUT MMU_OUT_14_|*| ]
- [MCell 1 | 62|OUT MMU_OUT_14_| | ]
-
- 2 [IOpin 2 | 38|OUT MMU_OUT_13_|*| ]
- [MCell 2 | 63| -| | ]
-
- 3 [IOpin 3 | 39|OUT MMU_OUT_12_|*| ]
- [MCell 3 | 64| -| | ]
-
- 4 [IOpin 4 | 40| -| | ]
- [MCell 4 | 65|OUT MMU_OUT_13_| | ]
-
- 5 [IOpin 5 | 41| -| | ]
- [MCell 5 | 66|OUT MMU_OUT_15_| | ]
-
- 6 [IOpin 6 | 42| -| | ]
- [MCell 6 | 67| -| | ]
-
- 7 [IOpin 7 | 43| -| | ]
- [MCell 7 | 68| -| | ]
-
- 8 [IOpin 8 | 31| -| | ]
- [MCell 8 | 69|OUT CSPIO| | ]
-
- 9 [IOpin 9 | 30|INP IORQ|*|*]
- [MCell 9 | 70|OUT CSUART| | ]
-
- 10 [IOpin 10 | 29|OUT CSPIO|*| ]
- [MCell 10 | 71|OUT CSROMH| | ]
-
- 11 [IOpin 11 | 28|OUT CSCTC|*| ]
- [MCell 11 | 72| -| | ]
-
- 12 [IOpin 12 | 27|OUT CSUART|*| ]
- [MCell 12 | 73|OUT CSCTC| | ]
-
- 13 [IOpin 13 | 26|OUT CSRAM|*| ]
- [MCell 13 | 74|OUT CSRAM| | ]
-
- 14 [IOpin 14 | 25|OUT CSROMH|*| ]
- [MCell 14 | 75|OUT CSROML| | ]
-
- 15 [IOpin 15 | 24|OUT CSROML|*| ]
- [MCell 15 | 76| -| | ]
----------------------------------------------------------------------------
-===========================================================================
- < Block [ 1] > Logic Array Fan-in
-===========================================================================
- +- Central Switch Matrix No.
- | Src (ABEL Node/Pin#) Signal
---|--|--------------------|---------------------------------------------------
-Mux00| IOPin 0 7 ( 2)| MMU_IN_7_
-Mux01| IOPin 0 4 ( 5)| MMU_IN_4_
-Mux02| ... | ...
-Mux03| ... | ...
-Mux04| ... | ...
-Mux05| ... | ...
-Mux06| IOPin 0 6 ( 3)| MMU_IN_6_
-Mux07| IOPin 0 3 ( 6)| MMU_IN_3_
-Mux08| IOPin 0 15 ( 21)| MMU_IN_15_
-Mux09| IOPin 0 5 ( 4)| MMU_IN_5_
-Mux10| IOPin 0 12 ( 18)| MMU_IN_12_
-Mux11| ... | ...
-Mux12| IOPin 0 13 ( 19)| MMU_IN_13_
-Mux13| IOPin 1 9 ( 30)| IORQ
-Mux14| ... | ...
-Mux15| IOPin 0 14 ( 20)| MMU_IN_14_
-Mux16| ... | ...
-Mux17| ... | ...
-Mux18| IOPin 0 2 ( 7)| MMU_IN_2_
-Mux19| ... | ...
-Mux20| ... | ...
-Mux21| ... | ...
-Mux22| ... | ...
-Mux23| ... | ...
-Mux24| ... | ...
-Mux25| ... | ...
-Mux26| ... | ...
-Mux27| ... | ...
-Mux28| ... | ...
-Mux29| ... | ...
-Mux30| ... | ...
-Mux31| ... | ...
-Mux32| ... | ...
----------------------------------------------------------------------------
\ No newline at end of file diff --git a/sw/cpld/address_decoder.rpt b/sw/cpld/address_decoder.rpt deleted file mode 100755 index ecad5be..0000000 --- a/sw/cpld/address_decoder.rpt +++ /dev/null @@ -1,452 +0,0 @@ -|--------------------------------------------|
-|- ispDesignExpert Fitter Report File -|
-|- Version 8.3.02.12_DE_HDL_BASE -|
-|- (c)Copyright, Lattice Semiconductor 1999 -|
-|--------------------------------------------|
-
-
-
-
-Project_Summary
-~~~~~~~~~~~~~~~
-
-Project Name : address_decoder
-Project Path : C:\_prossn\cpld.nao
-Project Fitted on : Thu Nov 23 11:55:45 2017
-
-Device : M4-32/32
-Package : 44PLCC
-Speed : -15
-Partnumber : M4-32/32-15JC
-Source Format : ABEL_Schematic
-
-
-// Project 'address_decoder' was Fitted Successfully! //
-
-
-Compilation_Times
-~~~~~~~~~~~~~~~~~
-Reading/DRC 0 sec
-Partition 0 sec
-Place 0 sec
-Route 0 sec
-Jedec/Report generation 0 sec
- --------
-Fitter 00:00:00
-
-
-Design_Summary
-~~~~~~~~~~~~~~
- Total Input Pins : 11
- Total Output Pins : 10
- Total Bidir I/O Pins : 0
- Total Flip-Flops : 0
- Total Product Terms : 10
- Total Reserved Pins : 0
- Total Reserved Blocks : 0
-
-
-Device_Resource_Summary
-~~~~~~~~~~~~~~~~~~~~~~~
- Total
- Available Used Available Utilization
-Dedicated Pins
- Input-Only Pins .. .. .. --> ..
- Clock/Input Pins 2 0 2 --> 0%
-I/O Pins 32 21 11 --> 65%
-Logic Macrocells 32 10 22 --> 31%
- Unusable Macrocells .. 0 ..
-
-CSM Outputs/Total Block Inputs 66 11 55 --> 16%
-Logical Product Terms 160 10 150 --> 6%
-Product Term Clusters 32 0 32 --> 0%
-
-
-Blocks_Resource_Summary
-~~~~~~~~~~~~~~~~~~~~~~~
- # of PT
- I/O Macrocells Macrocells logic clusters
- Fanin Pins Used Unusable available PTs available Pwr
----------------------------------------------------------------------------------
-Maximum 33 16 -- -- 16 80 16 -
----------------------------------------------------------------------------------
-Block A 0 10 0 0 16 0 16 Hi
-Block B 11 11 10 0 6 10 16 Hi
----------------------------------------------------------------------------------
-
-<Note> Four rightmost columns above reflect last status of the placement process.
-<Note> Pwr (Power) : Hi = High
- Lo = Low.
-
-
-Optimizer_and_Fitter_Options
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-Pin Assignment : Yes
-Group Assignment : No
-Pin Reservation : No (1)
-Block Reservation : No
-
-@Ignore_Project_Constraints :
- Pin Assignments : No
- Keep Block Assignment --
- Keep Segment Assignment --
- Group Assignments : No
- Macrocell Assignment : No
- Keep Block Assignment --
- Keep Segment Assignment --
-
-@Backannotate_Project_Constraints
- Pin Assignments : No
- Pin And Block Assignments : No
- Pin, Macrocell and Block : No
-
-@Timing_Constraints : No
-
-@Global_Project_Optimization :
- Balanced Partitioning : Yes
- Spread Placement : Yes
-
- Note :
- Pack Design :
- Balanced Partitioning = No
- Spread Placement = No
- Spread Design :
- Balanced Partitioning = Yes
- Spread Placement = Yes
-
-@Logic_Synthesis :
- Logic Reduction : Yes
- Node Collapsing : Yes
- D/T Synthesis : Yes
- Clock Optimization : No
- Input Register Optimization : Yes
- XOR Synthesis : Yes
- Max. P-Term for Collapsing : 16
- Max. P-Term for Splitting : 16
- Max. Equation Fanin : 32
- Keep Xor : Yes
-
-@Utilization_options
- Max. % of macrocells used : 100
- Max. % of block inputs used : 100
- Max. % of segment lines used : ---
- Max. % of macrocells used : ---
-
-
-@Import_Source_Constraint_Option No
-
-@Zero_Hold_Time No
-
-@Pull_up No
-
-@User_Signature 0
-
-@Output_Slew_Rate Default = Fast(2)
-
-@Power Default = High(2)
-
-
-Device Options:
-<Note> 1 : Reserved unused I/Os can be independently driven to Low or High, and does not
- follow the drive level set for the Global Configure Unused I/O Option.
-<Note> 2 : For user-specified constraints on individual signals, refer to the Output,
- Bidir and Burried Signal Lists.
-
-
-
-
-Pinout_Listing
-~~~~~~~~~~~~~~
- | Pin |Blk |Assigned|
-Pin No| Type |Pad |Pin | Signal name
----------------------------------------------------------------
- 1 | GND | | |
- 2 | I_O | A7 | * |MMU_IN_7_
-3 | I_O | A6 | * |MMU_IN_6_
-4 | I_O | A5 | * |MMU_IN_5_
-5 | I_O | A4 | * |MMU_IN_4_
-6 | I_O | A3 | * |MMU_IN_3_
-7 | I_O | A2 | * |MMU_IN_2_
-8 | I_O | A1 | |
-9 | I_O | A0 | |
-10 | JTAG | | |
-11 | CkIn | | |
-12 | GND | | |
-13 | JTAG | | |
-14 | I_O | A8 | |
-15 | I_O | A9 | |
-16 | I_O | A10| |
-17 | I_O | A11| |
-18 | I_O | A12| * |MMU_IN_12_
-19 | I_O | A13| * |MMU_IN_13_
-20 | I_O | A14| * |MMU_IN_14_
-21 | I_O | A15| * |MMU_IN_15_
-22 | Vcc | | |
-23 | GND | | |
-24 | I_O | B15| * |CSROML
-25 | I_O | B14| * |CSROMH
-26 | I_O | B13| * |CSRAM
-27 | I_O | B12| * |CSUART
-28 | I_O | B11| * |CSCTC
-29 | I_O | B10| * |CSPIO
-30 | I_O | B9 | * |IORQ
-31 | I_O | B8 | |
-32 | JTAG | | |
-33 | CkIn | | |
-34 | GND | | |
-35 | JTAG | | |
-36 | I_O | B0 | * |MMU_OUT_15_
-37 | I_O | B1 | * |MMU_OUT_14_
-38 | I_O | B2 | * |MMU_OUT_13_
-39 | I_O | B3 | * |MMU_OUT_12_
-40 | I_O | B4 | |
-41 | I_O | B5 | |
-42 | I_O | B6 | |
-43 | I_O | B7 | |
-44 | Vcc | | |
-
----------------------------------------------------------------------------
-
-<Note> Blk Pad : This notation refers to the Block I/O pad number in the device.
-<Note> Assigned Pin : user or dedicated input assignment (E.g. Clock pins).
-<Note> Pin Type :
- CkIn : Dedicated input or clock pin
- CLK : Dedicated clock pin
- INP : Dedicated input pin
- JTAG : JTAG Control and test pin
- NC : No connected
-
-
-
-Input_Signal_List
-~~~~~~~~~~~~~~~~~
- P R
- Pin r e O Input
-Pin Blk PTs Type e s E Fanout Pwr Slew Signal
-----------------------------------------------------------------------
- 30 B . I/O -B Hi Fast IORQ
- 18 A . I/O -B Hi Fast MMU_IN_12_
- 19 A . I/O -B Hi Fast MMU_IN_13_
- 20 A . I/O -B Hi Fast MMU_IN_14_
- 21 A . I/O -B Hi Fast MMU_IN_15_
- 7 A . I/O -B Hi Fast MMU_IN_2_
- 6 A . I/O -B Hi Fast MMU_IN_3_
- 5 A . I/O -B Hi Fast MMU_IN_4_
- 4 A . I/O -B Hi Fast MMU_IN_5_
- 3 A . I/O -B Hi Fast MMU_IN_6_
- 2 A . I/O -B Hi Fast MMU_IN_7_
-----------------------------------------------------------------------
-
-<Note> Power : Hi = High
- MH = Medium High
- ML = Medium Low
- Lo = Low
-
-
-
-Output_Signal_List
-~~~~~~~~~~~~~~~~~~
- P R
- Pin r e O Output
-Pin Blk PTs Type e s E Fanout Pwr Slew Signal
-----------------------------------------------------------------------
- 28 B 1 COM -- Hi Fast CSCTC
- 29 B 1 COM -- Hi Fast CSPIO
- 26 B 1 COM -- Hi Fast CSRAM
- 25 B 1 COM -- Hi Fast CSROMH
- 24 B 1 COM -- Hi Fast CSROML
- 27 B 1 COM -- Hi Fast CSUART
- 39 B 1 COM -- Hi Fast MMU_OUT_12_
- 38 B 1 COM -- Hi Fast MMU_OUT_13_
- 37 B 1 COM -- Hi Fast MMU_OUT_14_
- 36 B 1 COM -- Hi Fast MMU_OUT_15_
-----------------------------------------------------------------------
-
-<Note> Power : Hi = High
- MH = Medium High
- ML = Medium Low
- Lo = Low
-
-
-
-Bidir_Signal_List
-~~~~~~~~~~~~~~~~~
- P R
- Pin r e O Bidir
-Pin Blk PTs Type e s E Fanout Pwr Slew Signal
-----------------------------------------------------------------------
-----------------------------------------------------------------------
-
-<Note> Power : Hi = High
- MH = Medium High
- ML = Medium Low
- Lo = Low
-
-
-
-Buried_Signal_List
-~~~~~~~~~~~~~~~~~~
- P R
- Pin r e O Node
-#Mc Blk PTs Type e s E Fanout Pwr Slew Signal
-----------------------------------------------------------------------
-----------------------------------------------------------------------
-
-<Note> Power : Hi = High
- MH = Medium High
- ML = Medium Low
- Lo = Low
-
-
-
-
-Signals_Fanout_List
-~~~~~~~~~~~~~~~~~~~
-Signal Source : Fanout List
------------------------------------------------------------------------------
- MMU_IN_7_{ B}: CSPIO{ B}
- MMU_IN_6_{ B}: CSPIO{ B}
- MMU_IN_15_{ B}: MMU_OUT_15_{ B} CSROML{ B} CSROMH{ B}
- : CSRAM{ B}
- MMU_IN_5_{ B}: CSPIO{ B}
- MMU_IN_4_{ B}: CSPIO{ B}
- MMU_IN_3_{ B}: CSPIO{ B}
- IORQ{ C}: CSPIO{ B}
- MMU_IN_2_{ B}: CSPIO{ B}
- MMU_IN_14_{ B}: CSROML{ B} CSROMH{ B} MMU_OUT_14_{ B}
- MMU_IN_13_{ B}: CSROML{ B} CSROMH{ B} MMU_OUT_13_{ B}
- MMU_IN_12_{ B}: MMU_OUT_12_{ B}
------------------------------------------------------------------------------
-
-<Note> {.} : Indicates block location of signal
-
-
-Set_Reset_Summary
-~~~~~~~~~~~~~~~~~
-
-Block A
-block level set pt :
-block level reset pt :
-Equations :
-| | |Block|Block| Signal
-| Reg |Mode |Set |Reset| Name
-+-----+-----+-----+-----+------------------------
-| | | | | MMU_IN_15_
-| | | | | MMU_IN_14_
-| | | | | MMU_IN_13_
-| | | | | MMU_IN_12_
-| | | | | MMU_IN_2_
-| | | | | MMU_IN_3_
-| | | | | MMU_IN_4_
-| | | | | MMU_IN_5_
-| | | | | MMU_IN_6_
-| | | | | MMU_IN_7_
-
-
-Block B
-block level set pt :
-block level reset pt :
-Equations :
-| | |Block|Block| Signal
-| Reg |Mode |Set |Reset| Name
-+-----+-----+-----+-----+------------------------
-| | | | | MMU_OUT_12_
-| | | | | MMU_OUT_13_
-| | | | | MMU_OUT_14_
-| | | | | MMU_OUT_15_
-| | | | | CSPIO
-| | | | | CSCTC
-| | | | | CSUART
-| | | | | CSRAM
-| | | | | CSROMH
-| | | | | CSROML
-| | | | | IORQ
-
-
-<Note> (S) means the macrocell is configured in synchronous mode
- i.e. it uses the block-level set and reset pt.
- (A) means the macrocell is configured in asynchronous mode
- i.e. it can have its independant set or reset pt.
- (BS) means the block-level set pt is selected.
- (BR) means the block-level reset pt is selected.
-
-
-
-
-BLOCK_B_LOGIC_ARRAY_FANIN
-~~~~~~~~~~~~~~~~~~~~~~~~~
-CSM Signal Source CSM Signal Source
------------------------------------- ------------------------------------
-mx B0 MMU_IN_7_ pin 2 mx B17 ... ...
-mx B1 MMU_IN_4_ pin 5 mx B18 MMU_IN_2_ pin 7
-mx B2 ... ... mx B19 ... ...
-mx B3 ... ... mx B20 ... ...
-mx B4 ... ... mx B21 ... ...
-mx B5 ... ... mx B22 ... ...
-mx B6 MMU_IN_6_ pin 3 mx B23 ... ...
-mx B7 MMU_IN_3_ pin 6 mx B24 ... ...
-mx B8 MMU_IN_15_ pin 21 mx B25 ... ...
-mx B9 MMU_IN_5_ pin 4 mx B26 ... ...
-mx B10 MMU_IN_12_ pin 18 mx B27 ... ...
-mx B11 ... ... mx B28 ... ...
-mx B12 MMU_IN_13_ pin 19 mx B29 ... ...
-mx B13 IORQ pin 30 mx B30 ... ...
-mx B14 ... ... mx B31 ... ...
-mx B15 MMU_IN_14_ pin 20 mx B32 ... ...
-mx B16 ... ...
-----------------------------------------------------------------------------
-
-<Note> CSM indicates the mux inputs from the Central Switch Matrix.
-<Note> Source indicates where the signal comes from (pin or macrocell).
-
-
-
-
-PostFit_Equations
-~~~~~~~~~~~~~~~~~
-
-
- P-Terms Fan-in Fan-out Type Name (attributes)
---------- ------ ------- ---- -----------------
- 1 1 1 Pin MMU_OUT_15_
- 1 3 1 Pin CSROML-
- 1 3 1 Pin CSROMH-
- 1 1 1 Pin MMU_OUT_14_
- 1 1 1 Pin CSRAM
- 1 1 1 Pin MMU_OUT_13_
- 0 0 1 Pin CSUART
- 1 1 1 Pin MMU_OUT_12_
- 0 0 1 Pin CSCTC
- 1 7 1 Pin CSPIO-
-=========
- 8 P-Term Total: 8
- Total Pins: 21
- Total Nodes: 0
- Average P-Term/Output: 0
-
-
-Equations:
-
-MMU_OUT_15_ = (MMU_IN_15_);
-
-!CSROML = (!MMU_IN_15_ & !MMU_IN_14_ & !MMU_IN_13_);
-
-!CSROMH = (!MMU_IN_15_ & !MMU_IN_14_ & MMU_IN_13_);
-
-MMU_OUT_14_ = (MMU_IN_14_);
-
-CSRAM = (!MMU_IN_15_);
-
-MMU_OUT_13_ = (MMU_IN_13_);
-
-CSUART = (0);
-
-MMU_OUT_12_ = (MMU_IN_12_);
-
-CSCTC = (0);
-
-!CSPIO = (!IORQ & !MMU_IN_7_ & !MMU_IN_6_ & !MMU_IN_5_ & MMU_IN_4_ & !MMU_IN_3_ & !MMU_IN_2_);
-
-
-Reverse-Polarity Equations:
-
diff --git a/sw/cpld/address_decoder.rs2 b/sw/cpld/address_decoder.rs2 deleted file mode 100755 index 431754c..0000000 --- a/sw/cpld/address_decoder.rs2 +++ /dev/null @@ -1 +0,0 @@ --inp "address_decoder.tt4" -vci "address_decoder.vct" -typ pla -mod loc -dir "c:\_prossn\cpld.nao" -DP1 eq3 -DP2 eq3 -lab Constraint#Editor -ntyp BLIF -nfile "address_decoder.bl2" -DP3 bl2 -ntyp BLIF -nfile "address_decoder.bl2" -DP3 bl2
diff --git a/sw/cpld/address_decoder.rs3 b/sw/cpld/address_decoder.rs3 deleted file mode 100755 index 1ec4e71..0000000 --- a/sw/cpld/address_decoder.rs3 +++ /dev/null @@ -1 +0,0 @@ --inp "address_decoder.tt4" -vci "address_decoder.vco" -typ pla -mod nil -lab Post-Fit#Pinouts
diff --git a/sw/cpld/address_decoder.sdf b/sw/cpld/address_decoder.sdf deleted file mode 100755 index 3823d8f..0000000 --- a/sw/cpld/address_decoder.sdf +++ /dev/null @@ -1,204 +0,0 @@ -// SDF delay-file
-(DELAYFILE
- (SDFVERSION "2.1")
- (DESIGN "address_decoder")
- (DATE "11/13/2017 11:47:12")
- (VENDOR "Lattice Semiconductor")
- (PROGRAM "SDF Generator")
- (VERSION "8.3.02.12_DE_HDL_BASE Data sheet version: 1.01")
- (DIVIDER /)
- (VOLTAGE :5.0:)
- (PROCESS "typical")
- (TEMPERATURE :25:)
- (TIMESCALE 100ps)
- (CELL
- (CELLTYPE "OBUF")
- (INSTANCE OUT_MMU_OUT_15_I_1)
- (DELAY
- (ABSOLUTE
- (IOPATH I0 O (20:20:20) (20:20:20) )
- )
- )
- )
- (CELL
- (CELLTYPE "OBUF")
- (INSTANCE OUT_CSROML_I_1)
- (DELAY
- (ABSOLUTE
- (IOPATH I0 O (20:20:20) (20:20:20) )
- )
- )
- )
- (CELL
- (CELLTYPE "OBUF")
- (INSTANCE OUT_CSROMH_I_1)
- (DELAY
- (ABSOLUTE
- (IOPATH I0 O (20:20:20) (20:20:20) )
- )
- )
- )
- (CELL
- (CELLTYPE "OBUF")
- (INSTANCE OUT_CSRAM_I_1)
- (DELAY
- (ABSOLUTE
- (IOPATH I0 O (20:20:20) (20:20:20) )
- )
- )
- )
- (CELL
- (CELLTYPE "OBUF")
- (INSTANCE OUT_CSUART_I_1)
- (DELAY
- (ABSOLUTE
- (IOPATH I0 O (20:20:20) (20:20:20) )
- )
- )
- )
- (CELL
- (CELLTYPE "OBUF")
- (INSTANCE OUT_CSCTC_I_1)
- (DELAY
- (ABSOLUTE
- (IOPATH I0 O (20:20:20) (20:20:20) )
- )
- )
- )
- (CELL
- (CELLTYPE "OBUF")
- (INSTANCE OUT_CSPIO_I_1)
- (DELAY
- (ABSOLUTE
- (IOPATH I0 O (20:20:20) (20:20:20) )
- )
- )
- )
- (CELL
- (CELLTYPE "OBUF")
- (INSTANCE OUT_MMU_OUT_14_I_1)
- (DELAY
- (ABSOLUTE
- (IOPATH I0 O (20:20:20) (20:20:20) )
- )
- )
- )
- (CELL
- (CELLTYPE "OBUF")
- (INSTANCE OUT_MMU_OUT_13_I_1)
- (DELAY
- (ABSOLUTE
- (IOPATH I0 O (20:20:20) (20:20:20) )
- )
- )
- )
- (CELL
- (CELLTYPE "OBUF")
- (INSTANCE OUT_MMU_OUT_12_I_1)
- (DELAY
- (ABSOLUTE
- (IOPATH I0 O (20:20:20) (20:20:20) )
- )
- )
- )
- (CELL
- (CELLTYPE "BUFF")
- (INSTANCE GATE_MMU_OUT_15_I_1)
- (DELAY
- (ABSOLUTE
- (PORT I0 (0:0:0) (0:0:0) )
- (IOPATH I0 O (130:130:130) (130:130:130) )
- )
- )
- )
- (CELL
- (CELLTYPE "INV")
- (INSTANCE GATE_CSRAM_I_1)
- (DELAY
- (ABSOLUTE
- (PORT I0 (0:0:0) (0:0:0) )
- (IOPATH I0 O (130:130:130) (130:130:130) )
- )
- )
- )
- (CELL
- (CELLTYPE "BUFF")
- (INSTANCE GATE_MMU_OUT_14_I_1)
- (DELAY
- (ABSOLUTE
- (PORT I0 (0:0:0) (0:0:0) )
- (IOPATH I0 O (130:130:130) (130:130:130) )
- )
- )
- )
- (CELL
- (CELLTYPE "BUFF")
- (INSTANCE GATE_MMU_OUT_13_I_1)
- (DELAY
- (ABSOLUTE
- (PORT I0 (0:0:0) (0:0:0) )
- (IOPATH I0 O (130:130:130) (130:130:130) )
- )
- )
- )
- (CELL
- (CELLTYPE "BUFF")
- (INSTANCE GATE_MMU_OUT_12_I_1)
- (DELAY
- (ABSOLUTE
- (PORT I0 (0:0:0) (0:0:0) )
- (IOPATH I0 O (130:130:130) (130:130:130) )
- )
- )
- )
- (CELL
- (CELLTYPE "INV")
- (INSTANCE GATE_CSROML_I_1)
- (DELAY
- (ABSOLUTE
- (PORT I0 (0:0:0) (0:0:0) )
- (IOPATH I0 O (130:130:130) (130:130:130) )
- )
- )
- )
- (CELL
- (CELLTYPE "INV")
- (INSTANCE GATE_CSROMH_I_1)
- (DELAY
- (ABSOLUTE
- (PORT I0 (0:0:0) (0:0:0) )
- (IOPATH I0 O (130:130:130) (130:130:130) )
- )
- )
- )
- (CELL
- (CELLTYPE "INV")
- (INSTANCE GATE_CSUART_I_1)
- (DELAY
- (ABSOLUTE
- (PORT I0 (0:0:0) (0:0:0) )
- (IOPATH I0 O (130:130:130) (130:130:130) )
- )
- )
- )
- (CELL
- (CELLTYPE "INV")
- (INSTANCE GATE_CSCTC_I_1)
- (DELAY
- (ABSOLUTE
- (PORT I0 (0:0:0) (0:0:0) )
- (IOPATH I0 O (130:130:130) (130:130:130) )
- )
- )
- )
- (CELL
- (CELLTYPE "INV")
- (INSTANCE GATE_CSPIO_I_1)
- (DELAY
- (ABSOLUTE
- (PORT I0 (0:0:0) (0:0:0) )
- (IOPATH I0 O (130:130:130) (130:130:130) )
- )
- )
- )
-)
diff --git a/sw/cpld/address_decoder.srm b/sw/cpld/address_decoder.srm deleted file mode 100755 index 650d915..0000000 --- a/sw/cpld/address_decoder.srm +++ /dev/null @@ -1,212 +0,0 @@ -f "noname"; #file 0
-f "c:\isptools\synpbase\lib\vhd\std.vhd"; #file 1
-f "c:\_prossn\cpld.nao\address_decoder.vhd"; #file 2
-f "c:\isptools\synpbase\lib\vhd\std1164.vhd"; #file 3
-f "c:\isptools\synpbase\lib\vhd\arith.vhd"; #file 4
-f "c:\isptools\synpbase\lib\vhd\unsigned.vhd"; #file 5
-@ERMRlENORzQAwsRbH
-l;N3PRHs#bH4lR;R
-FmN;
-HbR3F8s0H"sRF"k0;R
-HQ
-j;N3HRb0Fs8RHs""HM;R
-bfjj:RVLkRmmRR;Qj
-fbRjR:j0CskRk0sCsR0k
-C;bjRf:VjRNCD#RDVN#VCRNCD#;R
-MROlNEARmzbwRs;Hl
-RNP3bH#sRHl4F;
-R
-m;N3HRb0Fs8RHs"0Fk"H;
-R;Qj
-RNH3sbF0s8HRM"H"b;
-R:fjjkRLVRRmmjRQ;R
-bfjj:Rk0sCsR0k0CRs;kC
-fbRjR:jV#NDCNRVDR#CV#NDCM;
-RNRlOqERhR7.blsH;P
-NR#3HblsHR
-4;F;Rm
-RNH3sbF0s8HRk"F0
-";HjRQ;H
-NRF3bsH08sHR"M
-";H4RQ;H
-NRF3bsH08sHR"M
-";bjRf:0jRsRkC0CskRk0sCb;
-R:fjjNRVDR#CV#NDCNRVD;#C
-fbRjR:jNPM8RmmRRRQjQ
-4;MlRRNROEQRheblsH;P
-NR#3HblsHR
-4;F;Rm
-RNH3sbF0s8HRk"F0
-";HjRQ;H
-NRF3bsH08sHR"M
-";bjRf:HjRMmPRRQmRjb;
-R:fjjsR0k0CRsRkC0Csk;R
-bfjj:RDVN#VCRNCD#RDVN#
-C;M@R@.::n(::n.R4RI FsR7q7)1 1_B7 m)7 RELCNFPHs;ND
-RNP3#FLF8b0FRMC4N;
-PHR3#8PED;R4
-@HR@g.::g4::vnRvQz_h6r4:Rj9v_vzQ4hr69:j;H
-NR83CHsVNsMN$NRlCv_vzQ;hR
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-NR83CHsVNsMN$NRlCv_vzmRza;H
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-@HR@4.:c::44cc:R)QmTN;
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-F@:@..4c:::.c61RBB;aB
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-";F@R@.6:.:.4:6R:6BQ1umN;
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-sfjj:ROlNEARQzbwRsRHlQTm)
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-E;sjRf:ljRNROEQRheblsHR_FbokC_M_.cOF#slHE_
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-Sjb=F__oCkcM._sO#F;lE
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-
diff --git a/sw/cpld/address_decoder.srs b/sw/cpld/address_decoder.srs deleted file mode 100755 index aaeb250..0000000 --- a/sw/cpld/address_decoder.srs +++ /dev/null @@ -1,52 +0,0 @@ -#
-#
-#
-# Created by Synplify VHDL Compiler version 5.3.0 from Synplicity, Inc.
-# Copyright 1994-1999 Synplicity, Inc. , All rights reserved.
-# Synthesis Netlist written on Thu Nov 23 11:54:34 2017
-#
-#
-#OPTIONS:"|-ram|-sm|-fid2|-sharing|on|-encrypt|-top|ADDRESS_DECODER|-ui|-lite|-lib|work"
-#CUR:"C:\\ISPTOOLS\\SYNPBASE\\bin\\c_vhdl.exe":944583556l
-#CUR:"C:\\ISPTOOLS\\SYNPBASE\\lib\\vhd\\location.map":975422018l
-#CUR:"C:\\ISPTOOLS\\SYNPBASE\\lib\\vhd\\std.vhd":927461368l
-#CUR:"C:\\_prossn\\cpld.nao\\address_decoder.vhd":1511438068l
-#CUR:"C:\\ISPTOOLS\\SYNPBASE\\lib\\vhd\\std1164.vhd":927461368l
-#CUR:"C:\\ISPTOOLS\\SYNPBASE\\lib\\vhd\\arith.vhd":941645104l
-#CUR:"C:\\ISPTOOLS\\SYNPBASE\\lib\\vhd\\unsigned.vhd":927461368l
-f "C:\ISPTOOLS\SYNPBASE\lib\vhd\std.vhd"; # file 0
-f "C:\_prossn\cpld.nao\address_decoder.vhd"; # file 1
-f "C:\ISPTOOLS\SYNPBASE\lib\vhd\std1164.vhd"; # file 2
-f "C:\ISPTOOLS\SYNPBASE\lib\vhd\arith.vhd"; # file 3
-f "C:\ISPTOOLS\SYNPBASE\lib\vhd\unsigned.vhd"; # file 4
-@E@MR@n4::n(::R.4I FsR7q7)1 1_B7 m)7 RELCNFPHs;ND
-RNP3PH#ER8D4H;
-R4@@:4g::ng:Rzvv_rQh4j6:9vRvzh_Qr:46j
-9;F@R@44:4:44:4R:(v_vzmrza446:.v9RvQz_h6r4:94.;R
-H@:@444c:::4ccmRQ)QTRm;)T
-@HR@44:6::44.6:RR)7)
-7;F@R@4g:4:44:gR:nBm1)vkpRMk4_M_.cOF#sl
-E;F@R@4j:.:.4:jR:nBm1)vO]R#lsFEF;
-R4@@::.444:.:B6R1v)qR4kM_kll_rHM4;69
-@FR@.4:d::4.nd:RzB1qR)aBq1z)
-a;F@R@4c:.:.4:cR:6Ba1BB1RBB;aB
-@FR@.4:6::4.66:RuB1QOmR#FbH;R
-b@:@4g::4gR:nHRMPk_M4l_lkH4Mr6k9RMl4_lHk_M6r49vRvzh_Qr946;R
-b@:@444c:::4ccMRHPMRk4F_HskJRMH4_FRsJQTm);R
-b@:@j4::44R:.0CskRk0sCsR0k
-C;b@R@j::44::4.NRVDR#CV#NDCNRVD;#C
-@bR@4j::44::L.RkBVR1BBaRBB1aVBRNCD#;R
-b@:@j4::44R:.LRkVBq1z)BaR1)zqaNRVD;#C
-@bR@.d:64.:(6:...:6RRD0Fob_CM_k.Oc_#FbHR_FbokC_M_.cOH#bFvRvzh_Qrj(:9NRVD,#CV#NDCN,VD,#C0Csk,DVN#VC,NCD#,DVN#VC,NCD#;R
-b@:@d.:(n4.(:(6n:40RDR_FbDk0_M_44OH#bFbRF__D0k4M4_bO#HvFRvQz_h:r(jV9RNCD#,DVN#VC,NCD#,k0sCN,VD,#C0Csk,DVN#VC,NCD#;R
-b@:@d.:6.4.(:66.:.MRHPMRk4M_k.Oc_#FbHR4kM_.kMc#_ObRHFFob_CM_k.Oc_#FbH;R
-b@:@d.:6.4.(:66.:.0RDR_FbokC_M_.cOF#slFERbC_o_.kMc#_OsEFlRzvv_rQh4j6:9NRVD,#CV#NDCs,0kVC,NCD#,DVN#VC,NCD#,DVN#VC,NCD#,DVN#VC,NCD#,DVN#VC,NCD#,DVN#VC,NCD#,DVN#VC,NCD#;R
-b@:@d.:(n4.(:(6n:40RDR_FbDk0_M_44OF#slFERb0_D_4kM4#_OsEFlRzvv_rQh4j6:9NRVD,#C0Csk,DVN#VC,NCD#,DVN#VC,NCD#,DVN#VC,NCD#,DVN#VC,NCD#,DVN#VC,NCD#,DVN#VC,NCD#,DVN#VC,NCD#;R
-b@:@d.:6.4.(:66.:.MRHPMRk4M_k.Oc_#lsFEMRk4M_k.Oc_#lsFEbRF__oCkcM._sO#F;lE
-@bR@c4:64:.::c6UN6RMR8PknM._bO#HkFRM_.nOH#bFbRF__D0k4M4_bO#HkFRMk4_M_.cOH#bFR
-RRMRk4F_Hs
-J;b@R@46:c:c(:6R:UHRMPOH#bF#RObRHFknM._bO#H
-F;b@R@4d:6::..6nd:6MRN8kPRM_4.OF#slkERM_4.OF#slFERb0_D_4kM4#_OsEFlR4kM_.kMc#_OsEFl;R
-b@:@46Ud:::6dgMRHP#ROsEFlRsO#FRlEk.M4_sO#F;lE
-
-C;
diff --git a/sw/cpld/address_decoder.sym b/sw/cpld/address_decoder.sym Binary files differdeleted file mode 100755 index 15805d3..0000000 --- a/sw/cpld/address_decoder.sym +++ /dev/null diff --git a/sw/cpld/address_decoder.syn b/sw/cpld/address_decoder.syn deleted file mode 100755 index 414a0b4..0000000 --- a/sw/cpld/address_decoder.syn +++ /dev/null @@ -1,8 +0,0 @@ -JDF B
-// Created by Version 8.3
-PROJECT Untitled
-DESIGN address_decoder Normal
-DEVKIT M4-32/32-15JC
-ENTRY Schematic/VHDL
-MODULE address_decoder.vhd
-MODSTYLE ADDRESS_DECODER Normal
diff --git a/sw/cpld/address_decoder.tal b/sw/cpld/address_decoder.tal deleted file mode 100755 index 434ebe5..0000000 --- a/sw/cpld/address_decoder.tal +++ /dev/null @@ -1,42 +0,0 @@ -
-
-Design Name = address_decoder.tt4
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-
-*******************
-* TIMING ANALYSIS *
-*******************
-
-Timing Analysis KEY:
-One unit of delay time is equivalent to one pass
- through the Central Switch Matrix.
-.. Delay ( in this column ) not applicable to the indicated signal.
-TSU, Set-Up Time ( 0 for input-paired signals ),
- represents the number of switch matrix passes between
- an input pin and a register setup before clock.
- TSU is reported on the register.
-TCO, Clocked Output-to-Pin Time ( 0 for output-paired signals ),
- represents the number of switch matrix passes between
- a clocked register and an output pin.
- TCO is reported on the register.
-TPD, Propagation Delay Time ( calculated only for combinatorial eqns.),
- represents the number of switch matrix passes between
- an input pin and an output pin.
- TPD is reported on the output pin.
-TCR, Clocked Output-to-Register Time,
- represents the number of switch matrix passes between
- a clocked register and the register it drives ( before clock ).
- TCR is reported on the driving register.
-
- TSU TCO TPD TCR
- #passes #passes #passes #passes
-SIGNAL NAME min max min max min max min max
- MMU_OUT_15_ .. .. .. .. 1 1 .. ..
- CSROML .. .. .. .. 1 1 .. ..
- CSROMH .. .. .. .. 1 1 .. ..
- MMU_OUT_14_ .. .. .. .. 1 1 .. ..
- CSRAM .. .. .. .. 1 1 .. ..
- MMU_OUT_13_ .. .. .. .. 1 1 .. ..
- MMU_OUT_12_ .. .. .. .. 1 1 .. ..
- CSPIO .. .. .. .. 1 1 .. ..
\ No newline at end of file diff --git a/sw/cpld/address_decoder.tc_ b/sw/cpld/address_decoder.tc_ deleted file mode 100755 index 0054dc8..0000000 --- a/sw/cpld/address_decoder.tc_ +++ /dev/null @@ -1,37 +0,0 @@ -#-- Synplicity, Inc.
-#-- Synplify version 5.3.2
-#-- Project file C:\_prossn\cpld.nao\address_decoder.tc_
-#-- Written on Thu Nov 23 11:54:34 2017
-
-#device options
-set_option -technology mach
-set_option -part MACH111
-
-#add_file options
-add_file -vhdl -lib work "address_decoder.vhd"
-
-#compilation/mapping options
-set_option -default_enum_encoding onehot
-set_option -symbolic_fsm_compiler false
-set_option -resource_sharing true
-
-#map options
-set_option -frequency 0.000
-set_option -fanin_limit 20
-set_option -max_terms_per_macrocell 16
-set_option -map_logic false
-set_option -area_delay_percent 0
-set_option -top_module ADDRESS_DECODER
-
-#simulation options
-set_option -write_verilog true
-set_option -write_vhdl true
-
-#automatic place and route (vendor) options
-set_option -write_apr_constraint true
-
-#MTI Cross Probe options
-set_option -mti_root ""
-
-#set result format/file last
-project -result_file "address_decoder.edi"
diff --git a/sw/cpld/address_decoder.tlg b/sw/cpld/address_decoder.tlg deleted file mode 100755 index b1a2595..0000000 --- a/sw/cpld/address_decoder.tlg +++ /dev/null @@ -1,3 +0,0 @@ -Synthesizing work.address_decoder.behavioral
-Post processing for work.address_decoder.behavioral
-@W:"C:\_prossn\cpld.nao\address_decoder.vhd":15:1:15:2|Input rd is unused
diff --git a/sw/cpld/address_decoder.trp b/sw/cpld/address_decoder.trp deleted file mode 100755 index 2c329e3..0000000 --- a/sw/cpld/address_decoder.trp +++ /dev/null @@ -1,75 +0,0 @@ -
-Timing Report for STAMP
-
-// Project = address_decoder
-// Family = M4
-// Device = M4-32/32
-// Speed = -15
-// Voltage = 5.0
-// Operating Condition = COM
-// Data sheet version = 1.01
-
-// Pass Bidirection = OFF
-// Pass S/R = OFF
-// Pass Latch = OFF
-// Pass Clock = OFF
-// Maximum Paths = 20
-// T_SU Endpoints D/T inputs = ON
-// T_SU Endpoints CE inputs = OFF
-// T_SU Endpoints S/R inputs = OFF
-
-
-Section IO
- //DESTINATION NODES;
- CSCTC [out]
- CSPIO [out]
- CSRAM [out]
- CSROMH [out]
- CSROML [out]
- CSUART [out]
- MMU_OUT[12] [out]
- MMU_OUT[13] [out]
- MMU_OUT[14] [out]
- MMU_OUT[15] [out]
-
- //SOURCE NODES;
- MMU_IN[2] [in]
- MMU_IN[3] [in]
- MMU_IN[4] [in]
- MMU_IN[5] [in]
- MMU_IN[6] [in]
- MMU_IN[7] [in]
- MMU_IN[8] [in]
- MMU_IN[9] [in]
- MMU_IN[10] [in]
- MMU_IN[11] [in]
- MMU_IN[12] [in]
- MMU_IN[13] [in]
- MMU_IN[14] [in]
- MMU_IN[15] [in]
-
-
-Section tPD
-
- Delay Location(From => To) Source Destination
- ===== ==================== ====== ===========
- 15.0 p7 => p27 MMU_IN[2] CSUART
- 15.0 p6 => p27 MMU_IN[3] CSUART
- 15.0 p5 => p27 MMU_IN[4] CSUART
- 15.0 p4 => p27 MMU_IN[5] CSUART
- 15.0 p3 => p27 MMU_IN[6] CSUART
- 15.0 p2 => p27 MMU_IN[7] CSUART
- 15.0 p14 => p28 MMU_IN[8] CSCTC
- 15.0 p14 => p29 MMU_IN[8] CSPIO
- 15.0 p14 => p27 MMU_IN[8] CSUART
- 15.0 p15 => p28 MMU_IN[9] CSCTC
- 15.0 p15 => p29 MMU_IN[9] CSPIO
- 15.0 p15 => p27 MMU_IN[9] CSUART
- 15.0 p16 => p28 MMU_IN[10] CSCTC
- 15.0 p16 => p29 MMU_IN[10] CSPIO
- 15.0 p16 => p27 MMU_IN[10] CSUART
- 15.0 p17 => p28 MMU_IN[11] CSCTC
- 15.0 p17 => p29 MMU_IN[11] CSPIO
- 15.0 p17 => p27 MMU_IN[11] CSUART
- 15.0 p18 => p28 MMU_IN[12] CSCTC
- 15.0 p18 => p29 MMU_IN[12] CSPIO
diff --git a/sw/cpld/address_decoder.tt2 b/sw/cpld/address_decoder.tt2 deleted file mode 100755 index 9c670f0..0000000 --- a/sw/cpld/address_decoder.tt2 +++ /dev/null @@ -1,33 +0,0 @@ -#$ TOOL ispDesignEXPERT 8.3.02.12
-#$ DATE Thu Nov 23 11:54:43 2017
-#$ MODULE address_decoder
-#$ PINS 21 MMU_IN_7_ MMU_IN_6_ MMU_IN_15_ MMU_IN_5_ MMU_IN_4_ MMU_OUT_15_ MMU_IN_3_ IORQ MMU_IN_2_ CSROML CSROMH MMU_OUT_14_ CSRAM MMU_OUT_13_ CSUART MMU_OUT_12_ CSCTC CSPIO MMU_IN_14_ MMU_IN_13_ MMU_IN_12_
-.type fr
-.i 11
-.o 10
-.ilb MMU_IN_15_ IORQ MMU_IN_14_ MMU_IN_13_ MMU_IN_12_ MMU_IN_7_ MMU_IN_6_ MMU_IN_5_ MMU_IN_4_ MMU_IN_3_ MMU_IN_2_
-.ob MMU_OUT_15_ CSROML CSROMH CSRAM CSUART CSCTC CSPIO MMU_OUT_14_ MMU_OUT_13_ MMU_OUT_12_
-.p 22
-1---------- 111~~~~~~~
-0---------- ~~~1~~~~~~
--1--------- ~~~~~~1~~~
---1-------- ~11~~~~1~~
----1------- ~1~~~~~~1~
----0------- ~~1~~~~~~~
-----1------ ~~~~~~~~~1
------1----- ~~~~~~1~~~
-------1---- ~~~~~~1~~~
--------1--- ~~~~~~1~~~
---------0-- ~~~~~~1~~~
----------1- ~~~~~~1~~~
-----------1 ~~~~~~1~~~
------------ ~~~~00~~~~
-1---------- ~~~0~~~~~~
-0---------- 0~~~~~~~~~
---0-------- ~~~~~~~0~~
-0-01------- ~~0~~~~~~~
----0------- ~~~~~~~~0~
-0-00------- ~0~~~~~~~~
-----0------ ~~~~~~~~~0
--0---000100 ~~~~~~0~~~
-.end
diff --git a/sw/cpld/address_decoder.tt3 b/sw/cpld/address_decoder.tt3 deleted file mode 100755 index 7df2081..0000000 --- a/sw/cpld/address_decoder.tt3 +++ /dev/null @@ -1,33 +0,0 @@ -#$ TOOL ispDesignEXPERT 8.3.02.12
-#$ DATE Thu Nov 23 11:54:43 2017
-#$ MODULE address_decoder
-#$ PINS 21 MMU_IN_7_ MMU_IN_6_ MMU_IN_15_ MMU_IN_5_ MMU_IN_4_ MMU_OUT_15_ MMU_IN_3_ IORQ MMU_IN_2_ CSROML CSROMH MMU_OUT_14_ CSRAM MMU_OUT_13_ CSUART MMU_OUT_12_ CSCTC CSPIO MMU_IN_14_ MMU_IN_13_ MMU_IN_12_
-.type fr
-.i 11
-.o 10
-.ilb MMU_IN_15_ IORQ MMU_IN_14_ MMU_IN_13_ MMU_IN_12_ MMU_IN_7_ MMU_IN_6_ MMU_IN_5_ MMU_IN_4_ MMU_IN_3_ MMU_IN_2_
-.ob MMU_OUT_15_ CSROML CSROMH CSRAM CSUART CSCTC CSPIO MMU_OUT_14_ MMU_OUT_13_ MMU_OUT_12_
-.p 22
-1---------- 111~~~~~~~
-0---------- ~~~1~~~~~~
--1--------- ~~~~~~1~~~
---1-------- ~11~~~~1~~
----1------- ~1~~~~~~1~
----0------- ~~1~~~~~~~
-----1------ ~~~~~~~~~1
------1----- ~~~~~~1~~~
-------1---- ~~~~~~1~~~
--------1--- ~~~~~~1~~~
---------0-- ~~~~~~1~~~
----------1- ~~~~~~1~~~
-----------1 ~~~~~~1~~~
------------ ~~~~00~~~~
-1---------- ~~~0~~~~~~
-0---------- 0~~~~~~~~~
---0-------- ~~~~~~~0~~
-0-01------- ~~0~~~~~~~
----0------- ~~~~~~~~0~
-0-00------- ~0~~~~~~~~
-----0------ ~~~~~~~~~0
--0---000100 ~~~~~~0~~~
-.end
diff --git a/sw/cpld/address_decoder.tt4 b/sw/cpld/address_decoder.tt4 deleted file mode 100755 index 4a58b90..0000000 --- a/sw/cpld/address_decoder.tt4 +++ /dev/null @@ -1,25 +0,0 @@ -#$ TOOL ispDesignEXPERT 8.3.02.12
-#$ DATE Thu Nov 23 11:54:43 2017
-#$ MODULE ADDRESS_DECODER
-#$ PINS 21 MMU_IN_7_ MMU_IN_6_ MMU_IN_15_ MMU_IN_5_ MMU_IN_4_ MMU_OUT_15_
- MMU_IN_3_ IORQ MMU_IN_2_ CSROML CSROMH MMU_OUT_14_ CSRAM MMU_OUT_13_ CSUART
- MMU_OUT_12_ CSCTC CSPIO MMU_IN_14_ MMU_IN_13_ MMU_IN_12_
-.type f
-.i 11
-.o 10
-.ilb MMU_IN_15_ IORQ MMU_IN_14_ MMU_IN_13_ MMU_IN_12_ MMU_IN_7_ MMU_IN_6_
- MMU_IN_5_ MMU_IN_4_ MMU_IN_3_ MMU_IN_2_
-.ob MMU_OUT_15_ CSROML% CSROMH% MMU_OUT_14_ CSRAM MMU_OUT_13_ CSUART MMU_OUT_12_
- CSCTC CSPIO%
-.phase 1111111111
-.p 9
-1---------- 1000000000
-0-00------- 0100000000
-0-01------- 0010000000
---1-------- 0001000000
-0---------- 0000100000
----1------- 0000010000
------------ 0000000000
-----1------ 0000000100
--0---000100 0000000001
-.end
diff --git a/sw/cpld/address_decoder.tte b/sw/cpld/address_decoder.tte deleted file mode 100755 index 94da533..0000000 --- a/sw/cpld/address_decoder.tte +++ /dev/null @@ -1,25 +0,0 @@ -#$ TOOL ispDesignEXPERT 8.3.02.12
-#$ DATE Thu Nov 23 11:54:43 2017
-#$ MODULE ADDRESS_DECODER
-#$ PINS 21 MMU_IN_7_ MMU_IN_6_ MMU_IN_15_ MMU_IN_5_ MMU_IN_4_ MMU_OUT_15_
- MMU_IN_3_ IORQ MMU_IN_2_ CSROML CSROMH MMU_OUT_14_ CSRAM MMU_OUT_13_ CSUART
- MMU_OUT_12_ CSCTC CSPIO MMU_IN_14_ MMU_IN_13_ MMU_IN_12_
-.type f
-.i 11
-.o 10
-.ilb MMU_IN_15_ IORQ MMU_IN_14_ MMU_IN_13_ MMU_IN_12_ MMU_IN_7_ MMU_IN_6_
- MMU_IN_5_ MMU_IN_4_ MMU_IN_3_ MMU_IN_2_
-.ob MMU_OUT_15_ CSROML- CSROMH- MMU_OUT_14_ CSRAM MMU_OUT_13_ CSUART MMU_OUT_12_
- CSCTC CSPIO-
-.phase 1111111111
-.p 9
-1---------- 1000000000
-0-00------- 0100000000
-0-01------- 0010000000
---1-------- 0001000000
-0---------- 0000100000
----1------- 0000010000
------------ 0000000000
-----1------ 0000000100
--0---000100 0000000001
-.end
diff --git a/sw/cpld/address_decoder.vci b/sw/cpld/address_decoder.vci deleted file mode 100755 index 2582a78..0000000 --- a/sw/cpld/address_decoder.vci +++ /dev/null @@ -1,82 +0,0 @@ -
-[Device]
-Family = M4;
-PartNumber = M4-32/32-15JC;
-Package = 44PLCC;
-PartType = M4-32/32;
-Speed = -15;
-Operating_condition = COM;
-Status = Production;
-
-[Revision]
-Parent = m4.vci;
-Design = ;
-DATE = 09/25/2017;
-TIME = 16:10:34;
-
-[IGNORE ASSIGNMENTS]
-
-[CLEAR ASSIGNMENTS]
-
-[BACKANNOTATE ASSIGNMENTS]
-
-[GLOBAL PROJECT OPTIMIZATION]
-
-[OPTIMIZATION OPTIONS]
-
-[FITTER GLOBAL OPTIONS]
-
-[LOCATION ASSIGNMENT]
-layer = OFF;
-CSROML = Output, 24, B, -;
-CSROMH = Output, 25, B, -;
-CSRAM = Output, 26, B, -;
-CSUART = Output, 27, B, -;
-CSCTC = Output, 28, B, -;
-CSPIO = Output, 29, B, -;
-MMU_IN_0_ = Input, 9, A, -;
-MMU_IN_1_ = Input, 8, A, -;
-MMU_IN_2_ = Input, 7, A, -;
-MMU_IN_3_ = Input, 6, A, -;
-MMU_IN_4_ = Input, 5, A, -;
-MMU_IN_5_ = Input, 4, A, -;
-MMU_IN_6_ = Input, 3, A, -;
-MMU_IN_7_ = Input, 2, A, -;
-MMU_IN_8_ = Input, 14, A, -;
-MMU_IN_9_ = Input, 15, A, -;
-MMU_IN_10_ = Input, 16, A, -;
-MMU_IN_11_ = Input, 17, A, -;
-MMU_IN_12_ = Input, 18, A, -;
-MMU_IN_13_ = Input, 19, A, -;
-MMU_IN_14_ = Input, 20, A, -;
-MMU_IN_15_ = Input, 21, A, -;
-MMU_OUT_12_ = Output, 39, B, -;
-MMU_OUT_13_ = Output, 38, B, -;
-MMU_OUT_14_ = Output, 37, B, -;
-MMU_OUT_15_ = Output, 36, B, -;
-IORQ = Input, 30, B, -;
-
-[GROUP ASSIGNMENT]
-layer = OFF;
-
-[SPACE RESERVATIONS]
-layer = OFF;
-
-[PIN RESERVATIONS]
-layer = OFF;
-
-[FITTER REPORT FORMAT]
-
-[POWER]
-
-[SOURCE CONSTRAINT OPTION]
-
-[HARDWARE DEVICE OPTIONS]
-
-[PULL]
-
-[OPENDRAIN]
-
-[Timing Analyzer]
-
-[Backannotate Netlist]
diff --git a/sw/cpld/address_decoder.vcl b/sw/cpld/address_decoder.vcl deleted file mode 100755 index 6befbd2..0000000 --- a/sw/cpld/address_decoder.vcl +++ /dev/null @@ -1,136 +0,0 @@ -[DEVICE]
-
-Family = M4;
-PartType = M4-32/32;
-Package = 44PLCC;
-PartNumber = M4-32/32-15JC;
-Speed = -15;
-Operating_condition = COM;
-EN_Segment = NO;
-Pin_MC_1to1 = NO;
-Voltage = 5.0;
-
-[REVISION]
-
-RCS = "$Revision: 1.24 $";
-Parent = m4.vci;
-SDS_file = m4.sds;
-Design = address_decoder.tt4;
-Rev = 0.01;
-DATE = 11/23/17;
-TIME = 11:55:45;
-Type = TT2;
-Pre_Fit_Time = 1;
-Source_Format = ABEL_Schematic;
-
-[IGNORE ASSIGNMENTS]
-
-Pin_Assignments = NO;
-Pin_Keep_Block = NO;
-Pin_Keep_Segment = NO;
-Group_Assignments = NO;
-Macrocell_Assignments = NO;
-Macrocell_Keep_Block = NO;
-Macrocell_Keep_Segment = NO;
-Pin_Reservation = NO;
-Timing_Constraints = NO;
-Block_Reservation = NO;
-Segment_Reservation = NO;
-Ignore_Source_Location = NO;
-Ignore_Source_Optimization = NO;
-Ignore_Source_Timing = NO;
-
-[CLEAR ASSIGNMENTS]
-
-Pin_Assignments = NO;
-Pin_Keep_Block = NO;
-Pin_Keep_Segment = NO;
-Group_Assignments = NO;
-Macrocell_Assignments = NO;
-Macrocell_Keep_Block = NO;
-Macrocell_Keep_Segment = NO;
-Pin_Reservation = NO;
-Timing_Constraints = NO;
-Block_Reservation = NO;
-Segment_Reservation = NO;
-Ignore_Source_Location = NO;
-Ignore_Source_Optimization = NO;
-Ignore_Source_Timing = NO;
-
-[BACKANNOTATE NETLIST]
-
-Netlist = VHDL;
-Delay_File = SDF;
-Generic_VCC = ;
-Generic_GND = ;
-
-[BACKANNOTATE ASSIGNMENTS]
-
-Pin_Assignment = NO;
-Pin_Block = NO;
-Pin_Macrocell_Block = NO;
-Routing = NO;
-
-[GLOBAL PROJECT OPTIMIZATION]
-
-Balanced_Partitioning = YES;
-Spread_Placement = YES;
-Max_Pin_Percent = 100;
-Max_Macrocell_Percent = 100;
-Max_Inter_Seg_Percent = 100;
-Max_Seg_In_Percent = 100;
-Max_Blk_In_Percent = 100;
-
-[FITTER REPORT FORMAT]
-
-Fitter_Options = YES;
-Pinout_Diagram = NO;
-Pinout_Listing = YES;
-Detailed_Block_Segment_Summary = YES;
-Input_Signal_List = YES;
-Output_Signal_List = YES;
-Bidir_Signal_List = YES;
-Node_Signal_List = YES;
-Signal_Fanout_List = YES;
-Block_Segment_Fanin_List = YES;
-Prefit_Eqn = YES;
-Postfit_Eqn = YES;
-Page_Break = YES;
-
-[OPTIMIZATION OPTIONS]
-
-Logic_Reduction = YES;
-Max_PTerm_Split = 16;
-Max_PTerm_Collapse = 16;
-XOR_Synthesis = YES;
-Node_Collapse = Yes;
-DT_Synthesis = Yes;
-
-[FITTER GLOBAL OPTIONS]
-
-Run_Time = 0;
-Set_Reset_Dont_Care = NO;
-In_Reg_Optimize = YES;
-Clock_Optimize = NO;
-Conf_Unused_IOs = OUT_LOW;
-
-[POWER]
-
-[HARDWARE DEVICE OPTIONS]
-
-[PIN RESERVATIONS]
-layer = OFF;
-
-[LOCATION ASSIGNMENT]
-
-Layer = OFF
-MMU_OUT_12_ = OUTPUT,39,1,-;
-MMU_OUT_13_ = OUTPUT,38,1,-;
-MMU_OUT_14_ = OUTPUT,37,1,-;
-MMU_OUT_15_ = OUTPUT,36,1,-;
-CSPIO = OUTPUT,29,1,-;
-CSCTC = OUTPUT,28,1,-;
-CSUART = OUTPUT,27,1,-;
-CSRAM = OUTPUT,26,1,-;
-CSROMH = OUTPUT,25,1,-;
-CSROML = OUTPUT,24,1,-;
diff --git a/sw/cpld/address_decoder.vco b/sw/cpld/address_decoder.vco deleted file mode 100755 index 229e06f..0000000 --- a/sw/cpld/address_decoder.vco +++ /dev/null @@ -1,147 +0,0 @@ -[DEVICE]
-
-Family = M4;
-PartType = M4-32/32;
-Package = 44PLCC;
-PartNumber = M4-32/32-15JC;
-Speed = -15;
-Operating_condition = COM;
-EN_Segment = NO;
-Pin_MC_1to1 = NO;
-Voltage = 5.0;
-
-[REVISION]
-
-RCS = "$Revision: 1.24 $";
-Parent = m4.vci;
-SDS_file = m4.sds;
-Design = address_decoder.tt4;
-Rev = 0.01;
-DATE = 11/23/17;
-TIME = 11:55:45;
-Type = TT2;
-Pre_Fit_Time = 1;
-Source_Format = ABEL_Schematic;
-
-[IGNORE ASSIGNMENTS]
-
-Pin_Assignments = NO;
-Pin_Keep_Block = NO;
-Pin_Keep_Segment = NO;
-Group_Assignments = NO;
-Macrocell_Assignments = NO;
-Macrocell_Keep_Block = NO;
-Macrocell_Keep_Segment = NO;
-Pin_Reservation = NO;
-Timing_Constraints = NO;
-Block_Reservation = NO;
-Segment_Reservation = NO;
-Ignore_Source_Location = NO;
-Ignore_Source_Optimization = NO;
-Ignore_Source_Timing = NO;
-
-[CLEAR ASSIGNMENTS]
-
-Pin_Assignments = NO;
-Pin_Keep_Block = NO;
-Pin_Keep_Segment = NO;
-Group_Assignments = NO;
-Macrocell_Assignments = NO;
-Macrocell_Keep_Block = NO;
-Macrocell_Keep_Segment = NO;
-Pin_Reservation = NO;
-Timing_Constraints = NO;
-Block_Reservation = NO;
-Segment_Reservation = NO;
-Ignore_Source_Location = NO;
-Ignore_Source_Optimization = NO;
-Ignore_Source_Timing = NO;
-
-[BACKANNOTATE NETLIST]
-
-Netlist = VHDL;
-Delay_File = SDF;
-Generic_VCC = ;
-Generic_GND = ;
-
-[BACKANNOTATE ASSIGNMENTS]
-
-Pin_Assignment = NO;
-Pin_Block = NO;
-Pin_Macrocell_Block = NO;
-Routing = NO;
-
-[GLOBAL PROJECT OPTIMIZATION]
-
-Balanced_Partitioning = YES;
-Spread_Placement = YES;
-Max_Pin_Percent = 100;
-Max_Macrocell_Percent = 100;
-Max_Inter_Seg_Percent = 100;
-Max_Seg_In_Percent = 100;
-Max_Blk_In_Percent = 100;
-
-[FITTER REPORT FORMAT]
-
-Fitter_Options = YES;
-Pinout_Diagram = NO;
-Pinout_Listing = YES;
-Detailed_Block_Segment_Summary = YES;
-Input_Signal_List = YES;
-Output_Signal_List = YES;
-Bidir_Signal_List = YES;
-Node_Signal_List = YES;
-Signal_Fanout_List = YES;
-Block_Segment_Fanin_List = YES;
-Prefit_Eqn = YES;
-Postfit_Eqn = YES;
-Page_Break = YES;
-
-[OPTIMIZATION OPTIONS]
-
-Logic_Reduction = YES;
-Max_PTerm_Split = 16;
-Max_PTerm_Collapse = 16;
-XOR_Synthesis = YES;
-Node_Collapse = Yes;
-DT_Synthesis = Yes;
-
-[FITTER GLOBAL OPTIONS]
-
-Run_Time = 0;
-Set_Reset_Dont_Care = NO;
-In_Reg_Optimize = YES;
-Clock_Optimize = NO;
-Conf_Unused_IOs = OUT_LOW;
-
-[POWER]
-
-[HARDWARE DEVICE OPTIONS]
-
-[PIN RESERVATIONS]
-layer = OFF;
-
-[LOCATION ASSIGNMENT]
-
-Layer = OFF;
-MMU_IN_7_ = INPUT,2, A,-;
-MMU_IN_6_ = INPUT,3, A,-;
-MMU_IN_15_ = INPUT,21, A,-;
-MMU_IN_5_ = INPUT,4, A,-;
-MMU_IN_4_ = INPUT,5, A,-;
-MMU_OUT_15_ = OUTPUT,36, B,-;
-MMU_IN_3_ = INPUT,6, A,-;
-IORQ = INPUT,30, B,-;
-MMU_IN_2_ = INPUT,7, A,-;
-CSROML = OUTPUT,24, B,-;
-CSROMH = OUTPUT,25, B,-;
-MMU_OUT_14_ = OUTPUT,37, B,-;
-CSRAM = OUTPUT,26, B,-;
-MMU_OUT_13_ = OUTPUT,38, B,-;
-CSUART = OUTPUT,27, B,-;
-MMU_OUT_12_ = OUTPUT,39, B,-;
-CSCTC = OUTPUT,28, B,-;
-CSPIO = OUTPUT,29, B,-;
-MMU_IN_14_ = INPUT,20, A,-;
-MMU_IN_13_ = INPUT,19, A,-;
-MMU_IN_12_ = INPUT,18, A,-;
diff --git a/sw/cpld/address_decoder.vct b/sw/cpld/address_decoder.vct deleted file mode 100755 index 2582a78..0000000 --- a/sw/cpld/address_decoder.vct +++ /dev/null @@ -1,82 +0,0 @@ -
-[Device]
-Family = M4;
-PartNumber = M4-32/32-15JC;
-Package = 44PLCC;
-PartType = M4-32/32;
-Speed = -15;
-Operating_condition = COM;
-Status = Production;
-
-[Revision]
-Parent = m4.vci;
-Design = ;
-DATE = 09/25/2017;
-TIME = 16:10:34;
-
-[IGNORE ASSIGNMENTS]
-
-[CLEAR ASSIGNMENTS]
-
-[BACKANNOTATE ASSIGNMENTS]
-
-[GLOBAL PROJECT OPTIMIZATION]
-
-[OPTIMIZATION OPTIONS]
-
-[FITTER GLOBAL OPTIONS]
-
-[LOCATION ASSIGNMENT]
-layer = OFF;
-CSROML = Output, 24, B, -;
-CSROMH = Output, 25, B, -;
-CSRAM = Output, 26, B, -;
-CSUART = Output, 27, B, -;
-CSCTC = Output, 28, B, -;
-CSPIO = Output, 29, B, -;
-MMU_IN_0_ = Input, 9, A, -;
-MMU_IN_1_ = Input, 8, A, -;
-MMU_IN_2_ = Input, 7, A, -;
-MMU_IN_3_ = Input, 6, A, -;
-MMU_IN_4_ = Input, 5, A, -;
-MMU_IN_5_ = Input, 4, A, -;
-MMU_IN_6_ = Input, 3, A, -;
-MMU_IN_7_ = Input, 2, A, -;
-MMU_IN_8_ = Input, 14, A, -;
-MMU_IN_9_ = Input, 15, A, -;
-MMU_IN_10_ = Input, 16, A, -;
-MMU_IN_11_ = Input, 17, A, -;
-MMU_IN_12_ = Input, 18, A, -;
-MMU_IN_13_ = Input, 19, A, -;
-MMU_IN_14_ = Input, 20, A, -;
-MMU_IN_15_ = Input, 21, A, -;
-MMU_OUT_12_ = Output, 39, B, -;
-MMU_OUT_13_ = Output, 38, B, -;
-MMU_OUT_14_ = Output, 37, B, -;
-MMU_OUT_15_ = Output, 36, B, -;
-IORQ = Input, 30, B, -;
-
-[GROUP ASSIGNMENT]
-layer = OFF;
-
-[SPACE RESERVATIONS]
-layer = OFF;
-
-[PIN RESERVATIONS]
-layer = OFF;
-
-[FITTER REPORT FORMAT]
-
-[POWER]
-
-[SOURCE CONSTRAINT OPTION]
-
-[HARDWARE DEVICE OPTIONS]
-
-[PULL]
-
-[OPENDRAIN]
-
-[Timing Analyzer]
-
-[Backannotate Netlist]
diff --git a/sw/cpld/address_decoder.vhd b/sw/cpld/address_decoder.vhd deleted file mode 100755 index 5f32637..0000000 --- a/sw/cpld/address_decoder.vhd +++ /dev/null @@ -1,59 +0,0 @@ -library ieee;
-use ieee.std_logic_1164.all;
-use ieee.std_logic_arith.all;
-use ieee.std_logic_unsigned.all;
-
-entity ADDRESS_DECODER is
-port(
- -- address input
- MMU_IN: in std_logic_vector(15 downto 0);
- -- address output
- MMU_OUT: out std_logic_vector(15 downto 12);
-
- -- other signals
- IORQ: in std_logic;
- RD: in std_logic;
-
- -- chip selects output
- -- memory
- CSROML: out std_logic;
- CSROMH: out std_logic;
- CSRAM : out std_logic;
- -- io chips
- CSUART: out std_logic;
- CSCTC : out std_logic;
- CSPIO : out std_logic
-);
-end;
-
-architecture Behavioral of ADDRESS_DECODER is
- signal ADDR_IN_LOW : unsigned (7 downto 0);
- signal ADDR_IN_HIGH : unsigned (7 downto 0);
- signal ADDR_IN : unsigned (15 downto 0);
-begin
- -- PAGE TABLE (disabled)
- MMU_OUT <= MMU_IN(15 downto 12);
-
- -- ENABLE SIGNALS
- ADDR_IN_LOW <= unsigned(MMU_IN(7 downto 0));
- ADDR_IN_HIGH <= unsigned(MMU_IN(15 downto 8));
- ADDR_IN <= unsigned(MMU_IN);
-
- -- io chips:
- ---- region 0x0000 - 0x00FF ----
-
- CSPIO <= '0' when ((ADDR_IN_LOW >= 16#10#) and (ADDR_IN_LOW < 16#14#) and (IORQ = '0')) else '1';
- -- CSPIO <= '0' when ((ADDR_IN >= 16#0010#) and (ADDR_IN < 16#0014#)) else '1';
- -- CSCTC <= '0' when ((ADDR_IN >= 16#4100#) and (ADDR_IN < 16#4200#)) else '1'; -- test address range
- --CSUART <= '0' when ((ADDR_IN >= 16#4200#) and (ADDR_IN < 16#4300#)) else '1'; -- test address range
-
- -- read only memory:
- ---- region 0x0000 - 0x4000 ----
- CSROML <= '0' when ((ADDR_IN >= 16#0000#) and (ADDR_IN < 16#2000#)) else '1';
- CSROMH <= '0' when ((ADDR_IN >= 16#2000#) and (ADDR_IN < 16#4000#)) else '1';
-
- -- random access memory:
- ---- region 0x8000 - 0xFFFF ----
- CSRAM <= '0' when (ADDR_IN >= 16#8000#) else '1';
-end Behavioral;
-
diff --git a/sw/cpld/address_decoder.vhm b/sw/cpld/address_decoder.vhm deleted file mode 100755 index 937f6e2..0000000 --- a/sw/cpld/address_decoder.vhm +++ /dev/null @@ -1,288 +0,0 @@ ---
--- Written by Synplicity
--- Thu Nov 23 11:54:35 2017
---
-
---
-library ieee;
-use ieee.std_logic_1164.all;
-library synplify;
-use synplify.components.all;
-entity AND2 is
-port(
- O : out std_logic;
- I0 : in std_logic;
- I1 : in std_logic);
-end AND2;
-
-architecture beh of AND2 is
- signal NN_1 : std_logic ;
- signal NN_2 : std_logic ;
-begin
- NN_1 <= '1';
- NN_2 <= '0';
- O <= I0 and I1 after 100 ps;
-end beh;
-
---
-library ieee;
-use ieee.std_logic_1164.all;
-library synplify;
-use synplify.components.all;
-entity IBUF is
-port(
- O : out std_logic;
- I0 : in std_logic);
-end IBUF;
-
-architecture beh of IBUF is
- signal NN_1 : std_logic ;
- signal NN_2 : std_logic ;
-begin
- O <= I0;
- NN_1 <= '1';
- NN_2 <= '0';
-end beh;
-
---
-library ieee;
-use ieee.std_logic_1164.all;
-library synplify;
-use synplify.components.all;
-entity INV is
-port(
- O : out std_logic;
- I0 : in std_logic);
-end INV;
-
-architecture beh of INV is
- signal NN_1 : std_logic ;
- signal NN_2 : std_logic ;
-begin
- O <= not I0;
- NN_1 <= '1';
- NN_2 <= '0';
-end beh;
-
---
-library ieee;
-use ieee.std_logic_1164.all;
-library synplify;
-use synplify.components.all;
-entity OBUF is
-port(
- O : out std_logic;
- I0 : in std_logic);
-end OBUF;
-
-architecture beh of OBUF is
- signal NN_1 : std_logic ;
- signal NN_2 : std_logic ;
-begin
- O <= I0;
- NN_1 <= '1';
- NN_2 <= '0';
-end beh;
-
---
-library ieee;
-use ieee.std_logic_1164.all;
-library synplify;
-use synplify.components.all;
-entity ADDRESS_DECODER is
-port(
- MMU_IN : in std_logic_vector(15 downto 0);
- MMU_OUT : out std_logic_vector(15 downto 12);
- IORQ : in std_logic;
- RD : in std_logic;
- CSROML : out std_logic;
- CSROMH : out std_logic;
- CSRAM : out std_logic;
- CSUART : out std_logic;
- CSCTC : out std_logic;
- CSPIO : out std_logic);
-end ADDRESS_DECODER;
-
-architecture beh of ADDRESS_DECODER is
- signal MMU_IN_I_0 : std_logic_vector(14 downto 2);
- signal MMU_IN_C : std_logic_vector(7 downto 2);
- signal MMU_IN_C_C : std_logic_vector(15 downto 12);
- signal MMU_IN_I_C : std_logic_vector(15 to 15);
- signal OP_GE_UN24_CSROMH : std_logic ;
- signal OP_LT_UN11_CSROMH : std_logic ;
- signal UN12_CSROMH : std_logic ;
- signal N_117 : std_logic ;
- signal N_181 : std_logic ;
- signal OP_LT_UN11_CSPIO : std_logic ;
- signal N_56 : std_logic ;
- signal N_54 : std_logic ;
- signal N_51 : std_logic ;
- signal IORQ_I : std_logic ;
- signal IORQ_C : std_logic ;
- signal OP_GE_UN24_CSROMH_I_C : std_logic ;
- signal UN12_CSROMH_I_C : std_logic ;
- signal N_181_I_0_C : std_logic ;
- signal GND : std_logic ;
- signal N_184 : std_logic ;
- signal VCC : std_logic ;
- component IBUF
- port(O : out std_logic;
- I0 : in std_logic );
- end component;
- component OBUF
- port(O : out std_logic;
- I0 : in std_logic );
- end component;
- component AND2
- port(O : out std_logic;
- I0 : in std_logic;
- I1 : in std_logic );
- end component;
- component INV
- port(O : out std_logic;
- I0 : in std_logic );
- end component;
-begin
- GND <= '0';
- \II_MMU_IN[2]\: IBUF port map (
- O => MMU_IN_C(2),
- I0 => MMU_IN(2));
- \II_MMU_IN[3]\: IBUF port map (
- O => MMU_IN_C(3),
- I0 => MMU_IN(3));
- \II_MMU_IN[4]\: IBUF port map (
- O => MMU_IN_C(4),
- I0 => MMU_IN(4));
- \II_MMU_IN[5]\: IBUF port map (
- O => MMU_IN_C(5),
- I0 => MMU_IN(5));
- \II_MMU_IN[6]\: IBUF port map (
- O => MMU_IN_C(6),
- I0 => MMU_IN(6));
- \II_MMU_IN[7]\: IBUF port map (
- O => MMU_IN_C(7),
- I0 => MMU_IN(7));
- \II_MMU_IN[12]\: IBUF port map (
- O => MMU_IN_C_C(12),
- I0 => MMU_IN(12));
- \II_MMU_IN[13]\: IBUF port map (
- O => MMU_IN_C_C(13),
- I0 => MMU_IN(13));
- \II_MMU_IN[14]\: IBUF port map (
- O => MMU_IN_C_C(14),
- I0 => MMU_IN(14));
- \II_MMU_IN[15]\: IBUF port map (
- O => MMU_IN_C_C(15),
- I0 => MMU_IN(15));
- \II_MMU_OUT[12]\: OBUF port map (
- O => MMU_OUT(12),
- I0 => MMU_IN_C_C(12));
- \II_MMU_OUT[13]\: OBUF port map (
- O => MMU_OUT(13),
- I0 => MMU_IN_C_C(13));
- \II_MMU_OUT[14]\: OBUF port map (
- O => MMU_OUT(14),
- I0 => MMU_IN_C_C(14));
- \II_MMU_OUT[15]\: OBUF port map (
- O => MMU_OUT(15),
- I0 => MMU_IN_C_C(15));
- II_IORQ: IBUF port map (
- O => IORQ_C,
- I0 => IORQ);
- II_CSROML: OBUF port map (
- O => CSROML,
- I0 => OP_GE_UN24_CSROMH_I_C);
- II_CSROMH: OBUF port map (
- O => CSROMH,
- I0 => UN12_CSROMH_I_C);
- II_CSRAM: OBUF port map (
- O => CSRAM,
- I0 => MMU_IN_I_C(15));
- II_CSUART: OBUF port map (
- O => CSUART,
- I0 => GND);
- II_CSCTC: OBUF port map (
- O => CSCTC,
- I0 => GND);
- II_CSPIO: OBUF port map (
- O => CSPIO,
- I0 => N_181_I_0_C);
- II_UN26_CSPIO: AND2 port map (
- O => N_181,
- I0 => OP_LT_UN11_CSPIO,
- I1 => N_184);
- \II_UN26_CSPIO.G_184\: AND2 port map (
- O => N_184,
- I0 => MMU_IN_C(4),
- I1 => IORQ_I);
- \II_MMU_IN_I[6]\: INV port map (
- O => MMU_IN_I_0(6),
- I0 => MMU_IN_C(6));
- \II_MMU_IN_I[5]\: INV port map (
- O => MMU_IN_I_0(5),
- I0 => MMU_IN_C(5));
- \II_MMU_IN_I[3]\: INV port map (
- O => MMU_IN_I_0(3),
- I0 => MMU_IN_C(3));
- \II_MMU_IN_I[2]\: INV port map (
- O => MMU_IN_I_0(2),
- I0 => MMU_IN_C(2));
- \II_MMU_IN_I[14]\: INV port map (
- O => MMU_IN_I_0(14),
- I0 => MMU_IN_C_C(14));
- \II_MMU_IN_I[13]\: INV port map (
- O => MMU_IN_I_0(13),
- I0 => MMU_IN_C_C(13));
- II_UN12_CSROMH: AND2 port map (
- O => UN12_CSROMH,
- I0 => OP_LT_UN11_CSROMH,
- I1 => OP_GE_UN24_CSROMH_I_C);
- II_G_116: AND2 port map (
- O => N_117,
- I0 => MMU_IN_I_0(14),
- I1 => MMU_IN_I_0(13));
- II_G_118: AND2 port map (
- O => OP_GE_UN24_CSROMH,
- I0 => MMU_IN_I_C(15),
- I1 => N_117);
- II_G_179: AND2 port map (
- O => OP_LT_UN11_CSROMH,
- I0 => MMU_IN_I_C(15),
- I1 => MMU_IN_I_0(14));
- II_G_49: AND2 port map (
- O => N_51,
- I0 => MMU_IN_I_0(3),
- I1 => MMU_IN_I_0(2));
- II_G_53: AND2 port map (
- O => N_54,
- I0 => N_51,
- I1 => MMU_IN_I_0(5));
- II_G_55: AND2 port map (
- O => N_56,
- I0 => N_54,
- I1 => MMU_IN_I_0(6));
- II_G_57: AND2 port map (
- O => OP_LT_UN11_CSPIO,
- I0 => N_56,
- I1 => MMU_IN_I_0(7));
- II_N_181_I: INV port map (
- O => N_181_I_0_C,
- I0 => N_181);
- \II_MMU_IN_I[15]\: INV port map (
- O => MMU_IN_I_C(15),
- I0 => MMU_IN_C_C(15));
- II_UN12_CSROMH_I: INV port map (
- O => UN12_CSROMH_I_C,
- I0 => UN12_CSROMH);
- II_OP_GE_UN24_CSROMH_I: INV port map (
- O => OP_GE_UN24_CSROMH_I_C,
- I0 => OP_GE_UN24_CSROMH);
- II_IORQ_I: INV port map (
- O => IORQ_I,
- I0 => IORQ_C);
- \II_MMU_IN_I[7]\: INV port map (
- O => MMU_IN_I_0(7),
- I0 => MMU_IN_C(7));
- VCC <= '1';
-end beh;
-
diff --git a/sw/cpld/address_decoder.vho b/sw/cpld/address_decoder.vho deleted file mode 100755 index ef46479..0000000 --- a/sw/cpld/address_decoder.vho +++ /dev/null @@ -1,131 +0,0 @@ --- VHDL netlist-file
-library mach;
-use mach.components.all;
-
-library ieee;
-use ieee.std_logic_1164.all;
-entity address_decoder is
- port (
- CSROML : out std_logic;
- CSROMH : out std_logic;
- CSRAM : out std_logic;
- CSUART : out std_logic;
- CSCTC : out std_logic;
- CSPIO : out std_logic;
- MMU_IN : in std_logic_vector(15 downto 0);
- MMU_OUT : out std_logic_vector(15 downto 12)
- );
-end address_decoder;
-
-architecture NetList of address_decoder is
-
- signal MMU_IN_15_PIN : std_logic;
- signal MMU_OUT_15_COM : std_logic;
- signal CSROML_COM : std_logic;
- signal CSROMH_COM : std_logic;
- signal CSRAM_COM : std_logic;
- signal CSUART_COM : std_logic;
- signal CSCTC_COM : std_logic;
- signal CSPIO_COM : std_logic;
- signal MMU_IN_14_PIN : std_logic;
- signal MMU_IN_13_PIN : std_logic;
- signal MMU_IN_12_PIN : std_logic;
- signal MMU_IN_11_PIN : std_logic;
- signal MMU_IN_10_PIN : std_logic;
- signal MMU_IN_9_PIN : std_logic;
- signal MMU_IN_8_PIN : std_logic;
- signal MMU_IN_7_PIN : std_logic;
- signal MMU_IN_6_PIN : std_logic;
- signal MMU_IN_5_PIN : std_logic;
- signal MMU_IN_4_PIN : std_logic;
- signal MMU_IN_3_PIN : std_logic;
- signal MMU_IN_2_PIN : std_logic;
- signal MMU_OUT_14_COM : std_logic;
- signal MMU_OUT_13_COM : std_logic;
- signal MMU_OUT_12_COM : std_logic;
- signal T_0 : std_logic;
- signal T_1 : std_logic;
- signal T_2 : std_logic;
- signal T_3 : std_logic;
- signal T_4 : std_logic;
- signal T_5 : std_logic;
- signal T_6 : std_logic;
- signal T_7 : std_logic;
- signal T_8 : std_logic;
- signal T_9 : std_logic;
- signal T_10 : std_logic;
- signal T_11 : std_logic;
- signal T_12 : std_logic;
- signal T_13 : std_logic;
- signal T_14 : std_logic;
- signal T_15 : std_logic;
- signal T_16 : std_logic;
- signal GATE_T_1_A : std_logic;
- signal GATE_T_1_B : std_logic;
- signal GATE_T_5_A : std_logic;
- signal GATE_T_8_A : std_logic;
- signal GATE_T_9_A : std_logic;
- signal GATE_T_12_A : std_logic;
- signal GATE_T_14_DN : std_logic;
-
-begin
- IN_MMU_IN_15_I_1: IBUF port map ( O=>MMU_IN_15_PIN, I0=>MMU_IN(15) );
- OUT_MMU_OUT_15_I_1: OBUF port map ( O=>MMU_OUT(15), I0=>MMU_OUT_15_COM );
- OUT_CSROML_I_1: OBUF port map ( O=>CSROML, I0=>CSROML_COM );
- OUT_CSROMH_I_1: OBUF port map ( O=>CSROMH, I0=>CSROMH_COM );
- OUT_CSRAM_I_1: OBUF port map ( O=>CSRAM, I0=>CSRAM_COM );
- OUT_CSUART_I_1: OBUF port map ( O=>CSUART, I0=>CSUART_COM );
- OUT_CSCTC_I_1: OBUF port map ( O=>CSCTC, I0=>CSCTC_COM );
- OUT_CSPIO_I_1: OBUF port map ( O=>CSPIO, I0=>CSPIO_COM );
- IN_MMU_IN_14_I_1: IBUF port map ( O=>MMU_IN_14_PIN, I0=>MMU_IN(14) );
- IN_MMU_IN_13_I_1: IBUF port map ( O=>MMU_IN_13_PIN, I0=>MMU_IN(13) );
- IN_MMU_IN_12_I_1: IBUF port map ( O=>MMU_IN_12_PIN, I0=>MMU_IN(12) );
- IN_MMU_IN_11_I_1: IBUF port map ( O=>MMU_IN_11_PIN, I0=>MMU_IN(11) );
- IN_MMU_IN_10_I_1: IBUF port map ( O=>MMU_IN_10_PIN, I0=>MMU_IN(10) );
- IN_MMU_IN_9_I_1: IBUF port map ( O=>MMU_IN_9_PIN, I0=>MMU_IN(9) );
- IN_MMU_IN_8_I_1: IBUF port map ( O=>MMU_IN_8_PIN, I0=>MMU_IN(8) );
- IN_MMU_IN_7_I_1: IBUF port map ( O=>MMU_IN_7_PIN, I0=>MMU_IN(7) );
- IN_MMU_IN_6_I_1: IBUF port map ( O=>MMU_IN_6_PIN, I0=>MMU_IN(6) );
- IN_MMU_IN_5_I_1: IBUF port map ( O=>MMU_IN_5_PIN, I0=>MMU_IN(5) );
- IN_MMU_IN_4_I_1: IBUF port map ( O=>MMU_IN_4_PIN, I0=>MMU_IN(4) );
- IN_MMU_IN_3_I_1: IBUF port map ( O=>MMU_IN_3_PIN, I0=>MMU_IN(3) );
- IN_MMU_IN_2_I_1: IBUF port map ( O=>MMU_IN_2_PIN, I0=>MMU_IN(2) );
- OUT_MMU_OUT_14_I_1: OBUF port map ( O=>MMU_OUT(14), I0=>MMU_OUT_14_COM );
- OUT_MMU_OUT_13_I_1: OBUF port map ( O=>MMU_OUT(13), I0=>MMU_OUT_13_COM );
- OUT_MMU_OUT_12_I_1: OBUF port map ( O=>MMU_OUT(12), I0=>MMU_OUT_12_COM );
- GATE_MMU_OUT_15_I_1: BUFF port map ( I0=>MMU_IN_15_PIN, O=>MMU_OUT_15_COM );
- GATE_T_0_I_1: NOR3 port map ( O=>T_0, I2=>MMU_IN_14_PIN, I1=>MMU_IN_15_PIN, I0=>MMU_IN_13_PIN );
- GATE_T_1_I_1: INV port map ( I0=>MMU_IN_14_PIN, O=>GATE_T_1_A );
- GATE_T_1_I_2: INV port map ( I0=>MMU_IN_15_PIN, O=>GATE_T_1_B );
- GATE_T_1_I_3: AND3 port map ( O=>T_1, I0=>MMU_IN_13_PIN, I2=>GATE_T_1_A, I1=>GATE_T_1_B );
- GATE_CSRAM_I_1: INV port map ( I0=>MMU_IN_15_PIN, O=>CSRAM_COM );
- GATE_T_2_I_1: AND4 port map ( O=>T_2, I3=>T_13, I2=>T_14, I1=>T_15, I0=>T_16 );
- GATE_T_3_I_1: AND4 port map ( O=>T_3, I3=>T_9, I2=>T_10, I1=>T_11, I0=>T_12 );
- GATE_T_4_I_1: AND4 port map ( O=>T_4, I3=>T_5, I2=>T_6, I1=>T_7, I0=>T_8 );
- GATE_MMU_OUT_14_I_1: BUFF port map ( I0=>MMU_IN_14_PIN, O=>MMU_OUT_14_COM );
- GATE_MMU_OUT_13_I_1: BUFF port map ( I0=>MMU_IN_13_PIN, O=>MMU_OUT_13_COM );
- GATE_MMU_OUT_12_I_1: BUFF port map ( I0=>MMU_IN_12_PIN, O=>MMU_OUT_12_COM );
- GATE_CSROML_I_1: INV port map ( I0=>T_0, O=>CSROML_COM );
- GATE_CSROMH_I_1: INV port map ( I0=>T_1, O=>CSROMH_COM );
- GATE_CSUART_I_1: INV port map ( I0=>T_2, O=>CSUART_COM );
- GATE_CSCTC_I_1: INV port map ( I0=>T_3, O=>CSCTC_COM );
- GATE_CSPIO_I_1: INV port map ( I0=>T_4, O=>CSPIO_COM );
- GATE_T_5_I_1: AND2 port map ( O=>T_5, I1=>MMU_IN_9_PIN, I0=>GATE_T_5_A );
- GATE_T_5_I_2: INV port map ( O=>GATE_T_5_A, I0=>MMU_IN_8_PIN );
- GATE_T_6_I_1: NOR2 port map ( O=>T_6, I1=>MMU_IN_10_PIN, I0=>MMU_IN_11_PIN );
- GATE_T_7_I_1: NOR2 port map ( O=>T_7, I1=>MMU_IN_12_PIN, I0=>MMU_IN_13_PIN );
- GATE_T_8_I_1: AND2 port map ( O=>T_8, I1=>MMU_IN_14_PIN, I0=>GATE_T_8_A );
- GATE_T_8_I_2: INV port map ( O=>GATE_T_8_A, I0=>MMU_IN_15_PIN );
- GATE_T_9_I_1: AND2 port map ( O=>T_9, I1=>MMU_IN_8_PIN, I0=>GATE_T_9_A );
- GATE_T_9_I_2: INV port map ( O=>GATE_T_9_A, I0=>MMU_IN_9_PIN );
- GATE_T_10_I_1: NOR2 port map ( O=>T_10, I1=>MMU_IN_10_PIN, I0=>MMU_IN_11_PIN );
- GATE_T_11_I_1: NOR2 port map ( O=>T_11, I1=>MMU_IN_12_PIN, I0=>MMU_IN_13_PIN );
- GATE_T_12_I_1: AND2 port map ( O=>T_12, I1=>MMU_IN_14_PIN, I0=>GATE_T_12_A );
- GATE_T_12_I_2: INV port map ( O=>GATE_T_12_A, I0=>MMU_IN_15_PIN );
- GATE_T_13_I_1: NOR2 port map ( O=>T_13, I1=>MMU_IN_2_PIN, I0=>MMU_IN_3_PIN );
- GATE_T_14_I_1: NOR4 port map ( I0=>MMU_IN_7_PIN, I1=>MMU_IN_6_PIN, O=>T_14, I2=>MMU_IN_5_PIN, I3=>GATE_T_14_DN );
- GATE_T_14_I_2: INV port map ( I0=>MMU_IN_4_PIN, O=>GATE_T_14_DN );
- GATE_T_15_I_14: NOR4 port map ( O=>T_15, I3=>MMU_IN_8_PIN, I2=>MMU_IN_9_PIN, I1=>MMU_IN_10_PIN, I0=>MMU_IN_11_PIN );
- GATE_T_16_I_14: NOR4 port map ( O=>T_16, I3=>MMU_IN_12_PIN, I2=>MMU_IN_13_PIN, I1=>MMU_IN_14_PIN, I0=>MMU_IN_15_PIN );
-
-end NetList;
diff --git a/sw/cpld/address_decoder.vm b/sw/cpld/address_decoder.vm deleted file mode 100755 index d4ee62b..0000000 --- a/sw/cpld/address_decoder.vm +++ /dev/null @@ -1,317 +0,0 @@ -//
-// Written by Synplify
-// Thu Nov 23 11:54:35 2017
-//
-// Source file index table:
-// Object locations will have the form <file>:<line>
-// file 0 "noname"
-// file 1 "\c:\isptools\synpbase\lib\vhd\std.vhd "
-// file 2 "\c:\_prossn\cpld.nao\address_decoder.vhd "
-// file 3 "\c:\isptools\synpbase\lib\vhd\std1164.vhd "
-// file 4 "\c:\isptools\synpbase\lib\vhd\arith.vhd "
-// file 5 "\c:\isptools\synpbase\lib\vhd\unsigned.vhd "
-
-`timescale 100 ps/100 ps
-module IBUF (
- O,
- I0
-);
-output O;
-input I0;
-wire O ;
-wire I0 ;
-wire true ;
-wire false ;
- assign #(1) O = I0;
- assign true = 1'b1;
- assign false = 1'b0;
-endmodule /* IBUF */
-
-module OBUF (
- O,
- I0
-);
-output O;
-input I0;
-wire O ;
-wire I0 ;
-wire true ;
-wire false ;
- assign #(1) O = I0;
- assign true = 1'b1;
- assign false = 1'b0;
-endmodule /* OBUF */
-
-module AND2 (
- O,
- I0,
- I1
-);
-output O;
-input I0;
-input I1;
-wire O ;
-wire I0 ;
-wire I1 ;
-wire true ;
-wire false ;
- assign true = 1'b1;
- assign false = 1'b0;
- assign #(1) O = I0 & I1 ;
-endmodule /* AND2 */
-
-module INV (
- O,
- I0
-);
-output O;
-input I0;
-wire O ;
-wire I0 ;
-wire true ;
-wire false ;
- assign #(1) O = ~ I0;
- assign true = 1'b1;
- assign false = 1'b0;
-endmodule /* INV */
-
-module ADDRESS_DECODER (
- MMU_IN,
- MMU_OUT,
- IORQ,
- RD,
- CSROML,
- CSROMH,
- CSRAM,
- CSUART,
- CSCTC,
- CSPIO
-);
-input [15:0] MMU_IN;
-output [15:12] MMU_OUT;
-input IORQ;
-input RD;
-output CSROML;
-output CSROMH;
-output CSRAM;
-output CSUART;
-output CSCTC;
-output CSPIO;
-wire [15:0] MMU_IN;
-wire [15:12] MMU_OUT;
-wire IORQ ;
-wire RD ;
-wire CSROML ;
-wire CSROMH ;
-wire CSRAM ;
-wire CSUART ;
-wire CSCTC ;
-wire CSPIO ;
-wire [14:2] MMU_IN_i_0;
-wire [7:2] MMU_IN_c;
-wire [15:12] MMU_IN_c_c;
-wire [15:15] MMU_IN_i_c;
-wire op_ge_un24_csromh ;
-wire op_lt_un11_csromh ;
-wire un12_csromh ;
-wire N_117 ;
-wire N_181 ;
-wire op_lt_un11_cspio ;
-wire N_56 ;
-wire N_54 ;
-wire N_51 ;
-wire IORQ_i ;
-wire IORQ_c ;
-wire op_ge_un24_csromh_i_c ;
-wire un12_csromh_i_c ;
-wire N_181_i_0_c ;
-wire GND ;
-wire N_184 ;
-wire VCC ;
-//@1:1
- assign GND = 1'b0;
- IBUF \MMU_IN_Z[2] (
- .O(MMU_IN_c[2]),
- .I0(MMU_IN[2])
-);
- IBUF \MMU_IN_Z[3] (
- .O(MMU_IN_c[3]),
- .I0(MMU_IN[3])
-);
- IBUF \MMU_IN_Z[4] (
- .O(MMU_IN_c[4]),
- .I0(MMU_IN[4])
-);
- IBUF \MMU_IN_Z[5] (
- .O(MMU_IN_c[5]),
- .I0(MMU_IN[5])
-);
- IBUF \MMU_IN_Z[6] (
- .O(MMU_IN_c[6]),
- .I0(MMU_IN[6])
-);
- IBUF \MMU_IN_Z[7] (
- .O(MMU_IN_c[7]),
- .I0(MMU_IN[7])
-);
- IBUF \MMU_IN_Z[12] (
- .O(MMU_IN_c_c[12]),
- .I0(MMU_IN[12])
-);
- IBUF \MMU_IN_Z[13] (
- .O(MMU_IN_c_c[13]),
- .I0(MMU_IN[13])
-);
- IBUF \MMU_IN_Z[14] (
- .O(MMU_IN_c_c[14]),
- .I0(MMU_IN[14])
-);
- IBUF \MMU_IN_Z[15] (
- .O(MMU_IN_c_c[15]),
- .I0(MMU_IN[15])
-);
- OBUF \MMU_OUT_Z[12] (
- .O(MMU_OUT[12]),
- .I0(MMU_IN_c_c[12])
-);
- OBUF \MMU_OUT_Z[13] (
- .O(MMU_OUT[13]),
- .I0(MMU_IN_c_c[13])
-);
- OBUF \MMU_OUT_Z[14] (
- .O(MMU_OUT[14]),
- .I0(MMU_IN_c_c[14])
-);
- OBUF \MMU_OUT_Z[15] (
- .O(MMU_OUT[15]),
- .I0(MMU_IN_c_c[15])
-);
- IBUF IORQ_Z (
- .O(IORQ_c),
- .I0(IORQ)
-);
- OBUF CSROML_Z (
- .O(CSROML),
- .I0(op_ge_un24_csromh_i_c)
-);
- OBUF CSROMH_Z (
- .O(CSROMH),
- .I0(un12_csromh_i_c)
-);
- OBUF CSRAM_Z (
- .O(CSRAM),
- .I0(MMU_IN_i_c[15])
-);
- OBUF CSUART_Z (
- .O(CSUART),
- .I0(GND)
-);
- OBUF CSCTC_Z (
- .O(CSCTC),
- .I0(GND)
-);
- OBUF CSPIO_Z (
- .O(CSPIO),
- .I0(N_181_i_0_c)
-);
- AND2 un26_cspio (
- .O(N_181),
- .I0(op_lt_un11_cspio),
- .I1(N_184)
-);
- AND2 \un26_cspio.G_184 (
- .O(N_184),
- .I0(MMU_IN_c[4]),
- .I1(IORQ_i)
-);
- INV \MMU_IN_i[6] (
- .O(MMU_IN_i_0[6]),
- .I0(MMU_IN_c[6])
-);
- INV \MMU_IN_i[5] (
- .O(MMU_IN_i_0[5]),
- .I0(MMU_IN_c[5])
-);
- INV \MMU_IN_i[3] (
- .O(MMU_IN_i_0[3]),
- .I0(MMU_IN_c[3])
-);
- INV \MMU_IN_i[2] (
- .O(MMU_IN_i_0[2]),
- .I0(MMU_IN_c[2])
-);
- INV \MMU_IN_i[14] (
- .O(MMU_IN_i_0[14]),
- .I0(MMU_IN_c_c[14])
-);
- INV \MMU_IN_i[13] (
- .O(MMU_IN_i_0[13]),
- .I0(MMU_IN_c_c[13])
-);
- AND2 un12_csromh_Z (
- .O(un12_csromh),
- .I0(op_lt_un11_csromh),
- .I1(op_ge_un24_csromh_i_c)
-);
- AND2 G_116 (
- .O(N_117),
- .I0(MMU_IN_i_0[14]),
- .I1(MMU_IN_i_0[13])
-);
- AND2 G_118 (
- .O(op_ge_un24_csromh),
- .I0(MMU_IN_i_c[15]),
- .I1(N_117)
-);
- AND2 G_179 (
- .O(op_lt_un11_csromh),
- .I0(MMU_IN_i_c[15]),
- .I1(MMU_IN_i_0[14])
-);
- AND2 G_49 (
- .O(N_51),
- .I0(MMU_IN_i_0[3]),
- .I1(MMU_IN_i_0[2])
-);
- AND2 G_53 (
- .O(N_54),
- .I0(N_51),
- .I1(MMU_IN_i_0[5])
-);
- AND2 G_55 (
- .O(N_56),
- .I0(N_54),
- .I1(MMU_IN_i_0[6])
-);
- AND2 G_57 (
- .O(op_lt_un11_cspio),
- .I0(N_56),
- .I1(MMU_IN_i_0[7])
-);
- INV N_181_i (
- .O(N_181_i_0_c),
- .I0(N_181)
-);
- INV \MMU_IN_i[15] (
- .O(MMU_IN_i_c[15]),
- .I0(MMU_IN_c_c[15])
-);
- INV un12_csromh_i (
- .O(un12_csromh_i_c),
- .I0(un12_csromh)
-);
- INV op_ge_un24_csromh_i (
- .O(op_ge_un24_csromh_i_c),
- .I0(op_ge_un24_csromh)
-);
- INV IORQ_i_Z (
- .O(IORQ_i),
- .I0(IORQ_c)
-);
- INV \MMU_IN_i[7] (
- .O(MMU_IN_i_0[7]),
- .I0(MMU_IN_c[7])
-);
- assign VCC = 1'b1;
-endmodule /* ADDRESS_DECODER */
-
diff --git a/sw/cpld/address_decoder.xrf b/sw/cpld/address_decoder.xrf deleted file mode 100755 index 1b22f54..0000000 --- a/sw/cpld/address_decoder.xrf +++ /dev/null @@ -1,16 +0,0 @@ -Signal Name Cross Reference File
-
-ispDesignEXPERT 8.3.02.12
-
-Design 'address_decoder' created Thu Nov 23 11:54:43 2017
-
-
- LEGEND: '>' Functional Block Port Separator
- '/' Hierarchy Path Separator
- '@' Automatically Generated Node
-
-
-Short Name Hierarchical Name
----------- -----------------
-
- *** Shortened names not required for this design. ***
diff --git a/sw/cpld/address_decoder_chain.xcf b/sw/cpld/address_decoder_chain.xcf deleted file mode 100755 index 519e8a3..0000000 --- a/sw/cpld/address_decoder_chain.xcf +++ /dev/null @@ -1,53 +0,0 @@ -<?xml version='1.0' encoding='utf-8' ?>
-<!DOCTYPE ispXCF SYSTEM "IspXCF.dtd" >
-<ispXCF version="13.2">
- <Comment></Comment>
- <Chain>
- <Comm>JTAG</Comm>
- <Device>
- <Pos>1</Pos>
- <Vendor>Vantis</Vendor>
- <Family>MACH4</Family>
- <Name>M4-32/32</Name>
- <IDCode>0x07430157</IDCode>
- <Package>44-pin PLCC</Package>
- <PON>M4-32/32-XXJC</PON>
- <Bypass>
- <InstrLen>6</InstrLen>
- <InstrVal>010001</InstrVal>
- <BScanLen>1</BScanLen>
- <BScanVal>0</BScanVal>
- </Bypass>
- <File>C:\_prossn\cpld\address_decoder.jed</File>
- <FileTime>10/20/17 10:38:09</FileTime>
- <JedecChecksum>0xC3E6</JedecChecksum>
- <Operation>Erase,Program,Verify</Operation>
- <Option>
- <SVFVendor>JTAG STANDARD</SVFVendor>
- <IOState>HighZ</IOState>
- <PreloadLength>98</PreloadLength>
- <IOVectorData>0x0000000000000000000000000</IOVectorData>
- <Reinitialize value="TRUE"/>
- <OverideUES value="TRUE"/>
- <TCKFrequency>1.000000 MHz</TCKFrequency>
- <SVFProcessor>SVF Processor</SVFProcessor>
- <Usercode>0x00000000</Usercode>
- </Option>
- </Device>
- </Chain>
- <ProjectOptions>
- <Program>SEQUENTIAL</Program>
- <Process>ENTIRED CHAIN</Process>
- <OperationOverride>No Override</OperationOverride>
- <StartTAP>TLR</StartTAP>
- <EndTAP>TLR</EndTAP>
- <DeGlitch value="TRUE"/>
- <VerifyUsercode value="TRUE"/>
- <PinSetting>
- TMS LOW;
- TCK LOW;
- TDI LOW;
- TDO LOW;
- </PinSetting>
- </ProjectOptions>
-</ispXCF>
diff --git a/sw/cpld/automake.log b/sw/cpld/automake.log deleted file mode 100755 index 3f20cc0..0000000 --- a/sw/cpld/automake.log +++ /dev/null @@ -1,7 +0,0 @@ -ispDesignEXPERT Auto-Make Log File
-----------------------------------
-
-Updating: Post-Fit Pinouts
-
-Launching: 'C:\ispTOOLS\ispsys\bin\devedit.exe @address_decoder.rs3'
-
diff --git a/sw/cpld/stderr.log b/sw/cpld/stderr.log deleted file mode 100755 index e69de29..0000000 --- a/sw/cpld/stderr.log +++ /dev/null diff --git a/sw/cpld/stdout.log b/sw/cpld/stdout.log deleted file mode 100755 index e69de29..0000000 --- a/sw/cpld/stdout.log +++ /dev/null diff --git a/sw/cpld/syndos.env b/sw/cpld/syndos.env deleted file mode 100755 index 2977a55..0000000 --- a/sw/cpld/syndos.env +++ /dev/null @@ -1,24 +0,0 @@ -DIOEDA_AppNotes=C:\ISPTOOLS\ISPSYS\APPNOTES
-DIOEDA_Bin=C:\ISPTOOLS\ISPSYS\BIN
-DIOEDA_Config=C:\ISPTOOLS\ISPSYS\CONFIG
-DIOEDA_Examples=C:\ISPTOOLS\ISPSYS\EXAMPLES
-DIOEDA_License=C:\ISPTOOLS\ISPCOMP\LICENSE
-DIOEDA_MachPath=C:\ISPTOOLS\ISPSYS\BIN
-DIOEDA_Manuals=C:\ISPTOOLS\ISPSYS\MANUALS
-DIOEDA_ModelsimPath=C:\ISPTOOLS\MODELSIM\WIN32LOEM
-DIOEDA_PDSPath=C:\ISPTOOLS\ISPCOMP
-DIOEDA_Root=C:\ISPTOOLS\ISPSYS
-DIOEDA_SpectrumPath=C:\ISPTOOLS\SPECTRUM
-DIOEDA_SynplifyPath=C:\ISPTOOLS\SYNPBASE
-DIOEDA_Tutorial=C:\ISPTOOLS\ISPSYS\TUTORIAL
-DIOEDA_ABEL5DEV=C:\ISPTOOLS\ISPSYS\LIB5
-DIOEDA_ProductName=ispDesignEXPERT
-DIOEDA_ProductPrefix=SYN
-DIOEDA_ProductTitle=ispDesignEXPERT
-DIOEDA_ProductType=HDL-BASE
-DIOEDA_ProductVersion=8.3.02.12_DE_HDL_BASE
-DIOEDA_TimingSim=LatticeLogicSim
-DIOEDA_CONTEXT=8.3
-DIOPRODUCT=ispDesignEXPERT
-ABEL5DEV=C:\ISPTOOLS\ISPSYS\LIB5
-PATH=C:\ISPTOOLS\ISPSYS\BIN
diff --git a/sw/z80/TODO.txt b/sw/z80/TODO.txt deleted file mode 100644 index 67be671..0000000 --- a/sw/z80/TODO.txt +++ /dev/null @@ -1 +0,0 @@ -- fix kernel makefile (currently broken) diff --git a/sw/z80/arch/include/addresses.h b/sw/z80/arch/include/addresses.h deleted file mode 100644 index 32f1997..0000000 --- a/sw/z80/arch/include/addresses.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef __ADDRESSES_H__ -#define __ADDRESSES_H__ - -#define ADDR_DEV_ROM_L 0x0000 -#define ADDR_DEV_ROM_H 0x2000 - -#define ADDR_DEV_PIO 0x0010 -#define ADDR_DEV_CTC 0x0020 -#define ADDR_DEV_USART 0x0030 - -#define ADDR_DEV_MMU - -#define ADDR_DEV_RAM 0x8000 - -#endif diff --git a/sw/z80/arch/include/sleep.h b/sw/z80/arch/include/sleep.h deleted file mode 100644 index bd4214b..0000000 --- a/sw/z80/arch/include/sleep.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef __SLEEP_H__ -#define __SLEEP_H__ - -#ifndef F_CPU -#error undefined CPU clock speed -#endif - -#define SLEEP_UNIT ((F_CPU/4)/2) - -#include <stdint.h> - -void usleep(uint16_t microseconds); - -#endif // __SLEEP_H__
\ No newline at end of file diff --git a/sw/z80/arch/makefile b/sw/z80/arch/makefile deleted file mode 100644 index 2763c10..0000000 --- a/sw/z80/arch/makefile +++ /dev/null @@ -1,27 +0,0 @@ -# Drivers library - -LIB := build/arch.a -SOURCES := $(wildcard *.c) -OBJECTS := $(patsubst %.c,build/%.rel,$(SOURCES)) - -F_CPU := 10000 - -CC := sdcc -AR := sdar -CFLAGS := -mz80 \ - -Iinclude \ - -DDEBUG \ - -DF_CPU=$(F_CPU) - -.PHONY: dirs clean -$(LIB): $(OBJECTS) - $(AR) rcs $@ $(OBJECTS) - -$(OBJECTS): build/%.rel: %.c $(SOURCES) dirs - $(CC) $(CFLAGS) -c $< -o $@ - -dirs: - mkdir -p build - -clean: - - rm -rd build diff --git a/sw/z80/arch/sleep.c b/sw/z80/arch/sleep.c deleted file mode 100644 index 154e7ec..0000000 --- a/sw/z80/arch/sleep.c +++ /dev/null @@ -1,16 +0,0 @@ -#include "sleep.h" - -void usleep(uint16_t microseconds) -{ - __asm - pop hl -loop: - ld bc, #SLEEP_UNIT -unit: - nop - dec bc - jr nz, unit - dec hl - jr nz,loop - __endasm; -}
\ No newline at end of file diff --git a/sw/z80/drivers/ctc.c b/sw/z80/drivers/ctc.c deleted file mode 100644 index 5ac4254..0000000 --- a/sw/z80/drivers/ctc.c +++ /dev/null @@ -1,6 +0,0 @@ -#include "ctc.h" - -void ctc_control() -{ - -} diff --git a/sw/z80/drivers/include/ctc.h b/sw/z80/drivers/include/ctc.h deleted file mode 100644 index 80e8b4b..0000000 --- a/sw/z80/drivers/include/ctc.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __CTC_H__ -#define __CTC_H__ - -void ctc_control(); - -#endif /* __CTC_H__ */ diff --git a/sw/z80/drivers/include/pio.h b/sw/z80/drivers/include/pio.h deleted file mode 100644 index ee968d7..0000000 --- a/sw/z80/drivers/include/pio.h +++ /dev/null @@ -1,52 +0,0 @@ -#ifndef __PIO_H__ -#define __PIO_H__ - -#include "addresses.h" -#include <stdint.h> - -// DEBUG -#define PIO_ASM_INTERFACE - -// ports -#define PIO_A 0 -#define PIO_B 1 - -// registers -#define PIO_REG_DATA 0 -#define PIO_REG_CTRL 2 - -#define PIO_REG_DATA_A 0 // (PIO_A | PIO_REG_PORT) -#define PIO_REG_DATA_B 1 // (PIO_B | PIO_REG_PORT) -#define PIO_REG_CTRL_A 2 // (PIO_A | PIO_REG_CTRL) -#define PIO_REG_CTRL_B 3 // (PIO_B | PIO_REG_CTRL) - -#define PIO_MODE_BYTE_OUT 0 // mode 0 -#define PIO_MODE_BYTE_IN 1 // mode 1 -#define PIO_MODE_BYTE_BI 2 // mode 2 -#define PIO_MODE_BIT_IO 3 // mode 3 - -#define PIO_INT_DISABLE 0 -#define PIO_INT_ACTIVE_HIGH 2 -#define PIO_INT_AND_MODE 4 -#define PIO_INT_ENABLE 8 - -/* functions used internally to interface with the device */ -inline void _pio_write(uint8_t reg, uint8_t data); -inline uint8_t _pio_read(uint8_t reg); - -/* the last argument is needed only for IO mode */ -void pio_set_mode(int port, int mode, uint8_t io); - -void pio_set_interrupts(int port, int control); -void pio_set_interrupts_mask(int port, int control, uint8_t mask); - -// uint8_t pio_read_data(int port); -uint8_t pio_read(int port); -void pio_write(int port, uint8_t data); - -inline int pio_read_pin(int port, uint8_t pin); -inline void pio_write_pin(int port, uint8_t pin); - -// TODO: implement mode (in/out/both) and interrupt vector - -#endif /* __PIO_H__ */ diff --git a/sw/z80/drivers/include/usart.h b/sw/z80/drivers/include/usart.h deleted file mode 100644 index 05aeb4a..0000000 --- a/sw/z80/drivers/include/usart.h +++ /dev/null @@ -1,158 +0,0 @@ -#ifndef __USART_H__ -#define __USART_H__ - -#include "addresses.h" - -#include <stdint.h> -#include <string.h> - -// baudrate clock divisors -// values from TL16C550C datasheet (table 9 for 1.8432 MHz crystal) -#define USART_BAUDRATE_50 2304 -#define USART_BAUDRATE_75 1536 -#define USART_BAUDRATE_110 1047 -#define USART_BAUDRATE_134_5 857 -#define USART_BAUDRATE_150 768 -#define USART_BAUDRATE_300 384 -#define USART_BAUDRATE_600 192 -#define USART_BAUDRATE_1200 96 -#define USART_BAUDRATE_1800 64 -#define USART_BAUDRATE_2000 58 -#define USART_BAUDRATE_2400 48 -#define USART_BAUDRATE_3600 32 -#define USART_BAUDRATE_4800 24 -#define USART_BAUDRATE_7200 16 -#define USART_BAUDRATE_9600 12 -#define USART_BAUDRATE_19200 6 -#define USART_BAUDRATE_38400 3 -#define USART_BAUDRATE_56000 3 - -// parity -#define USART_PARITY_NONE 0 -#define USART_PARITY_EVEN 1 -#define USART_PARITY_ODD 2 - -// stop bits -#define USART_STOP_BITS_1 10 -#define USART_STOP_BITS_15 15 -#define USART_STOP_BITS_2 20 - -// word lenght -#define USART_WORD_LENGTH_5 0 -#define USART_WORD_LENGTH_6 1 -#define USART_WORD_LENGTH_7 2 -#define USART_WORD_LENGTH_8 3 - -// autoflow -#define USART_AUTOFLOW_ALL 3 -#define USART_AUTOFLOW_CTS 2 -#define USART_AUTOFLOW_OFF 0 - -typedef unsigned int uint; -typedef volatile uint8_t register_t; - -/* stuctures for usart registers */ -struct IER -{ - volatile uint received_data_interrupt :1; - volatile uint transmitter_empty_interrupt :1; - volatile uint receiver_line_status_interrupt :1; - volatile uint modem_status_interrupt :1; - volatile uint reserved :4; -}; - -struct IIR -{ - volatile uint interrupt_pending :1; - volatile uint interrupt_id :3; - volatile uint reserved :2; - volatile uint fifos :2; -}; - -struct FCR -{ - volatile uint fifo_enable :1; - volatile uint receiver_fifo_rst :1; - volatile uint trasmitter_fifo_rst :1; - volatile uint dma_mode_select :1; - volatile uint reserved :1; - volatile uint receiver_trigger :2; -}; - -struct LCR -{ - volatile uint word_length :2; - volatile uint stop_bits :1; - volatile uint parity :1; - volatile uint even_parity :1; - volatile uint stick_parity :1; - volatile uint break_control :1; - volatile uint divisor_latch_access :1; -}; - -struct MCR -{ - volatile uint data_terminal_ready :1; - volatile uint request_to_send :1; - volatile uint out1; - volatile uint out2; - volatile uint loop; - volatile uint autoflow :1; - volatile uint reserved :2; -}; - -struct LSR -{ - volatile uint data_ready :1; - volatile uint overrun_error :1; - volatile uint parity_error :1; - volatile uint framing_error :1; - volatile uint break_interrupt :1; - volatile uint transmitter_holder_empty :1; - volatile uint transmitter_empty :1; - volatile uint fifo_recv_error :1; -}; - -struct MSR -{ - volatile uint delta_cts :1; - volatile uint delta_data_set_ready :1; - volatile uint trailing_edge_ring_indicator :1; - volatile uint delta_data_carrier_detect :1; - volatile uint clear_to_send :1; - volatile uint data_set_ready :1; - volatile uint ring_indicator :1; - volatile uint data_carrier_detect :1; -}; - -/* this structure is only for internal use */ -struct _usart_device -{ - register_t buffer; // also used as LSB for divisor latch - struct IER IER; - struct IIR IIR; - struct FCR FCR; - struct LCR LCR; - struct MCR MCR; - struct LSR LSR; - struct MSR MSR; - register_t scratch; -}; - - -// setup functions (wrappers) -void usart_set_baudrate(uint16_t baudrate); -void usart_set_parity(int mode); -void usart_set_stop_bits(int count); -void usart_set_word_length(int length); -void usart_set_autoflow(int mode); - -inline void usart_init(uint16_t baudrate, int parity, int stop_bits); - -void usart_transmit(uint8_t data); -uint8_t usart_receive(); - -int usart_write(uint8_t *data, size_t size); -int usart_read(uint8_t *buffer, size_t count); - -#endif // __USART__H__ diff --git a/sw/z80/drivers/makefile b/sw/z80/drivers/makefile deleted file mode 100644 index 65ded58..0000000 --- a/sw/z80/drivers/makefile +++ /dev/null @@ -1,24 +0,0 @@ -# Drivers library - -LIB := build/drivers.a -SOURCES := $(wildcard *.c) -OBJECTS := $(patsubst %.c,build/%.rel,$(SOURCES)) - -CC := sdcc -AR := sdar -CFLAGS := -mz80 -Iinclude -I../arch/include -DDEBUG - -.PHONY: dirs rebuild clean -$(LIB): $(OBJECTS) - $(AR) vrcs $@ $(OBJECTS) - -$(OBJECTS): build/%.rel: %.c $(SOURCES) dirs - $(CC) $(CFLAGS) -c $< -o $@ - -rebuild: clean $(LIB) - -dirs: - mkdir -p build - -clean: - - rm -rd build diff --git a/sw/z80/drivers/pio.c b/sw/z80/drivers/pio.c deleted file mode 100644 index f396e43..0000000 --- a/sw/z80/drivers/pio.c +++ /dev/null @@ -1,84 +0,0 @@ -#include "pio.h" - -#ifdef PIO_ASM_INTERFACE -// TODO: set inline -void _pio_write(uint8_t reg, uint8_t data) -{ - __asm - ;; pop function arguments data in h, reg in a (l) - pop hl - ld a, l - ;; add ADDR_DEV_PIO to get the device address - add a, #ADDR_DEV_PIO - ld c, a - ;; load data - out (c), h - __endasm; -} - -inline uint8_t _pio_read(uint8_t reg) -{ - // TODO: check "dec sp" - __asm - ;; pop function argument - dec sp - pop hl - ld a, l - ;; add ADDR_DEV_PIO to get the device address - add a, #ADDR_DEV_PIO - ld c, a - ;; read data - in l, (c) - ret - __endasm; -} - -#else - -inline void _pio_write(uint8_t reg, uint8_t data) -{ - *((uint8_t *) (ADDR_DEV_PIO + reg)) = data; -} - -inline uint8_t _pio_read(uint8_t reg) -{ - return *((uint8_t *) (ADDR_DEV_PIO + reg)); -} - -#endif - -void pio_set_mode(int port, int mode, uint8_t io) -{ - // 0x0F is a control sequence to set mode - _pio_write((PIO_REG_CTRL + port), ((mode << 6) | 0x0F)); - - // this mode requires an additional argument that sets - // a mode for each pin - if (mode == PIO_MODE_BIT_IO) { - _pio_write((PIO_REG_CTRL + port), io); - } -} - -void pio_set_interrupts(int port, int control) -{ - // 0x07 is a control sequence to set interrupts - _pio_write((PIO_REG_CTRL + port), (control<<4 | 0x07)); -} - -void pio_set_interrupts_mask(int port, int control, uint8_t mask) -{ - // 0x17 is a control sequence to set interrupts - // AND interpret the next byte as a bitmask - _pio_write((PIO_REG_CTRL + port),(control | 0x97)); - _pio_write((PIO_REG_CTRL + port), mask); -} - -uint8_t pio_read(int port) -{ - return _pio_read((PIO_REG_DATA + port)); -} - -void pio_write(int port, uint8_t data) -{ - _pio_write((PIO_REG_DATA + port), data); -} diff --git a/sw/z80/drivers/usart.c b/sw/z80/drivers/usart.c deleted file mode 100644 index 9a5ee38..0000000 --- a/sw/z80/drivers/usart.c +++ /dev/null @@ -1,91 +0,0 @@ -#include "usart.h" - -static volatile struct _usart_device *_usart = ((struct _usart_device *) ADDR_DEV_USART); - -void usart_set_baudrate(uint16_t baudrate) -{ - // enable latch access - _usart->LCR.divisor_latch_access = 1; - _usart->buffer = 0x00FF & baudrate; // LSBs - memcpy(&_usart->IER, &(baudrate >>8), 1); - // _usart->IER = 0x00FF & (baudrate >> 8); // MSBs - _usart->LCR.divisor_latch_access = 0; -} - -void usart_set_parity(int mode) -{ - if (mode == USART_PARITY_EVEN) { - _usart->LCR.even_parity = 1; - } - else if (mode == USART_PARITY_ODD) { - _usart->LCR.even_parity = 0; - } - - _usart->LCR.parity = (mode == USART_PARITY_NONE) ? 0 : 1; -} - -void usart_set_stop_bits(int count) -{ - _usart->LCR.stop_bits = (count == USART_STOP_BITS_1) ? 0 : 1; -} - -void usart_word_length(int length) -{ - _usart->LCR.word_length = length; -} - -void usart_set_autoflow(int mode) -{ - _usart->MCR.autoflow = (mode == USART_AUTOFLOW_OFF) ? 0 : 1; - _usart->MCR.data_terminal_ready = (mode == USART_AUTOFLOW_ALL); -} - -inline void usart_init(uint16_t baudrate, int parity, int stop_bits) -{ - usart_set_baudrate(baudrate); - usart_set_parity(parity); - usart_set_stop_bits(stop_bits); - usart_set_autoflow(USART_AUTOFLOW_OFF); -} - -void usart_transmit(uint8_t data) -{ - _usart->buffer = data; - while (_usart->LSR.transmitter_holder_empty == 0); // wait -} - -uint8_t usart_receive() -{ - return _usart->buffer; -} - -int usart_write(uint8_t *data, size_t size) -{ - uint8_t *dp = data; - - while (size--) { - _usart->buffer = *(dp++); - while (_usart->LSR.transmitter_empty); - } - - // TODO: do something that actually counts for sent bytes - return size; -} - -int usart_read(uint8_t *buffer, size_t count) -{ - uint8_t *bp = buffer; - size_t read_count = 0; - - while (count--) { - *(bp++) = _usart->buffer; - // check for errors - if (_usart->LSR.framing_error || _usart->LSR.parity_error) { - bp--; // delete last byte (?) - } else { - read_count++; - } - } - - return read_count; -} diff --git a/sw/z80/kernel/crt0.s b/sw/z80/kernel/crt0.s deleted file mode 100644 index 00c7da1..0000000 --- a/sw/z80/kernel/crt0.s +++ /dev/null @@ -1,103 +0,0 @@ -;-------------------------------------------------------------------------- -; crt0.s - Generic crt0.s for a Z80 -; -; Copyright (C) 2000, Michael Hope -; -; This library is free software; you can redistribute it and/or modify it -; under the terms of the GNU General Public License as published by the -; Free Software Foundation; either version 2, or (at your option) any -; later version. -; -; This library is distributed in the hope that it will be useful, -; but WITHOUT ANY WARRANTY; without even the implied warranty of -; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -; GNU General Public License for more details. -; -; You should have received a copy of the GNU General Public License -; along with this library; see the file COPYING. If not, write to the -; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, -; MA 02110-1301, USA. -; -; As a special exception, if you link this library with other files, -; some of which are compiled with SDCC, to produce an executable, -; this library does not by itself cause the resulting executable to -; be covered by the GNU General Public License. This exception does -; not however invalidate any other reasons why the executable file -; might be covered by the GNU General Public License. -;-------------------------------------------------------------------------- - - .module crt0 - .globl _kmain - - .area _HEADER (ABS) - ;; Reset vector - .org 0 - jp init - - .org 0x08 - reti - .org 0x10 - reti - .org 0x18 - reti - .org 0x20 - reti - .org 0x28 - reti - .org 0x30 - reti - .org 0x38 - reti - - .org 0x100 -init: - ;; Set stack pointer directly above top of memory. - ld sp,#0xFFFF - - ;; Initialise global variables - call gsinit - call _kmain - jp _exit - - ;; Ordering of segments for the linker. - .area _HOME - .area _CODE - .area _INITIALIZER - .area _GSINIT - .area _GSFINAL - - .area _DATA - .area _INITIALIZED - .area _BSEG - .area _BSS - .area _HEAP - - .area _CODE - -__clock:: - ld a,#2 - rst 0x08 - ret - -_exit:: - ;; Exit - special code to the emulator - ld a,#0 - rst 0x08 -1$: - halt - jr 1$ - - .area _GSINIT -gsinit:: - ; ld bc, #l__INITIALIZER - ld a, b - or a, c - jr Z, gsinit_next - ; ld de, #s__INITIALIZED - ; ld hl, #s__INITIALIZER - ldir -gsinit_next: - - .area _GSFINAL - ret - diff --git a/sw/z80/kernel/fs/fd.c b/sw/z80/kernel/fs/fd.c deleted file mode 100644 index 96603ad..0000000 --- a/sw/z80/kernel/fs/fd.c +++ /dev/null @@ -1,255 +0,0 @@ -#include "fs/fd.h" -#include "fs/fdop.h" -#include "fs/fs.h" - -/* from fd.h */ -struct file_desc fd_table[FD_TABLE_SIZE]; -struct uint8_t fd_bmap[FD_TABLE_SIZE / 8]; - -/* File descriptors implementation */ - -int8_t open(const char *path, uint8_t flags) -{ - // TODO - return 0; -} - -size_t ls(int8_t fd, struct dirent *buf, uint8_t all) -{ - // TODO - return 0; -} - -size_t find(int8_t fd, struct dirent *buf, const char *name) -{ - // TODO - return 0; -} - -int8_t mkdir(int8_t fd, const char *name) -{ - // TODO - return 0; -} - -int8_t touch(int8_t fd, const char *name) -{ - // TODO - return 0; -} - -int8_t ln(int8_t fd, const char *name) -{ - // TODO - return 0; -} - -int8_t seek(int8_t fd, fsize_t pos) -{ - // TODO - return 0; -} - -size_t readline(int8_t fd, char *buf, char term) -{ - // TODO - return 0; -} - -int8_t print(int8_t fd, const char *str) -{ - // TODO - return 0; -} - -size_t read(int8_t fd, void *buf, size_t n) -{ - // TODO - return 0; -} - -int8_t write(int8_t fd, const void *buf, size_t n) -{ - // TODO - return 0; -} - -void close(int8_t fd) -{ - // TODO - return 0; -} - -/* Set of file descriptors operations */ -/* Determines if to use the serial interface or the address space */ - -/* Address space section */ - -/* File functions */ - -size_t as_readline(inode_t inode, fsize_t seek, char *buf, char term) -{ - // TODO - return 0; -} - -size_t as_print(inode_t inode, fsize_t seek, const char *str) -{ - // TODO - return 0; -} - -size_t as_append(inode_t inode, fsize_t *seek_ptr, const char *str) -{ - // TODO - return 0; -} - -size_t as_read(inode_t inode, fsize_t seek, void *buf, size_t n) -{ - // TODO - return 0; -} - -size_t as_write(inode_t inode, fsize_t seek, const void *buf, size_t n) -{ - // TODO - return 0; -} - -size_t as_bin_append(inode_t inode, fsize_t *seek_ptr, const void *buf, size_t -n) -{ - // TODO - return 0; -} - -/* Directory functions */ - -size_t as_ls(inode_t inode, struct dirent *buf, uint8_t all) -{ - // TODO - return 0; -} - -size_t as_find(inode_t inode, struct dirent *buf, const char *name) -{ - // TODO - return 0; -} - -int8_t as_mkdir(inode_t inode, const char *name) -{ - // TODO - return 0; -} - -int8_t as_rmdir(inode_t inode, const char *name) -{ - // TODO - return 0; -} - -int8_t as_touch(inode_t inode, const char *name) -{ - // TODO - return 0; -} - -int8_t as_rm(inode_t inode, const char *name) -{ - // TODO - return 0; -} - -int8_t as_ln(inode_t inode, const char *path, const char *name) -{ - // TODO - return 0; -} - -/* Serial Space section */ -/* Warning, it doesn't switch to the right driver */ - -/* File functions */ - -size_t ss_readline(inode_t inode, fsize_t seek, char *buf, char term) -{ - // TODO - return 0; -} - -size_t ss_print(inode_t inode, fsize_t seek, const char *str) -{ - // TODO - return 0; -} - -size_t ss_append(inode_t inode, fsize_t *seek_ptr, const char *str) -{ - // TODO - return 0; -} - -size_t ss_read(inode_t inode, fsize_t seek, void *buf, size_t n) -{ - // TODO - return 0; -} - -size_t ss_write(inode_t inode, fsize_t seek, const void *buf, size_t n) -{ - // TODO - return 0; -} - -size_t ss_bin_append(inode_t inode, fsize_t *seek_ptr, const void *buf, size_t -n) -{ - // TODO - return 0; -} - -/* Directory functions */ - -size_t ss_ls(inode_t inode, struct dirent *buf, uint8_t all) -{ - // TODO - return 0; -} - -size_t ss_find(inode_t inode, struct dirent *buf, const char *name) -{ - // TODO - return 0; -} - -int8_t ss_mkdir(inode_t inode, const char *name) -{ - // TODO - return 0; -} - -int8_t ss_rmdir(inode_t inode, const char *name) -{ - // TODO - return 0; -} - -int8_t ss_touch(inode_t inode, const char *name) -{ - // TODO - return 0; -} - -int8_t ss_rm(inode_t inode, const char *name) -{ - // TODO - return 0; -} - -int8_t ss_ln(inode_t, const char *path, const char *name) -{ - // TODO - return 0; -} diff --git a/sw/z80/kernel/fs/fs.c b/sw/z80/kernel/fs/fs.c deleted file mode 100644 index 584f934..0000000 --- a/sw/z80/kernel/fs/fs.c +++ /dev/null @@ -1,236 +0,0 @@ -#include "fs/fs.h" -#include "fs/users.h" -#include "fs/dev.h" - -/* from users.h */ -struct fs_user c_user; - -/* from inode.h */ -inode_t c_inode; - -struct fs_dev devices[FS_MOUNT_LIMIT]; - -/* filesystem basic implementation */ - -devsize_t fs_block(blk_t block) -{ - // TODO - return 0; -} - -devsize_t fs_inode(struct fs_inode *buf) -{ - struct fs_superblock * sb; - devsize_t seek; - - if (FS_USE_ROM(c_inode)) - { - seek = FS_ROM_SPACE; - sb = (struct fs_superblock*) seek; - - } else { - - seek = 0; - - if (c_inode.dev > 0x7) - panic("Invalid device"); // TODO, still to implement - - sb = &devices[c_inode.dev].superblock; - } - - if (c_inode.inode >= sb->imap_size) - { - // TODO, set errno - return 0; // inode doesn't exist - } - - seek += sizeof(struct fs_superblock) + - sizeof(struct fs_inode) * c_inode.inode; - - if (FS_USE_ROM(c_inode)) - *buf = *(struct fs_inode*)seek; - else - { - /* set sio port */ - sio_port = devices[c_inode.dev].port_no; - sio_seek = seek; - - if (sio_read((void *)buf, INODE_META_SIZE) < INODE_META_SIZE) - { - // TODO, set errno - return 0; // cannot read to device - } - } - - return seek + INODE_META_SIZE; -} - -/* from fd.h */ -int8_t __fd_new() -{ - int8_t fd; - for (int8_t = 0; i < FD_TABLE_SIZE / 8; i++) - { - for (uint8_t bit = 0x80, j = 0; bit > 0; bit >>= 1, j++) - { - if (!(bit & fd_bmap[i])) - return i * 8 + j; - } - } - - return -1; -} - -/* from fd.h */ -int8_t __open_c_inode(uint8_t flags) -{ - /* read meta data */ - struct fs_inode inode; - - /* init file_desc buffer */ - struct file_desc desc = {c_inode, 0}; - - desc.begin = fs_inode(&inode); - - /* bind operations */ - - if (flags & OPEN_DIR) - { - /* dir handler */ - - if (inode.type == INODE_TYPE_DIR) - { - /* bind dir functions */ - if (FS_USE_ROM(c_inode)) - /* bind address space functions */ - FD_BIND_AS_DIR(desc.opers) - else - /* bind serial space functions */ - FD_BIND_SS_DIR(desc.opers) - - } else { - - // TODO, set errno - return -1; // not a directory - } - - } else if (flags & OPEN_LINK) { - - /* link handler */ - - if (inode.type == INODE_TYPE_LINK) - { - if (FS_USE_ROM(c_inode)) - FD_BIND_AS_FILE(desc.opers, flags) - else - FD_BIND_SS_FILE(desc.opers, flags) - - if (flags & OPEN_ERASE) - /* empty file content */ - __inode_empty(desc.begin); - - } else { - - // TODO, set errno - return -1; // not a link - } - - } else { - - /* file */ - - if (inode.type == INODE_TYPE_FILE) - ; // do nothing - else if (inode.type == INODE_TYPE_SPECIAL) { - - // TODO, bind special callbacks - - } else { - - // TODO, set errno - return -1; - } - - /* bind operations */ - - if (FS_USE_ROM(c_inode)) - { - if (flags & OPEN_BIN) - FD_BIND_AS_BINFILE(desc.opers, flags) - else - FD_BIND_AS_FILE(desc.opers, flags) - - } else { - - if (flags & OPEN_BIN) - FD_BIND_SS_BINFILE(desc.opers, flags) - else - FD_BIND_SS_FILE(desc.opers, flags) - } - } - - /* find a free fd space */ - - int8_t fd = __fd_new(); - - if (fd < 0) - { - // TODO, set errno, fd not available - - } else - fd_table[fd] = desc; // copy buffer into the table - - return fd; -} - -inode_t fs_rec_path(const char *path); - -inode_t fs_parse_path(const char *path) -{ - inode_t ino, cwd = c_inode; - - switch (path[0]) - { - case '0': - FS_INODE_NULL(ino) - return ino; - - case '/': - FS_INODE_ROOT(ino) - c_inode = ino; // set cwd to root - path++; - break; - - case '~': - - if (path[1] = '/') - { - c_inode.dev = FS_DEV_ROM; - c_inode.inode = c_user.home; // set cwd to home - path += 2; - } - - break; - } - - ino = fs_rec_path(path); - c_inode = cwd; - return ino; -} - -inode_t fs_rec_path(const char *path) -{ - devsize_t inode = fs_inode(c_inode.inode); - inode_t rel; - - if (!inode) // if not exists - { - FS_INODE_NULL(rel) - return rel; - } - - // TODO, check if dir or file - // TODO, if dir, find name - // TODO, set fs_cwd to new inode - // TODO, recall fs_rec_path -} diff --git a/sw/z80/kernel/include/devices.h b/sw/z80/kernel/include/devices.h deleted file mode 100644 index a846f9b..0000000 --- a/sw/z80/kernel/include/devices.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef __DEVICES_H__ -#define __DEVICES_H__ - -#define ADDR_DEV_ROM_L 0x0000 -#define ADDR_DEV_ROM_H 0x2000 - -#define ADDR_DEV_USART 0x4000 -#define ADDR_DEV_CTC 0x4100 -#define ADDR_DEV_PIO 0x4200 - -#define ADDR_DEV_MMU - -#define ADDR_DEV_RAM 0x8000 - -#endif diff --git a/sw/z80/kernel/include/errno.h b/sw/z80/kernel/include/errno.h deleted file mode 100644 index 7632269..0000000 --- a/sw/z80/kernel/include/errno.h +++ /dev/null @@ -1,35 +0,0 @@ -#ifndef ERRNO_H -#define ERRNO_H - -extern int errno; - -#define EPERM 1 /* Operation not permitted */ -#define ENOENT 2 /* No such file or directory */ -#define ESRCH 3 /* No such process */ -#define EINTR 4 /* Interrupted system call */ -#define EIO 5 /* Input/output error */ -#define ENXIO 6 /* Device not configured */ -#define E2BIG 7 /* Argument list too long */ -#define ENOEXEC 8 /* Exec format error */ -#define EBADF 9 /* Bad file descriptor */ -#define ECHILD 10 /* No child processes */ -#define EDEADLK 11 /* Resource deadlock avoided */ - -#define ENOMEM 12 /* Cannot allocate memory */ -#define EACCES 13 /* Permission denied */ -#define EFAULT 14 /* Bad address */ - -#define ENOTBLK 15 /* Block device required */ -#define EBUSY 16 /* Device busy */ -#define EEXIST 17 /* File exists */ - -#define EXDEV 18 /* Cross-device link */ -#define ENODEV 19 /* Operation not supported by device */ -#define ENOTDIR 20 /* Not a directory */ -#define EISDIR 21 /* Is a directory */ -#define EINVAL 22 /* Invalid argument */ -#define ENFILE 23 /* Too many open files in system */ -#define EMFILE 24 /* Too many open files */ -#define ENOTTY 25 /* Inappropriate ioctl for device */ - -#endif diff --git a/sw/z80/kernel/include/fs/dev.h b/sw/z80/kernel/include/fs/dev.h deleted file mode 100644 index 8e550f3..0000000 --- a/sw/z80/kernel/include/fs/dev.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef DEV_H -#define DEV_H - -#include "types.h" - -#define FS_MOUNT_LIMIT 16 - -struct fs_superblock -{ - uint8_t magic; // identifier - - size_t blk_size; // size of a single block - size_t imap_size; // quantity of inodes - size_t dmap_size; // quantity of blocks -}; - -struct fs_dev -{ - uint enabled :1; // in use - uint port_no :3; // serial port number - uint :4; - inode_t inode; // dir mounted - struct fs_superblock superblock; // block informations -}; - -/* list of devices */ -extern struct fs_dev devices[FS_MOUNT_LIMIT]; - -#endif diff --git a/sw/z80/kernel/include/fs/dirent.h b/sw/z80/kernel/include/fs/dirent.h deleted file mode 100644 index 2fd224a..0000000 --- a/sw/z80/kernel/include/fs/dirent.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef __DIRENT_H__ -#define __DIRENT_H__ - -#include "types.h" - -struct dirent -{ - ino_t inode; // inode referred - uint8_t name_size; // size of the name - char name[]; // name of the referred inode -}; - -/* if inode is FS_INO_NULL, then the dirent is a memory leak */ -/* Warning: dirent leaks are generated by rm or rmdir operations */ -/* Filesystem must be periodically checked and cleaned */ - -#endif // __DIRENT_H__ diff --git a/sw/z80/kernel/include/fs/fd.h b/sw/z80/kernel/include/fs/fd.h deleted file mode 100644 index d2fea2a..0000000 --- a/sw/z80/kernel/include/fs/fd.h +++ /dev/null @@ -1,102 +0,0 @@ -#ifndef __FD_H__ -#define __FD_H__ - -#include "types.h" - -#define FD_MAX 32 - -#define OPEN_READ 0x1 -#define OPEN_WRITE 0x2 -#define OPEN_BIN 0x4 -#define OPEN_APPEND 0x8 -#define OPEN_ERASE 0x10 -#define OPEN_DIR 0x20 -#define OPEN_LINK 0x40 - -#define LS_ALL 0x1 - -/* declare dirent, not include */ -#ifndef __DIRENT_H__ -struct dirent; -#endif - -/* set of operations callback for fd */ -struct fd_operations -{ - size_t (*readline)(inode_t, fsize_t, char *, char term); - size_t (*print)(inode_t, fsize_t, const char *); - size_t (*append)(inode_t, fsize_t*, const char *); - - size_t (*read)(inode_t, fsize_t, void *, size_t); - size_t (*write)(inode_t, fsize_t, const void *, size_t); - size_t (*bin_append)(inode_t, fsize_t*, const void *, size_t); - - size_t (*ls)(inode_t, struct dirent *, uint8_t); - size_t (*find)(inode_t, struct dirent *, const char *); - int8_t (*mkdir)(inode_t, const char *); - int8_t (*rmdir)(inode_t, const char *); - int8_t (*touch)(inode_t, const char *); - int8_t (*rm)(inode_t, const char *); - int8_t (*ln)(inode_t, const char *, const char *); - - int8_t (*special)(inode_t, void *, size_t); -}; - -/* file descriptor */ -struct file_desc -{ - inode_t inode; // inode pointed - fsize_t seek; // virtual seek - devsize_t begin; // beginning of blocks - struct fd_operations opers; // bound operations -}; - -/* bitmap of used file descriptors */ -extern struct uint8_t fd_bmap[FD_TABLE_SIZE / 8]; - -/* table of file descriptors */ -extern struct file_desc fd_table[FD_TABLE_SIZE]; - -/* returns a free file descriptor */ -int8_t __fd_new(); - -/* opens a file streaming of the cwd */ -int8_t __open_c_inode(uint8_t flags); - -/* opens a file streaming by a path */ -int8_t open(const char *path, uint8_t flags); - -/* list content of directory */ -size_t ls(int8_t fd, struct dirent *buf, uint8_t all); - -/* find name through the directory entries */ -size_t find(int8_t fd, struct dirent *buf, const char *name); - -/* creates a new directory inside fd with the specified name */ -int8_t mkdir(int8_t fd, const char *name); - -/* creates a new file inside fd with the specified name */ -int8_t touch(int8_t fd, const char *name); - -/* creates a new symlink inside fd with the specified name */ -int8_t ln(int8_t fd, const char *name); - -/* change virtual seek position of the fd */ -int8_t seek(int8_t fd, fsize_t pos); - -/* reads a string from the fd until the terminator is reached */ -size_t readline(int8_t fd, char *buf, char term); - -/* writes a string into the fd */ -int8_t print(int8_t fd, const char *str); - -/* reads n bytes from the fd */ -size_t read(int8_t fd, void *buf, size_t n); - -/* writes n bytes into the fd */ -int8_t write(int8_t fd, const void *buf, size_t n); - -/* frees fd space */ -void close(int8_t fd); - -#endif // __FD_H__ diff --git a/sw/z80/kernel/include/fs/fdop.h b/sw/z80/kernel/include/fs/fdop.h deleted file mode 100644 index d4b1b77..0000000 --- a/sw/z80/kernel/include/fs/fdop.h +++ /dev/null @@ -1,140 +0,0 @@ -#ifndef __FDOP_H__ -#define __FDOP_H__ - -#include "types.h" - -#ifndef __DIRENT_H__ -struct dirent; -#endif - -/* macro for direct binding */ - -#define FD_BIND_AS_DIR(oper) { \ - oper.ls = &as_ls; \ - oper.find = &as_find; \ - oper.mkdir = &as_mkdir; \ - oper.rmdir = &as_rmdir; \ - oper.touch = &as_touch; \ - oper.rm = &as_rm; \ - oper.ln = &as_ln; \ - } - -#define FD_BIND_SS_DIR(oper) { \ - oper.ls = &ss_ls; \ - oper.find = &ss_find; \ - oper.mkdir = &ss_mkdir; \ - oper.rmdir = &ss_rmdir; \ - oper.touch = &ss_touch; \ - oper.rm = &ss_rm; \ - oper.ln = &ss_ln; \ - } - -#define FD_BIND_AS_FILE(opers, flags) { \ - if (flags & OPEN_READ) \ - opers.readline = as_readline; \ - if (flags & OPEN_APPEND) \ - opers.append = as_append; \ - else if (flags & OPEN_WRITE) \ - opers.print = as_print; \ - } - -#define FD_BIND_SS_FILE(opers, flags) { \ - if (flags & OPEN_READ) \ - opers.readline = ss_readline; \ - if (flags & OPEN_APPEND) \ - opers.append = ss_append; \ - else if (flags & OPEN_WRITE) \ - opers.print = ss_print; \ - } - -#define FD_BIND_AS_BINFILE(opers, flags) { \ - if (flags & OPEN_READ) \ - opers.read = as_read; \ - if (flags & OPEN_APPEND) \ - opers.bin_append = as_bin_append; \ - else if (flags & OPEN_WRITE) \ - opers.write = as_write; \ - } - -#define FD_BIND_SS_BINFILE(opers, flags) { \ - if (flags & OPEN_READ) \ - opers.read = ss_read; \ - if (flags & OPEN_APPEND) \ - opers.bin_append = ss_bin_append; \ - else if (flags & OPEN_WRITE) \ - opers.write = ss_write; \ - } - -/* Set of file descriptors operations */ -/* Determines if to use the serial interface or the address space */ - -/* Address space section */ - -/* File functions */ - -size_t as_readline(inode_t inode, fsize_t seek, char *buf, char term); - -size_t as_print(inode_t inode, fsize_t seek, const char *str); - -size_t as_append(inode_t inode, fsize_t *seek_ptr, const char *str); - - -size_t as_read(inode_t inode, fsize_t seek, void *buf, size_t n); - -size_t as_write(inode_t inode, fsize_t seek, const void *buf, size_t n); - -size_t as_bin_append(inode_t inode, fsize_t *seek_ptr, const void *buf, size_t -n); - -/* Directory functions */ - -size_t as_ls(inode_t inode, struct dirent *buf, uint8_t all); - -size_t as_find(inode_t inode, struct dirent *buf, const char *name); - -int8_t as_mkdir(inode_t inode, const char *name); - -int8_t as_rmdir(inode_t inode, const char *name); - -int8_t as_touch(inode_t inode, const char *name); - -int8_t as_rm(inode_t inode, const char *name); - -int8_t as_ln(inode_t inode, const char *path, const char *name); - -/* Serial Space section */ -/* Warning, it doesn't switch to the right driver */ - -/* File functions */ - -size_t ss_readline(inode_t inode, fsize_t seek, char *buf, char term); - -size_t ss_print(inode_t inode, fsize_t seek, const char *str); - -size_t ss_append(inode_t inode, fsize_t *seek_ptr, const char *str); - - -size_t ss_read(inode_t inode, fsize_t seek, void *buf, size_t n); - -size_t ss_write(inode_t inode, fsize_t seek, const void *buf, size_t n); - -size_t ss_bin_append(inode_t inode, fsize_t *seek_ptr, const void *buf, size_t -n); - -/* Directory functions */ - -size_t ss_ls(inode_t inode, struct dirent *buf, uint8_t all); - -size_t ss_find(inode_t inode, struct dirent *buf, const char *name); - -int8_t ss_mkdir(inode_t inode, const char *name); - -int8_t ss_rmdir(inode_t inode, const char *name); - -int8_t ss_touch(inode_t inode, const char *name); - -int8_t ss_rm(inode_t inode, const char *name); - -int8_t ss_ln(inode_t, const char *path, const char *name); - -#endif // __FDOP_H__ diff --git a/sw/z80/kernel/include/fs/fs.h b/sw/z80/kernel/include/fs/fs.h deleted file mode 100644 index ad20adb..0000000 --- a/sw/z80/kernel/include/fs/fs.h +++ /dev/null @@ -1,63 +0,0 @@ -#ifndef __FS_H__ -#define __FS_H__ - -#include "types.h" - -#define FS_OFFSET 0x1000 - -#define FS_BLOCKS_SIZE 512 -#define FS_BLOCKS_N 8 -#define FS_BLOCKS_IND 6 - -#define INODE_TYPE_FILE 0x0 -#define INODE_TYPE_DIR 0x1 -#define INODE_TYPE_SLINK 0x2 -#define INODE_TYPE_SPECIAL 0x3 - -#define INODE_META_SIZE 8 - -/* inode basic structure */ -struct fs_inode -{ - /* inode meta data */ - - uint mode :3; // chmod - uint uid :3; // chown - uint type :2; // file, dir, sym-link, special - - time_t ctime; // creation time - - uint24_t size; // inode size - - /* data storage informations */ - /* it doesn't allocate memory, virtual size FS_BLOCKS_N */ - blk_t blocks[]; -}; - -#define FS_DEV_ROM 0x7f /* 01111111 */ -#define FS_DEV_NULL 0x80 /* 10000000 */ - -#define FS_ROM_SPACE 0x2000 // second rom - -#define FS_INO_ROOT 0x0 // first inode - -#define FS_INODE_ROOT(inode) {inode.dev = 0xff; inode.inode = 0x0} -#define FS_INODE_NULL(inode) {inode.dev = 0x80; inode.inode = 0x0} - -#define FS_USE_ROM(inode) {inode.dev == 0x7f} - -/* get block seek in current device */ -devsize_t fs_block(blk_t block); - -/* get common inode seek in current device */ -/* c_inode must be set first */ -/* returns seek at the beginning of blocks field */ -devsize_t fs_inode(struct fs_inode *buf); - -/* common inode for syscalls */ -extern inode_t c_inode; - -/* parse a path, absolute or relative to c_inode */ -inode_t fs_parse_path(const char *path); - -#endif // __FS_H__ diff --git a/sw/z80/kernel/include/fs/iter.h b/sw/z80/kernel/include/fs/iter.h deleted file mode 100644 index 41f011d..0000000 --- a/sw/z80/kernel/include/fs/iter.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef __ITER_H__ -#define __ITER_H__ - -struct inode_iter -{ - devsize_t dev_seek; /* seek position in the volume */ - devsize_t blk_end; /* end of the block */ - - int16_t blk_index; /* index of the block */ - - int8_t blk_level; /* recursion level, indirect blocks */ - - fsize_t fseek; /* virtual seek in the file */ - fsize_t size; /* file size */ -}; - -#endif // __ITER_H__ diff --git a/sw/z80/kernel/include/fs/users.h b/sw/z80/kernel/include/fs/users.h deleted file mode 100644 index 83980e5..0000000 --- a/sw/z80/kernel/include/fs/users.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef USERS_H -#define USERS_H - -#include "types.h" - -#define USERS_MAX 8 -#define USER_ROOT 0 - -/* current user in use */ -extern struct fs_user c_user; - -struct fs_user -{ - char name[32]; - ino_t home; - uint8_t perm; // TODO, permissions -}; - -/* all users are in rom device */ - -#endif diff --git a/sw/z80/kernel/include/memory.h b/sw/z80/kernel/include/memory.h deleted file mode 100644 index 67c4b88..0000000 --- a/sw/z80/kernel/include/memory.h +++ /dev/null @@ -1,50 +0,0 @@ -#ifndef __MEMORY_H__ -#define __MEMORY_H__ - -#include "types.h" -#include "devices.h" - -/* maximum number of pages on the system */ -#define PAGES_MAX_COUNT 32 -#define PAGE_SIZE 1000 - -/* in our system there are only 16 pages since only 64KB can be addressed - * to optimize the memory management in ROM and RAM only pages from this set - * shall be used - */ -// ROM -#define ADDR_PAGE_0 0x0000 -#define ADDR_PAGE_1 0x1000 -#define ADDR_PAGE_2 0x2000 -#define ADDR_PAGE_3 0x3000 -// IOSPACE -#define ADDR_PAGE_4 0x4000 -#define ADDR_PAGE_5 0x5000 -#define ADDR_PAGE_6 0x6000 -#define ADDR_PAGE_7 0x7000 -// RAM -#define ADDR_PAGE_8 0x8000 -#define ADDR_PAGE_9 0x9000 -#define ADDR_PAGE_10 0xA000 -#define ADDR_PAGE_11 0xB000 -#define ADDR_PAGE_12 0xC000 -#define ADDR_PAGE_13 0xD000 -#define ADDR_PAGE_14 0xE000 -#define ADDR_PAGE_15 0xF000 - -#define ADDR_PAGE_FIRST ADDR_PAGE_8 -#define ADDR_PAGE_LAST ADDR_PAGE_15 - -struct page -{ - pid_t pid; // process owner of the page (0 if free) - uint16_t addr; // physical address -}; - -int mmu_write_table(void); - -int page_new(void); -int page_map(int page, int pid, uint16_t addr); -int page_unmap(int page); - -#endif // __MEMORY_H__ diff --git a/sw/z80/kernel/include/process.h b/sw/z80/kernel/include/process.h deleted file mode 100644 index 3b0c843..0000000 --- a/sw/z80/kernel/include/process.h +++ /dev/null @@ -1,43 +0,0 @@ -#ifndef __PROCESS_H__ -#define __PROCESS_H__ - -#include "types.h" -#include "memory.h" - - /* maximum number of processes (i.e. pages in ram) - * since each program can use only one page in ram - */ -#define PROC_COUNT 2 - -/* the pid is defined with a single byte (pid_t is uint8_t), because of that - * there cannot be more than 255 processes open at the same time. this is a - * limitation but for our purposes is more than enough - */ -#define PID_COUNT_MAX 255 - -struct executable -{ - void *text; - size_t text_size; - void *bss; - size_t bss_size; -}; - -struct process -{ - uint blocked :1; // process is waiting for hardware or locked - uint running :1; // pid is used - uint pages; // number of pages used by the process - struct page page[4]; // pages used by the process -}; - -pid_t newpid(void); - -int fork(void); -int exec(char *path, char *args); -int spawn(char *path, char *args); - -pid_t getpid(void); -int kill(pid_t pid); - -#endif // __PROCESS_H__ diff --git a/sw/z80/kernel/include/sio.h b/sw/z80/kernel/include/sio.h deleted file mode 100644 index 276b99c..0000000 --- a/sw/z80/kernel/include/sio.h +++ /dev/null @@ -1,43 +0,0 @@ -#ifndef __SIO_H__ -#define __SIO_H__ - -#include "types.h" - -#define SIO_PORT_0 0x0 -#define SIO_PORT_1 0x1 -#define SIO_PORT_2 0x2 -#define SIO_PORT_3 0x3 -#define SIO_PORT_4 0x4 -#define SIO_PORT_5 0x5 -#define SIO_PORT_6 0x6 -#define SIO_PORT_7 0x7 - -/* current port in use */ -extern uint8_t sio_port; - -/* current seek in the device */ -extern devsize_t sio_seek; - -struct dev_buffer -{ - // TODO, bytes needed to the device buffer interface -}; - -/* points to the buffers mapped in the I/O space */ -/* to be defined precisely in assembly */ -extern volatile struct dev_buffer sio_buffers[8]; - -/* initialize serial interface */ -void sio_init(); - -/* syscall: read one byte from the current device */ -uint8_t sio_recv(); -/* syscall: write one byte into the current device */ -void sio_send(uint8_t value); - -/* read n bytes from the current port */ -size_t sio_read(void *buffer, size_t n); -/* write n bytes into the current port */ -int8_t sio_write(const void *buffer, size_t n); - -#endif // __SIO_H__ diff --git a/sw/z80/kernel/include/stat.h b/sw/z80/kernel/include/stat.h deleted file mode 100644 index 44c0f63..0000000 --- a/sw/z80/kernel/include/stat.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef __STAT_H__ -#define __STAT_H__ - -#include "types.h" - -struct stat -{ - inode_t inode; /* inode reference */ - - uint mode :3; /* mode */ - uint uid :3; /* owner id */ - uint type :2; /* file, dir or link */ - - devsize_t size; /* file size */ - - size_t blk_size; /* single block size */ - size_t blk_used; /* blocks used by the file */ - - time_t ctime; /* creation time */ -} - -struct stat * stat(const char *path, struct stat *buffer); - -#endif // __STAT_H__ diff --git a/sw/z80/kernel/include/types.h b/sw/z80/kernel/include/types.h deleted file mode 100644 index c6e620b..0000000 --- a/sw/z80/kernel/include/types.h +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef __TYPES_H__ -#define __TYPES_H__ - -/* only types from primitive types are defined in this file */ - -typedef volatile unsigned char register_t; - -typedef unsigned int uint; - -typedef char int8_t; -typedef unsigned char uint8_t; -typedef int int16_t; -typedef unsigned int uint16_t; -typedef long int int32_t; -typedef unsigned long int uint32_t; - -typedef uint16_t size_t; -typedef int16_t ssize_t; - -typedef uint8_t pid_t; -typedef uint16_t ino_t; - -typedef uint8_t dev_t; -typedef uint32_t devsize_t; -typedef uint8_t fd_t; -typedef uint16_t blk_t; -typedef uint8_t user_t; - -typedef struct { - uint8_t member[3]; - -} uint24_t; - -typedef uint32_t fsize_t; - -typedef struct -{ - dev_t dev; // device id, global in the fs - ino_t inode; // inode id relative to the volume - -} inode_t; - -typedef struct time_s -{ - struct - { - uint minutes :6; - uint hour :5; - - } time; - - struct - { - uint day :5; - uint month :4; - uint year :12; - - } date; - -} time_t; - -#endif diff --git a/sw/z80/kernel/kernel.c b/sw/z80/kernel/kernel.c deleted file mode 100644 index 3d5aeb6..0000000 --- a/sw/z80/kernel/kernel.c +++ /dev/null @@ -1,7 +0,0 @@ -#include "types.h" -#include "usart.h" - -void kmain(void) -{ - usart_init(USART_BAUDRATE_9600, USART_PARITY_EVEN, USART_STOP_BITS_1); -} diff --git a/sw/z80/kernel/makefile b/sw/z80/kernel/makefile deleted file mode 100644 index be8eed4..0000000 --- a/sw/z80/kernel/makefile +++ /dev/null @@ -1,53 +0,0 @@ -#### -# source code settings -# -OSNAME := helvetiOS - -CSOURCES := $(wildcard *.c) \ - $(wildcard drivers/*.c) - -OBJECTS := $(patsubst %.c,build/%.rel,$(CSOURCES)) -HEXFILE := build/$(OSNAME).hex -BINARY := build/$(OSNAME).bin - -### -# compiler settings - -CC := sdcc - -CFLAGS := -mz80 \ - -I include \ - -I include/drivers \ - -I libc/include \ - --opt-code-size \ - -DDEBUG - -LDFLAGS := -mz80 --no-std-crt0 build/crt0.rel \ - --std-c89 -pedantic \ - --code-loc 0x0800 --data-loc 0x8000 - -.PHONY: dirs dis clean -all: $(BINARY) - -# build binary -$(BINARY): $(OBJECTS) dirs - $(CC) $(LDFLAGS) $(OBJECTS) -o $(HEXFILE) - makebin -s 16384 $(HEXFILE) $(BINARY) - -$(OBJECTS): build/%.rel : %.c $(CSOURCES) dirs build/crt0.rel - @printf "\n" - $(CC) $(CFLAGS) -c $< -o $@ - -build/crt0.rel: crt0.s - sdasz80 -o $< - @mv crt0.rel build - -dirs: - mkdir -p build build/kernel build/libc build/kernel/drivers - -dis: $(BINARY) - dz80 -b -n $< - -clean: - - rm -rd build/* - - rm crt0.rel diff --git a/sw/z80/kernel/memory.c b/sw/z80/kernel/memory.c deleted file mode 100644 index 1b2cc76..0000000 --- a/sw/z80/kernel/memory.c +++ /dev/null @@ -1,94 +0,0 @@ -#include "memory.h" - -static struct page pages_table[PAGES_MAX_COUNT]; - -int mmu_write_table(void) -{ - int i; - - for (i = 0; i < PAGES_MAX_COUNT; i++) { - if (pages_table[i].pid != 0) { - // write to mmu table - } - } - - return 0; -} - -int page_new(void) -{ - int i, used; - uint16_t addr; - - for (addr = ADDR_PAGE_FIRST; addr < ADDR_PAGE_LAST; addr += PAGE_SIZE) { - used = 0; - - for (i = 0; i < PAGES_MAX_COUNT; i++) { - if (pages_table[i].addr == addr) { - used = 1; - break; - } - } - - if (!used) - return i; - } - - return -1; -} - -int page_map(int page, int pid, uint16_t addr) -{ - if (page >= PAGES_MAX_COUNT) - return -1; - - if (pages_table[page].pid != 0) - return -2; - - pages_table[page].addr = addr; - pages_table[page].pid = pid; - - return 0; -} - -int page_unmap(int page) -{ - if (page >= PAGES_MAX_COUNT) - return -1; - - if (pages_table[page].pid == 0) - return -2; - - pages_table[page].pid = 0; - pages_table[page].addr = 0; - return 0; -} - -/* k_malloc manager */ -/* -struct k_buf_entry k_buf_table[K_BUF_MAX_COUNT]; - -struct k_buf k_buffers[K_BUF_MAX_COUNT]; - -void * k_malloc() -{ - for (uint8_t i = 0; i < K_BUF_TABLE_COUNT; i++) - { - for (uint8_t bit = 0x80, j = 0; j < 8; bit >>= 1, j++) - { - if (bit & k_buf_table[i]) - { - k_buf_table[i] |= bit; - return &k_buffers[8 * i + j]; - } - } - } -} - -void k_free(void * ptr) -{ - uint8_t index = (ptr - &k_buffers[0]) / K_BUF_SIZE; - - if (index < K_BUF_MAX_COUNT) - k_buf_table[index / 8] ^= 0x80 >> index % 8; -}*/ diff --git a/sw/z80/kernel/process.c b/sw/z80/kernel/process.c deleted file mode 100644 index 7d8db89..0000000 --- a/sw/z80/kernel/process.c +++ /dev/null @@ -1,58 +0,0 @@ -#include "process.h" - -static struct process proc_table[PID_COUNT_MAX]; -static struct process *current_proc; - -pid_t newpid(void) -{ - int i; - static pid_t last_pid = 0; - - for (i = 0; i < PID_COUNT_MAX; i++, last_pid++) { - if (last_pid == PID_COUNT_MAX) { - last_pid = 0; - continue; - } - - if (!proc_table[last_pid].running) - break; - } - - if (i >= PID_COUNT_MAX) - return 0; - - return last_pid; -} - -int fork(void) -{ - int i, p; - pid_t child_pid = newpid(); - - if (child_pid == 0) - return -1; - - - for (i = 0; i < current_proc->pages; i++) { - p = page_new(); - - if (p == -1) { - return -2; - } - - // TODO: use memcpy() - // SDCC does not allow assignemnts of structs - - // proc_table[child_pid].page[i] = p; - } -} - -int exec(char *path, char *args) -{ - -} - -int spawn(char *path, char *args) -{ - -} diff --git a/sw/z80/libc/include/stdint.h b/sw/z80/libc/include/stdint.h deleted file mode 100644 index 5e8caf3..0000000 --- a/sw/z80/libc/include/stdint.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __STDINT_H__ -#define __STDINT_H__ - -typedef unsigned int uint; - -typedef char int8_t; -typedef unsigned char uint8_t; -typedef int int16_t; -typedef unsigned int uint16_t; -typedef long int int32_t; -typedef unsigned long int uint32_t; - -#endif // __STDINT_H__
\ No newline at end of file diff --git a/sw/z80/libc/include/stdio.h b/sw/z80/libc/include/stdio.h deleted file mode 100644 index b31cdfd..0000000 --- a/sw/z80/libc/include/stdio.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef __STDIO_H__ -#define __STDIO_H__ - -#include "types.h" - -extern uint8_t *stdout, stderr; - -void putc(char ch, uint8_t *buffer); -int printf(const char *fmt, ...); - -#endif diff --git a/sw/z80/libc/include/stdlib.h b/sw/z80/libc/include/stdlib.h deleted file mode 100644 index c69f573..0000000 --- a/sw/z80/libc/include/stdlib.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __STDLIB_H__ -#define __STDLIB_H__ - -#include "stdint.h" - - -#endif // __STDLIB_H__
\ No newline at end of file diff --git a/sw/z80/libc/include/string.h b/sw/z80/libc/include/string.h deleted file mode 100644 index 9c002e3..0000000 --- a/sw/z80/libc/include/string.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef __STRING_H__ -#define __STRING_H__ - -#include "types.h" - -void * memset(void *dest, const int8_t src, size_t n); - -void *memcpy(void *dest, const void *src, size_t n); - -int8_t memcmp(const void *s1, const void *s2, size_t n); - -#endif diff --git a/sw/z80/libc/include/sysio.h b/sw/z80/libc/include/sysio.h deleted file mode 100644 index 5d1f5ae..0000000 --- a/sw/z80/libc/include/sysio.h +++ /dev/null @@ -1,55 +0,0 @@ -#ifndef __SYSIO_H__ -#define __SYSIO_H__ - -#include "types.h" - -/* -* Memory management -*/ - -void * malloc(uint16_t size); -uint16_t malloc_size(void * address); -void free(void * address); - -/* -* File management -*/ - -#define F_WRITE "w" -#define F_READ "r" -#define F_BIN_WRITE "wb" -#define F_BIN_READ "rb" - -#define F_READ_CODE 0x0 -#define F_WRITE_CODE 0x1 -#define F_BIN_READ_CODE 0x2 -#define F_BIN_WRITE_CODE 0x3 - -#define F_PERM_READ 0x0 -#define F_PERM_WRITE 0x1 -#define F_PERM_RW 0x2 - -struct file { - - const char * path; - unsigned int mode:4; - unsigned int permission:4; -}; - -#define FILE struct file - -FILE * fopen(const char * path, const char * mode); -uint8_t fclose(FILE * file); - -// TODO: other functions - -/* -* Processes management -*/ - -#define PID uint16_t - -void exit(); // exit this program -void interrupt(PID) - -#endif
\ No newline at end of file diff --git a/sw/z80/libc/include/types.h b/sw/z80/libc/include/types.h deleted file mode 100644 index a083bfe..0000000 --- a/sw/z80/libc/include/types.h +++ /dev/null @@ -1,60 +0,0 @@ -#ifndef __TYPES_H__ -#define __TYPES_H__ - -/* only types from primitive types are defined in this file */ - -typedef volatile unsigned char register_t; - -typedef unsigned int uint; - -typedef char int8_t; -typedef unsigned char uint8_t; -typedef int int16_t; -typedef unsigned int uint16_t; -typedef long int int32_t; -typedef unsigned long int uint32_t; - -typedef uint16_t size_t; -typedef int16_t ssize_t; - -typedef uint8_t pid_t; -typedef uint16_t ino_t; - -typedef uint8_t dev_t; -typedef uint32_t devsize_t; -typedef uint8_t fd_t; -typedef uint16_t blk_t; -typedef uint8_t user_t; -typedef struct { - uint8_t member[3]; -} uint24_t; - -typedef uint32_t fsize_t; - -typedef struct -{ - dev_t dev; // device id, global in the fs - ino_t inode; // inode id relative to the volume - -} inode_t; - -typedef struct time_s -{ - struct - { - uint minutes :6; - uint hour :5; - - } time; - - struct - { - uint day :5; - uint month :4; - uint year :12; - - } date; - -} time_t; - -#endif diff --git a/sw/z80/libc/stdio.c b/sw/z80/libc/stdio.c deleted file mode 100644 index c2548d6..0000000 --- a/sw/z80/libc/stdio.c +++ /dev/null @@ -1,12 +0,0 @@ -#include "stdio.h" - -void putc(char ch, uint8_t *buffer) -{ - *buffer = ch; - *(++buffer) = '\0'; -} - - -int printf(const char *fmt, ...) -{ -} diff --git a/sw/z80/libc/string.c b/sw/z80/libc/string.c deleted file mode 100644 index 57b3a7f..0000000 --- a/sw/z80/libc/string.c +++ /dev/null @@ -1,37 +0,0 @@ -#include "string.h" - -void *memset(void *dest, const int8_t src, size_t n) { - - char *dp = (char *) dest; - - while (n--) - *(dp++) = src; - - return dest; -} - -void *memcpy(void *dest, void *src, size_t n) -{ - char *dp = dest; - char *sp = src; - - while (n--) { - *dp++ = *sp++; - } - - return dest; -} - -int8_t memcmp(void *s1, void *s2, size_t n) -{ - char *u1 = (char *) s1; - char *u2 = (char *) s2; - - for ( ; n--; u1++, u2++) { - - if (*u1 != *u2) - return u1 - u2; - } - - return 0; -}
\ No newline at end of file diff --git a/sw/z80/tests/asm/main.s b/sw/z80/tests/asm/main.s deleted file mode 100644 index 8cf4df0..0000000 --- a/sw/z80/tests/asm/main.s +++ /dev/null @@ -1,40 +0,0 @@ - .module crt0 - .area _HEADER (ABS) - -;; Reset vectors - .org 0 - jp init - - .org 0x38 ; the instruction 0xff (not written) resets to this location - jp init - -;; main code - .org 0x100 - .globl _main - -init: - ;; Set stack pointer directly above top of memory. - ld sp,#0xffff - - ;; Start of the program - call _main - jp _exit - -_exit: - halt - ; jp _exit - -;; Ordering of segments for the linker. - .area _HOME - .area _CODE -_main: - ret - .area _INITIALIZER - .area _GSINIT - .area _GSFINAL - - .area _DATA - .area _INITIALIZED - .area _BSEG - .area _BSS - .area _HEAP diff --git a/sw/z80/tests/asm/makefile b/sw/z80/tests/asm/makefile deleted file mode 100644 index 413b0fe..0000000 --- a/sw/z80/tests/asm/makefile +++ /dev/null @@ -1,47 +0,0 @@ -#### -# source code settings -# -OSNAME := ram_test - -CSOURCES := $(wildcard *.s) - -OBJECTS := $(patsubst %.s,build/%.rel,$(SOURCES)) -HEXFILE := build/$(OSNAME).hex -BINARY := build/$(OSNAME).bin - -### -# compiler settings -# -ASM := sdasz80 -LD := sdldz80 - -FLAGS := -LDFLAGS := - -.PHONY: flash dirs dis clean -all: $(BINARY) - -flash: $(BINARY) - minipro -p M28C64 -w $< - -# build binary -$(BINARY): $(OBJECTS) dirs - $(LD) $(LDFLAGS) $(OBJECTS) -o $(HEXFILE) - makebin -s 8192 -yo 1 $(HEXFILE) $(BINARY) - -$(OBJECTS): build/%.rel : %.s $(SOURCES) dirs - @printf "\n" - $(ASM) $(FLAGS) $< -o - -build/crt0.rel: crt0.s - sdasz80 -o $< - @mv crt0.rel build/ - -dirs: - mkdir -p build - -dis: $(BINARY) - r2 -a z80 $< -c 'pd 0x10; s 0x100; pd 10; s 0x200; pd 10' - -clean: - - rm -rd build diff --git a/sw/z80/tests/pio/crt0.s b/sw/z80/tests/pio/crt0.s deleted file mode 100644 index c900065..0000000 --- a/sw/z80/tests/pio/crt0.s +++ /dev/null @@ -1,38 +0,0 @@ - .module crt0 - .area _HEADER (ABS) - -;; Reset vectors - .org 0 - jp init - - .org 0x38 ; the instruction 0xff (not written) resets to this location - jp init - -;; main code - .org 0x100 - .globl _main - -init: - ;; Set stack pointer directly above top of memory. - ld sp,#0xffff - - ;; Start of the program - call _main - jp _exit - -_exit: - halt - ; jp _exit - -;; Ordering of segments for the linker. - .area _HOME - .area _CODE - .area _INITIALIZER - .area _GSINIT - .area _GSFINAL - - .area _DATA - .area _INITIALIZED - .area _BSEG - .area _BSS - .area _HEAP diff --git a/sw/z80/tests/pio/main.c b/sw/z80/tests/pio/main.c deleted file mode 100644 index 7ac64bc..0000000 --- a/sw/z80/tests/pio/main.c +++ /dev/null @@ -1,50 +0,0 @@ -// #include "pio.h" - -#include <stdint.h> - -#define PIO_A_DATA 0x10 -#define PIO_B_DATA 0x11 -#define PIO_A_CMD 0x12 -#define PIO_B_CMD 0x13 - -void main(void) -{ - __asm - ;; output variable - ld h, #0x00 - - ;; set bit mode - ld c, #PIO_B_CMD - - ld a, #0xCF - out (c), a - - ;; set all pins to output - ld a, #0x00 - out (c), a - - ;; disable interrupts - ld a, #0x0C - out (c), a - - ;; load data addr - ld c, #PIO_B_DATA -loop: - out (c), h - ld a, h - - cpl - ld h, a - jr loop - __endasm; - - // uint8_t i = 0; - - // pio_set_mode(PIO_A, PIO_MODE_BIT_IO, 0x00); - // pio_set_interrupts(PIO_A, PIO_INT_DISABLE); - - // while (1) { - // pio_write(PIO_A, i); - // i = ~i; - // } -}
\ No newline at end of file diff --git a/sw/z80/tests/pio/makefile b/sw/z80/tests/pio/makefile deleted file mode 100644 index 1213902..0000000 --- a/sw/z80/tests/pio/makefile +++ /dev/null @@ -1,72 +0,0 @@ -#### -# source code settings -# -OSNAME := pio_test - -CSOURCES := $(wildcard *.c) -LIBS := ../../arch/build/arch.a \ - ../../drivers/build/drivers.a - -OBJECTS := $(patsubst %.c,build/%.rel,$(CSOURCES)) -HEXFILE := build/$(OSNAME).hex -BINARY := build/$(OSNAME).bin - -### -# compiler settings -# -CC := sdcc - -CFLAGS := -mz80 \ - --no-std-crt0 build/crt0.rel \ - --allow-unsafe-read \ - -I . \ - -I ../../arch/include \ - -I ../../drivers/include \ - -DDEBUG - -LDFLAGS := -mz80 \ - --no-std-crt0 build/crt0.rel \ - -L ../../drivers/build \ - -l drivers.a \ - -pedantic \ - --code-loc 0x0200 - # --data-loc 0x2000 - -.PHONY: flash dirs dis clean -all: $(BINARY) - -flash: $(BINARY) - minipro -p M28C64 -w $< - -# build binary -$(BINARY): $(OBJECTS) dirs - $(CC) $(LDFLAGS) $(OBJECTS) -o $(HEXFILE) - makebin -s 8192 -yo 1 $(HEXFILE) $(BINARY) - -$(OBJECTS): build/%.rel : %.c $(CSOURCES) dirs build/crt0.rel $(LIBS) - @printf "\n" - $(CC) $(CFLAGS) -c $< -o $@ - -$(LIBS): %.a: - @printf "\n" - make -C $(shell printf $@ | sed 's:build.*.::') - -build/crt0.rel: crt0.s - sdasz80 -o $< - @mv crt0.rel build/ - -dirs: - mkdir -p build - -dis: $(BINARY) - dz80 -b -n -t $(BINARY) - r2 -a z80 $< \ - -c 'afn main 0x200; \ - pd 0x10; \ - s 0x100; \ - pd 10; \ - s 0x200; \ - pd 0x95' | tee build/dis.txt - -clean: - - rm -rd build diff --git a/sw/z80/tests/ram/crt0.s b/sw/z80/tests/ram/crt0.s deleted file mode 100644 index b0caa8c..0000000 --- a/sw/z80/tests/ram/crt0.s +++ /dev/null @@ -1,40 +0,0 @@ - .module crt0 - .area _HEADER (ABS) - -;; Reset vectors - .org 0 - jp init - - .org 0x38 ; the instruction 0xff (not written) resets to this location - jp init - -;; main code - .org 0x100 - .globl _main - -init: - ;; Set stack pointer directly above top of memory. - ld sp,#0xffff - - ;; Start of the program - call _main - jp _exit - -_exit: - halt - jp _exit - -;; Ordering of segments for the linker. - .area _HOME - .area _CODE - .area _INITIALIZER - .area _GSINIT - .area _GSFINAL - - .area _DATA - .area _INITIALIZED - .area _BSEG - .area _BSS - .area _HEAP - - .area _CODE
\ No newline at end of file diff --git a/sw/z80/tests/ram/main.c b/sw/z80/tests/ram/main.c deleted file mode 100644 index 581072b..0000000 --- a/sw/z80/tests/ram/main.c +++ /dev/null @@ -1,13 +0,0 @@ - -void main(void) -{ - unsigned char j; - unsigned char *mem; - - j = 0; - mem = (unsigned char *) 0x8200; // somwhere in ram - - while (1) { - *mem = j++; - } -} diff --git a/sw/z80/tests/ram/makefile b/sw/z80/tests/ram/makefile deleted file mode 100644 index f8eb9fc..0000000 --- a/sw/z80/tests/ram/makefile +++ /dev/null @@ -1,54 +0,0 @@ -#### -# source code settings -# -OSNAME := ram_test - -CSOURCES := $(wildcard *.c) - -OBJECTS := $(patsubst %.c,build/%.rel,$(CSOURCES)) -HEXFILE := build/$(OSNAME).hex -BINARY := build/$(OSNAME).bin - -### -# compiler settings -# -CC := sdcc - -CFLAGS := -mz80 \ - -I . \ - -DDEBUG - -LDFLAGS := -mz80 \ - --no-std-crt0 build/crt0.rel \ - -pedantic - - # --code-loc 0x0120 \ - # --data-loc 0x2000 - -.PHONY: flash dirs dis clean -all: $(BINARY) - -flash: $(BINARY) - minipro -p M28C64 -w $< - -# build binary -$(BINARY): $(OBJECTS) dirs - $(CC) $(LDFLAGS) $(OBJECTS) -o $(HEXFILE) - makebin -s 8192 -yo 1 $(HEXFILE) $(BINARY) - -$(OBJECTS): build/%.rel : %.c $(CSOURCES) dirs build/crt0.rel - @printf "\n" - $(CC) $(CFLAGS) -c $< -o $@ - -build/crt0.rel: crt0.s - sdasz80 -o $< - @mv crt0.rel build/ - -dirs: - mkdir -p build - -dis: $(BINARY) - r2 -a z80 $< -c 'pd 0x10; s 0x100; pd 10; s 0x200; pd 10' - -clean: - - rm -rd build diff --git a/sw/z80/tests/usart/crt0.s b/sw/z80/tests/usart/crt0.s deleted file mode 100644 index c900065..0000000 --- a/sw/z80/tests/usart/crt0.s +++ /dev/null @@ -1,38 +0,0 @@ - .module crt0 - .area _HEADER (ABS) - -;; Reset vectors - .org 0 - jp init - - .org 0x38 ; the instruction 0xff (not written) resets to this location - jp init - -;; main code - .org 0x100 - .globl _main - -init: - ;; Set stack pointer directly above top of memory. - ld sp,#0xffff - - ;; Start of the program - call _main - jp _exit - -_exit: - halt - ; jp _exit - -;; Ordering of segments for the linker. - .area _HOME - .area _CODE - .area _INITIALIZER - .area _GSINIT - .area _GSFINAL - - .area _DATA - .area _INITIALIZED - .area _BSEG - .area _BSS - .area _HEAP diff --git a/sw/z80/tests/usart/main.c b/sw/z80/tests/usart/main.c deleted file mode 100644 index a905df2..0000000 --- a/sw/z80/tests/usart/main.c +++ /dev/null @@ -1,11 +0,0 @@ -#include "usart.h" -#include <stdint.h> - -void main(void) -{ - usart_init(USART_BAUDRATE_1200, USART_PARITY_NONE, USART_STOP_BITS_1); - - while (1) { - usart_write("Hello World!\n", 13); - } -} diff --git a/sw/z80/tests/usart/makefile b/sw/z80/tests/usart/makefile deleted file mode 100644 index 8aaf6b1..0000000 --- a/sw/z80/tests/usart/makefile +++ /dev/null @@ -1,72 +0,0 @@ -#### -# source code settings -# -OSNAME := usart_test - -CSOURCES := $(wildcard *.c) -LIBS := ../../arch/build/arch.a \ - ../../drivers/build/drivers.a - -OBJECTS := $(patsubst %.c,build/%.rel,$(CSOURCES)) -HEXFILE := build/$(OSNAME).hex -BINARY := build/$(OSNAME).bin - -### -# compiler settings -# -CC := sdcc - -CFLAGS := -mz80 \ - --no-std-crt0 build/crt0.rel \ - --allow-unsafe-read \ - -I . \ - -I ../../arch/include \ - -I ../../drivers/include \ - -DDEBUG - -LDFLAGS := -mz80 \ - --no-std-crt0 build/crt0.rel \ - -L ../../drivers/build \ - -l drivers.a \ - -pedantic \ - --code-loc 0x0200 - # --data-loc 0x2000 - -.PHONY: flash dirs dis clean -all: $(BINARY) - -flash: $(BINARY) - minipro -p M28C64 -w $< - -# build binary -$(BINARY): $(OBJECTS) dirs - $(CC) $(LDFLAGS) $(OBJECTS) -o $(HEXFILE) - makebin -s 8192 -yo 1 $(HEXFILE) $(BINARY) - -$(OBJECTS): build/%.rel : %.c $(CSOURCES) dirs build/crt0.rel $(LIBS) - @printf "\n" - $(CC) $(CFLAGS) -c $< -o $@ - -$(LIBS): %.a: - @printf "\n" - make -C $(shell printf $@ | sed 's:build.*.::') - -build/crt0.rel: crt0.s - sdasz80 -o $< - @mv crt0.rel build/ - -dirs: - mkdir -p build - -dis: $(BINARY) - dz80 -b -n -t $(BINARY) - r2 -a z80 $< \ - -c 'afn main 0x200; \ - pd 0x10; \ - s 0x100; \ - pd 10; \ - s 0x200; \ - pd 0x95' - -clean: - - rm -rd build |