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Diffstat (limited to 'sw/cpld_test/cpld_test.syn')
-rw-r--r-- | sw/cpld_test/cpld_test.syn | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/sw/cpld_test/cpld_test.syn b/sw/cpld_test/cpld_test.syn new file mode 100644 index 0000000..06b6554 --- /dev/null +++ b/sw/cpld_test/cpld_test.syn @@ -0,0 +1,11 @@ +JDF B +// Created by Version 2.0 +PROJECT cpld_test +DESIGN cpld_test Normal +DEVKIT M4A5-32/32-10JC +ENTRY Pure VHDL +MODULE cpld_test.vhd +MODSTYLE cpld_test Normal +SYNTHESIS_TOOL Synplify +SIMULATOR_TOOL ActiveHDL +TOPMODULE cpld_test |