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-rw-r--r--sw/z80/drivers/include/pio.h19
-rw-r--r--sw/z80/drivers/include/usart.h4
-rw-r--r--sw/z80/drivers/makefile8
-rw-r--r--sw/z80/drivers/pio.c11
-rw-r--r--sw/z80/drivers/usart.c2
5 files changed, 25 insertions, 19 deletions
diff --git a/sw/z80/drivers/include/pio.h b/sw/z80/drivers/include/pio.h
index a4b6fc2..a1137e4 100644
--- a/sw/z80/drivers/include/pio.h
+++ b/sw/z80/drivers/include/pio.h
@@ -10,23 +10,24 @@
// registers
#define PIO_REG_DATA 0
-#define PIO_REG_CTRL 1
+#define PIO_REG_CTRL 2
// #define PIO_REG_DATA_A (PIO_A + PIO_REG_PORT)
// #define PIO_REG_DATA_B 1 (PIO_B + PIO_REG_PORT)
// #define PIO_REG_CTRL_A 2 (PIO_A + PIO_REG_CTRL)
// #define PIO_REG_CTRL_B 3 (PIO_B + PIO_REG_CTRL)
-#define PIO_MODE_BYTE_IN 0
-#define PIO_MODE_BYTE_OUT 1
-#define PIO_MODE_BYTE_BI 2
-#define PIO_MODE_BIT_IO 3
+#define PIO_MODE_BYTE_OUT 0 // mode 0
+#define PIO_MODE_BYTE_IN 1 // mode 1
+#define PIO_MODE_BYTE_BI 2 // mode 2
+#define PIO_MODE_BIT_IO 3 // mode 3
-#define PIO_INT_ACTIVE_HIGH (1<<5)
-#define PIO_INT_AND_MODE (1<<6)
-#define PIO_INT_ENABLE (1<<7)
+#define PIO_INT_DISABLE 0
+#define PIO_INT_ACTIVE_HIGH 2
+#define PIO_INT_AND_MODE 4
+#define PIO_INT_ENABLE 8
-/* functions used internallyto interface with the device */
+/* functions used internally to interface with the device */
inline void _pio_write(uint8_t reg, uint8_t data);
inline uint8_t _pio_read(uint8_t reg);
diff --git a/sw/z80/drivers/include/usart.h b/sw/z80/drivers/include/usart.h
index bb06aab..fdc01e2 100644
--- a/sw/z80/drivers/include/usart.h
+++ b/sw/z80/drivers/include/usart.h
@@ -48,8 +48,8 @@
#define USART_AUTOFLOW_CTS 2
#define USART_AUTOFLOW_OFF 0
-typedef unsigned int uint;
-typedef uint8_t register_t;
+typedef unsigned int uint;
+typedef volatile uint8_t register_t;
/* stuctures for usart registers */
struct IER
diff --git a/sw/z80/drivers/makefile b/sw/z80/drivers/makefile
index 98f453a..65ded58 100644
--- a/sw/z80/drivers/makefile
+++ b/sw/z80/drivers/makefile
@@ -6,15 +6,17 @@ OBJECTS := $(patsubst %.c,build/%.rel,$(SOURCES))
CC := sdcc
AR := sdar
-CFLAGS := -mz80 -Iinclude -I../arch -DDEBUG
+CFLAGS := -mz80 -Iinclude -I../arch/include -DDEBUG
-.PHONY: dirs clean
+.PHONY: dirs rebuild clean
$(LIB): $(OBJECTS)
- $(AR) rcs $@ $(OBJECTS)
+ $(AR) vrcs $@ $(OBJECTS)
$(OBJECTS): build/%.rel: %.c $(SOURCES) dirs
$(CC) $(CFLAGS) -c $< -o $@
+rebuild: clean $(LIB)
+
dirs:
mkdir -p build
diff --git a/sw/z80/drivers/pio.c b/sw/z80/drivers/pio.c
index 18697d8..272e191 100644
--- a/sw/z80/drivers/pio.c
+++ b/sw/z80/drivers/pio.c
@@ -1,6 +1,7 @@
#include "pio.h"
-#if 0 /* old inline asm implementation */
+#ifdef PIO_ASM_INTERFACE
+/* old inline asm implementation */
inline void _pio_write(uint8_t reg, uint8_t data)
{
__asm
@@ -17,7 +18,6 @@ inline void _pio_write(uint8_t reg, uint8_t data)
__endasm;
}
-// incomplete
inline uint8_t _pio_read(uint8_t reg) __naked
{
__asm
@@ -31,7 +31,8 @@ inline uint8_t _pio_read(uint8_t reg) __naked
ret
__endasm;
}
-#endif
+
+#else
inline void _pio_write(uint8_t reg, uint8_t data)
{
@@ -43,6 +44,8 @@ inline uint8_t _pio_read(uint8_t reg)
return *((uint8_t *) (ADDR_DEV_PIO + reg));
}
+#endif
+
void pio_set_mode(int port, int mode, uint8_t io)
{
// 0x0F is a control sequence to set mode
@@ -58,7 +61,7 @@ void pio_set_mode(int port, int mode, uint8_t io)
void pio_set_interrupts(int port, int control)
{
// 0x07 is a control sequence to set interrupts
- _pio_write((PIO_REG_CTRL + port), (control | 0x07));
+ _pio_write((PIO_REG_CTRL + port), (control<<4 | 0x07));
}
void pio_set_interrupts_mask(int port, int control, uint8_t mask)
diff --git a/sw/z80/drivers/usart.c b/sw/z80/drivers/usart.c
index 9ec6dbd..9a5ee38 100644
--- a/sw/z80/drivers/usart.c
+++ b/sw/z80/drivers/usart.c
@@ -1,6 +1,6 @@
#include "usart.h"
-static struct _usart_device *_usart = (struct _usart_device *) ADDR_DEV_USART;
+static volatile struct _usart_device *_usart = ((struct _usart_device *) ADDR_DEV_USART);
void usart_set_baudrate(uint16_t baudrate)
{