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-rw-r--r--sw/z80/tests/pio/build/crt0.rel (renamed from sw/z80_tests/usart/build/crt0.rel)0
-rw-r--r--sw/z80/tests/pio/build/main.asm (renamed from sw/z80_tests/usart/build/main.asm)54
-rw-r--r--sw/z80/tests/pio/build/main.lst (renamed from sw/z80_tests/usart/build/main.lst)78
-rw-r--r--sw/z80/tests/pio/build/main.rel29
-rw-r--r--sw/z80/tests/pio/build/main.sym (renamed from sw/z80_tests/usart/build/main.sym)9
-rw-r--r--sw/z80/tests/pio/build/pio_test.lk (renamed from sw/z80_tests/usart/build/sample.lk)5
-rw-r--r--sw/z80/tests/pio/build/pio_test.map (renamed from sw/z80_tests/usart/build/sample.map)57
-rw-r--r--sw/z80/tests/pio/build/pio_test.noi (renamed from sw/z80_tests/usart/build/sample.noi)41
-rw-r--r--sw/z80/tests/pio/crt0.s (renamed from sw/z80_tests/usart/crt0.s)0
-rw-r--r--sw/z80/tests/pio/main.c12
-rw-r--r--sw/z80/tests/pio/makefile (renamed from sw/z80_tests/usart/makefile)22
-rw-r--r--sw/z80/tests/ram/build/crt0.rel (renamed from sw/z80_tests/ram/build/crt0.rel)17
-rw-r--r--sw/z80/tests/ram/build/main.asm (renamed from sw/z80_tests/ram/build/main.asm)0
-rw-r--r--sw/z80/tests/ram/build/main.lst (renamed from sw/z80_tests/ram/build/main.lst)0
-rw-r--r--sw/z80/tests/ram/build/main.rel (renamed from sw/z80_tests/ram/build/main.rel)0
-rw-r--r--sw/z80/tests/ram/build/main.sym (renamed from sw/z80_tests/ram/build/main.sym)0
-rw-r--r--sw/z80/tests/ram/build/ram_test.lk11
-rw-r--r--sw/z80/tests/ram/build/ram_test.map174
-rw-r--r--sw/z80/tests/ram/build/ram_test.noi50
-rw-r--r--sw/z80/tests/ram/build/test.lk (renamed from sw/z80_tests/ram/build/test.lk)0
-rw-r--r--sw/z80/tests/ram/build/test.map (renamed from sw/z80_tests/ram/build/test.map)0
-rw-r--r--sw/z80/tests/ram/build/test.noi (renamed from sw/z80_tests/ram/build/test.noi)0
-rw-r--r--sw/z80/tests/ram/build/test.z80 (renamed from sw/z80_tests/ram/build/test.z80)0
-rw-r--r--sw/z80/tests/ram/crt0.s (renamed from sw/z80_tests/ram/crt0.s)1
-rw-r--r--sw/z80/tests/ram/main.c (renamed from sw/z80_tests/ram/main.c)0
-rw-r--r--sw/z80/tests/ram/makefile (renamed from sw/z80_tests/ram/makefile)2
26 files changed, 411 insertions, 151 deletions
diff --git a/sw/z80_tests/usart/build/crt0.rel b/sw/z80/tests/pio/build/crt0.rel
index 809c0e6..809c0e6 100644
--- a/sw/z80_tests/usart/build/crt0.rel
+++ b/sw/z80/tests/pio/build/crt0.rel
diff --git a/sw/z80_tests/usart/build/main.asm b/sw/z80/tests/pio/build/main.asm
index 44f199a..453eead 100644
--- a/sw/z80_tests/usart/build/main.asm
+++ b/sw/z80/tests/pio/build/main.asm
@@ -9,8 +9,8 @@
; Public variables in this module
;--------------------------------------------------------
.globl _main
- .globl _usart_write
- .globl _usart_init
+ .globl _pio_write
+ .globl _pio_set_mode
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
@@ -47,44 +47,34 @@
; Function main
; ---------------------------------
_main::
-;main.c:5: usart_init(USART_BAUDRATE_1200, USART_PARITY_EVEN, USART_STOP_BITS_1);
- ld hl,#0x000a
+;main.c:7: pio_set_mode(PIO_A, PIO_MODE_BYTE_OUT, 0);
+ xor a, a
+ push af
+ inc sp
+ ld hl,#0x0001
push hl
- ld l, #0x01
+ ld l, #0x00
push hl
- ld l, #0x60
- push hl
- call _usart_init
- ld hl,#6
- add hl,sp
- ld sp,hl
-;main.c:6: usart_write("Hello, World!\n", 13);
- ld hl,#0x000d
- push hl
- ld hl,#___str_0
- push hl
- call _usart_write
+ call _pio_set_mode
pop af
pop af
-;main.c:8: while(1) {
+ inc sp
+;main.c:9: while (1) {
+ ld c,#0x00
00102$:
-;main.c:9: usart_write("done\n", 5);
- ld hl,#0x0005
+;main.c:10: pio_write(PIO_A, j++);
+ ld b,c
+ inc c
+ push bc
+ push bc
+ inc sp
+ ld hl,#0x0000
push hl
- ld hl,#___str_1
- push hl
- call _usart_write
- pop af
+ call _pio_write
pop af
+ inc sp
+ pop bc
jr 00102$
-___str_0:
- .ascii "Hello, World!"
- .db 0x0a
- .db 0x00
-___str_1:
- .ascii "done"
- .db 0x0a
- .db 0x00
.area _CODE
.area _INITIALIZER
.area _CABS (ABS)
diff --git a/sw/z80_tests/usart/build/main.lst b/sw/z80/tests/pio/build/main.lst
index c7b4201..4a1a872 100644
--- a/sw/z80_tests/usart/build/main.lst
+++ b/sw/z80/tests/pio/build/main.lst
@@ -9,8 +9,8 @@
9 ; Public variables in this module
10 ;--------------------------------------------------------
11 .globl _main
- 12 .globl _usart_write
- 13 .globl _usart_init
+ 12 .globl _pio_write
+ 13 .globl _pio_set_mode
14 ;--------------------------------------------------------
15 ; special function registers
16 ;--------------------------------------------------------
@@ -47,46 +47,34 @@
47 ; Function main
48 ; ---------------------------------
0000 49 _main::
- 50 ;main.c:5: usart_init(USART_BAUDRATE_1200, USART_PARITY_EVEN, USART_STOP_BITS_1);
- 0000 21 0A 00 [10] 51 ld hl,#0x000a
- 0003 E5 [11] 52 push hl
- 0004 2E 01 [ 7] 53 ld l, #0x01
- 0006 E5 [11] 54 push hl
- 0007 2E 60 [ 7] 55 ld l, #0x60
- 0009 E5 [11] 56 push hl
- 000A CDr00r00 [17] 57 call _usart_init
- 000D 21 06 00 [10] 58 ld hl,#6
- 0010 39 [11] 59 add hl,sp
- 0011 F9 [ 6] 60 ld sp,hl
- 61 ;main.c:6: usart_write("Hello, World!\n", 13);
- 0012 21 0D 00 [10] 62 ld hl,#0x000d
- 0015 E5 [11] 63 push hl
- 0016 21r2Er00 [10] 64 ld hl,#___str_0
- 0019 E5 [11] 65 push hl
- 001A CDr00r00 [17] 66 call _usart_write
- 001D F1 [10] 67 pop af
- 001E F1 [10] 68 pop af
- 69 ;main.c:8: while(1) {
- 001F 70 00102$:
- 71 ;main.c:9: usart_write("done\n", 5);
- 001F 21 05 00 [10] 72 ld hl,#0x0005
- 0022 E5 [11] 73 push hl
- 0023 21r3Dr00 [10] 74 ld hl,#___str_1
- 0026 E5 [11] 75 push hl
- 0027 CDr00r00 [17] 76 call _usart_write
- 002A F1 [10] 77 pop af
- 002B F1 [10] 78 pop af
- 002C 18 F1 [12] 79 jr 00102$
- 002E 80 ___str_0:
- 002E 48 65 6C 6C 6F 2C 81 .ascii "Hello, World!"
- 20 57 6F 72 6C 64
- 21
- 003B 0A 82 .db 0x0a
- 003C 00 83 .db 0x00
- 003D 84 ___str_1:
- 003D 64 6F 6E 65 85 .ascii "done"
- 0041 0A 86 .db 0x0a
- 0042 00 87 .db 0x00
- 88 .area _CODE
- 89 .area _INITIALIZER
- 90 .area _CABS (ABS)
+ 50 ;main.c:7: pio_set_mode(PIO_A, PIO_MODE_BYTE_OUT, 0);
+ 0000 AF [ 4] 51 xor a, a
+ 0001 F5 [11] 52 push af
+ 0002 33 [ 6] 53 inc sp
+ 0003 21 01 00 [10] 54 ld hl,#0x0001
+ 0006 E5 [11] 55 push hl
+ 0007 2E 00 [ 7] 56 ld l, #0x00
+ 0009 E5 [11] 57 push hl
+ 000A CDr00r00 [17] 58 call _pio_set_mode
+ 000D F1 [10] 59 pop af
+ 000E F1 [10] 60 pop af
+ 000F 33 [ 6] 61 inc sp
+ 62 ;main.c:9: while (1) {
+ 0010 0E 00 [ 7] 63 ld c,#0x00
+ 0012 64 00102$:
+ 65 ;main.c:10: pio_write(PIO_A, j++);
+ 0012 41 [ 4] 66 ld b,c
+ 0013 0C [ 4] 67 inc c
+ 0014 C5 [11] 68 push bc
+ 0015 C5 [11] 69 push bc
+ 0016 33 [ 6] 70 inc sp
+ 0017 21 00 00 [10] 71 ld hl,#0x0000
+ 001A E5 [11] 72 push hl
+ 001B CDr00r00 [17] 73 call _pio_write
+ 001E F1 [10] 74 pop af
+ 001F 33 [ 6] 75 inc sp
+ 0020 C1 [10] 76 pop bc
+ 0021 18 EF [12] 77 jr 00102$
+ 78 .area _CODE
+ 79 .area _INITIALIZER
+ 80 .area _CABS (ABS)
diff --git a/sw/z80/tests/pio/build/main.rel b/sw/z80/tests/pio/build/main.rel
new file mode 100644
index 0000000..bc2bd98
--- /dev/null
+++ b/sw/z80/tests/pio/build/main.rel
@@ -0,0 +1,29 @@
+XL2
+H 9 areas 4 global symbols
+M main
+O -mz80
+S _pio_set_mode Ref0000
+S .__.ABS. Def0000
+S _pio_write Ref0000
+A _CODE size 23 flags 0 addr 0
+S _main Def0000
+A _DATA size 0 flags 0 addr 0
+A _INITIALIZED size 0 flags 0 addr 0
+A _DABS size 0 flags 8 addr 0
+A _HOME size 0 flags 0 addr 0
+A _GSINIT size 0 flags 0 addr 0
+A _GSFINAL size 0 flags 0 addr 0
+A _INITIALIZER size 0 flags 0 addr 0
+A _CABS size 0 flags 8 addr 0
+T 00 00
+R 00 00 00 00
+T 00 00 AF F5 33 21 01 00 E5 2E 00 E5 CD 00 00 F1
+R 00 00 00 00 02 0D 00 00
+T 0E 00 F1 33 0E 00
+R 00 00 00 00
+T 12 00
+R 00 00 00 00
+T 12 00 41 0C C5 C5 33 21 00 00 E5 CD 00 00 F1 33
+R 00 00 00 00 02 0C 02 00
+T 20 00 C1 18 EF
+R 00 00 00 00
diff --git a/sw/z80_tests/usart/build/main.sym b/sw/z80/tests/pio/build/main.sym
index df02e0d..08d28a3 100644
--- a/sw/z80_tests/usart/build/main.sym
+++ b/sw/z80/tests/pio/build/main.sym
@@ -7,18 +7,17 @@ Symbol Table
.__.ABS. = 0000 G
.__.CPU. = 0000 L
.__.H$L. = 0000 L
- 0 ___str_0 002E R
- 0 ___str_1 003D R
0 _main 0000 GR
- _usart_init **** GX
- _usart_write **** GX
+ _pio_set_mode **** GX
+ _pio_write **** GX
+
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Zilog Z80 / Hitachi HD64180), page 2.
Hexadecimal [16-Bits]
Area Table
- 0 _CODE size 43 flags 0
+ 0 _CODE size 23 flags 0
1 _DATA size 0 flags 0
2 _INITIALIZED size 0 flags 0
3 _DABS size 0 flags 8
diff --git a/sw/z80_tests/usart/build/sample.lk b/sw/z80/tests/pio/build/pio_test.lk
index dc99ff1..20c32cc 100644
--- a/sw/z80_tests/usart/build/sample.lk
+++ b/sw/z80/tests/pio/build/pio_test.lk
@@ -1,12 +1,13 @@
-mjwx
--i build/sample.hex
+-i build/pio_test.hex
-b _CODE = 0x0800
-b _DATA = 0x2000
+-k ../../drivers/build/
-k /usr/libexec/../share/sdcc/lib/z80
-k /usr/share/sdcc/lib/z80
+-l drivers.a
-l z80
build/crt0.rel
build/main.rel
-build/usart.rel
-e
diff --git a/sw/z80_tests/usart/build/sample.map b/sw/z80/tests/pio/build/pio_test.map
index e812f09..e91ef69 100644
--- a/sw/z80_tests/usart/build/sample.map
+++ b/sw/z80/tests/pio/build/pio_test.map
@@ -7,7 +7,7 @@ Area Addr Size Decimal Bytes (A
Value Global Global Defined In Module
----- -------------------------------- ------------------------
- 00000000 .__.ABS. usart
+ 00000000 .__.ABS. pio
00000000 l__BSEG
00000000 l__BSS
00000000 l__CABS
@@ -36,44 +36,41 @@ Area Addr Size Decimal Bytes (A
00000002 l__HEADER5
00000002 l__HEADER6
00000002 l__HEADER7
- 00000002 l__INITIALIZED
- 00000002 l__INITIALIZER
00000003 l__HEADER0
+ 00000004 l__INITIALIZED
+ 00000004 l__INITIALIZER
00000006 l__GSINIT
0000000C l__HEADER8
- 00000264 l__CODE
+ 000000FD l__CODE
00000800 s__CODE
- 00000A64 s__HOME
- 00000A64 s__INITIALIZER
- 00000A66 s__GSINIT
- 00000A6C s__GSFINAL
+ 000008FD s__HOME
+ 000008FD s__INITIALIZER
+ 00000901 s__GSINIT
+ 00000907 s__GSFINAL
00002000 s__DATA
00002000 s__INITIALIZED
- 00002002 s__BSEG
- 00002002 s__BSS
- 00002002 s__HEAP
+ 00002004 s__BSEG
+ 00002004 s__BSS
+ 00002004 s__HEAP
ASxxxx Linker V03.00 + NoICE + sdld, page 2.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
-_CODE 00000800 00000264 = 612. bytes (REL,CON)
+_CODE 00000800 000000FD = 253. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
00000800 __clock crt0
00000804 _exit crt0
0000080A _main main
- 0000084D _usart_set_baudrate usart
- 00000881 _usart_set_parity usart
- 000008D5 _usart_set_stop_bits usart
- 00000902 _usart_word_length usart
- 0000091B _usart_set_autoflow usart
- 00000955 _usart_init usart
- 0000097E _usart_transmit usart
- 00000999 _usart_receive usart
- 0000099E _usart_write usart
- 000009E5 _usart_read usart
+ 0000082D __pio_data pio
+ 00000847 __pio_control pio
+ 00000861 _pio_set_mode pio
+ 0000089D _pio_set_interrupts pio
+ 000008B0 _pio_set_interrupts_mask pio
+ 000008D7 _pio_read pio
+ 000008ED _pio_write pio
ASxxxx Linker V03.00 + NoICE + sdld, page 3.
Hexadecimal [32-Bits]
@@ -161,7 +158,7 @@ Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
-_INITIALIZER 00000A64 00000002 = 2. bytes (REL,CON)
+_INITIALIZER 000008FD 00000004 = 4. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
@@ -170,18 +167,18 @@ Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
-_GSINIT 00000A66 00000006 = 6. bytes (REL,CON)
+_GSINIT 00000901 00000006 = 6. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
- 00000A66 gsinit crt0
+ 00000901 gsinit crt0
ASxxxx Linker V03.00 + NoICE + sdld, page 14.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
-_GSFINAL 00000A6C 00000001 = 1. bytes (REL,CON)
+_GSFINAL 00000907 00000001 = 1. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
@@ -190,7 +187,7 @@ Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
-_INITIALIZED 00002000 00000002 = 2. bytes (REL,CON)
+_INITIALIZED 00002000 00000004 = 4. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
@@ -200,7 +197,11 @@ Files Linked [ module(s) ]
build/crt0.rel [ crt0 ]
build/main.rel [ main ]
-build/usart.rel [ usart ]
+
+
+Libraries Linked [ object file ]
+
+../../drivers/build/drivers.a [ pio.rel ]
ASxxxx Linker V03.00 + NoICE + sdld, page 17.
diff --git a/sw/z80_tests/usart/build/sample.noi b/sw/z80/tests/pio/build/pio_test.noi
index 6d97288..3ddefe7 100644
--- a/sw/z80_tests/usart/build/sample.noi
+++ b/sw/z80/tests/pio/build/pio_test.noi
@@ -27,34 +27,31 @@ DEF l__HEADER4 0x2
DEF l__HEADER5 0x2
DEF l__HEADER6 0x2
DEF l__HEADER7 0x2
-DEF l__INITIALIZED 0x2
-DEF l__INITIALIZER 0x2
DEF l__HEADER0 0x3
+DEF l__INITIALIZED 0x4
+DEF l__INITIALIZER 0x4
DEF l__GSINIT 0x6
DEF l__HEADER8 0xC
-DEF l__CODE 0x264
+DEF l__CODE 0xFD
DEF s__CODE 0x800
-DEF s__HOME 0xA64
-DEF s__INITIALIZER 0xA64
-DEF s__GSINIT 0xA66
-DEF s__GSFINAL 0xA6C
+DEF s__HOME 0x8FD
+DEF s__INITIALIZER 0x8FD
+DEF s__GSINIT 0x901
+DEF s__GSFINAL 0x907
DEF s__DATA 0x2000
DEF s__INITIALIZED 0x2000
-DEF s__BSEG 0x2002
-DEF s__BSS 0x2002
-DEF s__HEAP 0x2002
+DEF s__BSEG 0x2004
+DEF s__BSS 0x2004
+DEF s__HEAP 0x2004
DEF __clock 0x800
DEF _exit 0x804
DEF _main 0x80A
-DEF _usart_set_baudrate 0x84D
-DEF _usart_set_parity 0x881
-DEF _usart_set_stop_bits 0x8D5
-DEF _usart_word_length 0x902
-DEF _usart_set_autoflow 0x91B
-DEF _usart_init 0x955
-DEF _usart_transmit 0x97E
-DEF _usart_receive 0x999
-DEF _usart_write 0x99E
-DEF _usart_read 0x9E5
-DEF gsinit 0xA66
-LOAD build/sample.ihx
+DEF __pio_data 0x82D
+DEF __pio_control 0x847
+DEF _pio_set_mode 0x861
+DEF _pio_set_interrupts 0x89D
+DEF _pio_set_interrupts_mask 0x8B0
+DEF _pio_read 0x8D7
+DEF _pio_write 0x8ED
+DEF gsinit 0x901
+LOAD build/pio_test.ihx
diff --git a/sw/z80_tests/usart/crt0.s b/sw/z80/tests/pio/crt0.s
index c272f06..c272f06 100644
--- a/sw/z80_tests/usart/crt0.s
+++ b/sw/z80/tests/pio/crt0.s
diff --git a/sw/z80/tests/pio/main.c b/sw/z80/tests/pio/main.c
new file mode 100644
index 0000000..4b0bcdb
--- /dev/null
+++ b/sw/z80/tests/pio/main.c
@@ -0,0 +1,12 @@
+#include "pio.h"
+
+void main(void)
+{
+ uint8_t j = 0;
+
+ pio_set_mode(PIO_A, PIO_MODE_BYTE_OUT, 0);
+
+ while (1) {
+ pio_write(PIO_A, j++);
+ }
+}
diff --git a/sw/z80_tests/usart/makefile b/sw/z80/tests/pio/makefile
index 080f41c..bd9d5bf 100644
--- a/sw/z80_tests/usart/makefile
+++ b/sw/z80/tests/pio/makefile
@@ -1,13 +1,13 @@
####
# source code settings
#
-OSNAME := sample
+NAME := pio_test
-CSOURCES := $(wildcard *.c)
+CSOURCES := $(wildcard *.c)
OBJECTS := $(patsubst %.c,build/%.rel,$(CSOURCES))
-HEXFILE := build/$(OSNAME).hex
-BINARY := build/$(OSNAME).bin
+HEXFILE := build/$(NAME).hex
+BINARY := build/$(NAME).bin
###
# compiler settings
@@ -15,12 +15,18 @@ BINARY := build/$(OSNAME).bin
CC := sdcc
CFLAGS := -mz80 \
+ -pedantic \
-I . \
+ -I ../../arch \
+ -I ../../drivers/include \
-DDEBUG
-LDFLAGS := -mz80 --no-std-crt0 build/crt0.rel \
- --std-c89 -pedantic \
- --code-loc 0x0800 --data-loc 0x2000
+LDFLAGS := -mz80 \
+ -L ../../drivers/build/ \
+ -l drivers.a \
+ --no-std-crt0 build/crt0.rel \
+ --code-loc 0x0800 \
+ --data-loc 0x2000
.PHONY: dirs dis clean
all: $(BINARY)
@@ -28,8 +34,6 @@ all: $(BINARY)
# build binary
$(BINARY): $(OBJECTS) dirs
$(CC) $(LDFLAGS) $(OBJECTS) -o $(HEXFILE)
- @# xxd -r -p $(HEXFILE) $(BINARY)
- @# makebin -s 16384 $(HEXFILE) $(BINARY)
makebin -s 8192 $(HEXFILE) $(BINARY)
$(OBJECTS): build/%.rel : %.c $(CSOURCES) dirs build/crt0.rel
diff --git a/sw/z80_tests/ram/build/crt0.rel b/sw/z80/tests/ram/build/crt0.rel
index cce6a25..b9ed132 100644
--- a/sw/z80_tests/ram/build/crt0.rel
+++ b/sw/z80/tests/ram/build/crt0.rel
@@ -1,5 +1,5 @@
XL2
-H 14 areas 3 global symbols
+H 15 areas 3 global symbols
M crt0
S _main Ref0000
S .__.ABS. Def0000
@@ -14,7 +14,8 @@ A _HEADER4 size 2 flags 8 addr 20
A _HEADER5 size 2 flags 8 addr 28
A _HEADER6 size 2 flags 8 addr 30
A _HEADER7 size 2 flags 8 addr 38
-A _HEADER8 size 9 flags 8 addr 100
+A _HEADER8 size 2 flags 8 addr 66
+A _HEADER9 size 9 flags 8 addr 100
A _HOME size 0 flags 0 addr 0
A _INITIALIZER size 0 flags 0 addr 0
A _GSINIT size 0 flags 0 addr 0
@@ -27,7 +28,7 @@ A _HEAP size 0 flags 0 addr 0
T 00 00
R 00 00 02 00
T 00 00 C3 00 01
-R 00 00 02 00 00 03 0A 00
+R 00 00 02 00 00 03 0B 00
T 08 00
R 00 00 03 00
T 08 00 ED 4D
@@ -56,12 +57,16 @@ T 38 00
R 00 00 09 00
T 38 00 ED 4D
R 00 00 09 00
-T 00 01
+T 66 00
R 00 00 0A 00
-T 00 01
+T 66 00 ED 4D
R 00 00 0A 00
+T 00 01
+R 00 00 0B 00
+T 00 01
+R 00 00 0B 00
T 00 01 31 FF FF CD 00 00 C3 00 00
-R 00 00 0A 00 02 06 00 00 00 09 00 00
+R 00 00 0B 00 02 06 00 00 00 09 00 00
T 00 00
R 00 00 00 00
T 00 00
diff --git a/sw/z80_tests/ram/build/main.asm b/sw/z80/tests/ram/build/main.asm
index f3b8add..f3b8add 100644
--- a/sw/z80_tests/ram/build/main.asm
+++ b/sw/z80/tests/ram/build/main.asm
diff --git a/sw/z80_tests/ram/build/main.lst b/sw/z80/tests/ram/build/main.lst
index 17142d4..17142d4 100644
--- a/sw/z80_tests/ram/build/main.lst
+++ b/sw/z80/tests/ram/build/main.lst
diff --git a/sw/z80_tests/ram/build/main.rel b/sw/z80/tests/ram/build/main.rel
index cad7a3c..cad7a3c 100644
--- a/sw/z80_tests/ram/build/main.rel
+++ b/sw/z80/tests/ram/build/main.rel
diff --git a/sw/z80_tests/ram/build/main.sym b/sw/z80/tests/ram/build/main.sym
index d81bdc8..d81bdc8 100644
--- a/sw/z80_tests/ram/build/main.sym
+++ b/sw/z80/tests/ram/build/main.sym
diff --git a/sw/z80/tests/ram/build/ram_test.lk b/sw/z80/tests/ram/build/ram_test.lk
new file mode 100644
index 0000000..724eb89
--- /dev/null
+++ b/sw/z80/tests/ram/build/ram_test.lk
@@ -0,0 +1,11 @@
+-mjwx
+-i build/ram_test.hex
+-b _CODE = 0x0000
+-b _DATA = 0x2000
+-k /usr/libexec/../share/sdcc/lib/z80
+-k /usr/share/sdcc/lib/z80
+-l z80
+build/crt0.rel
+build/main.rel
+
+-e
diff --git a/sw/z80/tests/ram/build/ram_test.map b/sw/z80/tests/ram/build/ram_test.map
new file mode 100644
index 0000000..0d36247
--- /dev/null
+++ b/sw/z80/tests/ram/build/ram_test.map
@@ -0,0 +1,174 @@
+ ASxxxx Linker V03.00 + NoICE + sdld, page 1.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+. .ABS. 00000000 00000000 = 0. bytes (ABS,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ 00000000 .__.ABS. main
+ 00000000 l__BSEG
+ 00000000 l__BSS
+ 00000000 l__CABS
+ 00000000 l__DABS
+ 00000000 l__DATA
+ 00000000 l__GSFINAL
+ 00000000 l__GSINIT
+ 00000000 l__HEADER
+ 00000000 l__HEAP
+ 00000000 l__HOME
+ 00000000 l__INITIALIZED
+ 00000000 l__INITIALIZER
+ 00000000 s__CABS
+ 00000000 s__CODE
+ 00000000 s__DABS
+ 00000000 s__HEADER
+ 00000000 s__HEADER0
+ 00000000 s__HEADER1
+ 00000000 s__HEADER2
+ 00000000 s__HEADER3
+ 00000000 s__HEADER4
+ 00000000 s__HEADER5
+ 00000000 s__HEADER6
+ 00000000 s__HEADER7
+ 00000000 s__HEADER8
+ 00000000 s__HEADER9
+ 00000002 l__HEADER1
+ 00000002 l__HEADER2
+ 00000002 l__HEADER3
+ 00000002 l__HEADER4
+ 00000002 l__HEADER5
+ 00000002 l__HEADER6
+ 00000002 l__HEADER7
+ 00000002 l__HEADER8
+ 00000003 l__HEADER0
+ 00000009 l__HEADER9
+ 0000000D l__CODE
+ 0000000D s__GSFINAL
+ 0000000D s__GSINIT
+ 0000000D s__HOME
+ 0000000D s__INITIALIZER
+ 00002000 s__BSEG
+ 00002000 s__BSS
+ 00002000 s__DATA
+ 00002000 s__HEAP
+ 00002000 s__INITIALIZED
+
+ ASxxxx Linker V03.00 + NoICE + sdld, page 2.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+_CODE 00000000 0000000D = 13. bytes (REL,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ 00000000 _exit crt0
+ 00000003 _main main
+
+ ASxxxx Linker V03.00 + NoICE + sdld, page 3.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+_HEADER0 00000000 00000003 = 3. bytes (ABS,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ ASxxxx Linker V03.00 + NoICE + sdld, page 4.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+_HEADER1 00000000 00000002 = 2. bytes (ABS,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ ASxxxx Linker V03.00 + NoICE + sdld, page 5.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+_HEADER2 00000000 00000002 = 2. bytes (ABS,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ ASxxxx Linker V03.00 + NoICE + sdld, page 6.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+_HEADER3 00000000 00000002 = 2. bytes (ABS,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ ASxxxx Linker V03.00 + NoICE + sdld, page 7.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+_HEADER4 00000000 00000002 = 2. bytes (ABS,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ ASxxxx Linker V03.00 + NoICE + sdld, page 8.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+_HEADER5 00000000 00000002 = 2. bytes (ABS,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ ASxxxx Linker V03.00 + NoICE + sdld, page 9.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+_HEADER6 00000000 00000002 = 2. bytes (ABS,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ ASxxxx Linker V03.00 + NoICE + sdld, page 10.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+_HEADER7 00000000 00000002 = 2. bytes (ABS,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ ASxxxx Linker V03.00 + NoICE + sdld, page 11.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+_HEADER8 00000000 00000002 = 2. bytes (ABS,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ ASxxxx Linker V03.00 + NoICE + sdld, page 12.
+Hexadecimal [32-Bits]
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+_HEADER9 00000000 00000009 = 9. bytes (ABS,CON)
+
+ Value Global Global Defined In Module
+ ----- -------------------------------- ------------------------
+ ASxxxx Linker V03.00 + NoICE + sdld, page 13.
+
+Files Linked [ module(s) ]
+
+build/crt0.rel [ crt0 ]
+build/main.rel [ main ]
+
+ ASxxxx Linker V03.00 + NoICE + sdld, page 14.
+
+User Base Address Definitions
+
+_CODE = 0x0000
+_DATA = 0x2000
+
+ \ No newline at end of file
diff --git a/sw/z80/tests/ram/build/ram_test.noi b/sw/z80/tests/ram/build/ram_test.noi
new file mode 100644
index 0000000..94266c5
--- /dev/null
+++ b/sw/z80/tests/ram/build/ram_test.noi
@@ -0,0 +1,50 @@
+DEF .__.ABS. 0x0
+DEF l__BSEG 0x0
+DEF l__BSS 0x0
+DEF l__CABS 0x0
+DEF l__DABS 0x0
+DEF l__DATA 0x0
+DEF l__GSFINAL 0x0
+DEF l__GSINIT 0x0
+DEF l__HEADER 0x0
+DEF l__HEAP 0x0
+DEF l__HOME 0x0
+DEF l__INITIALIZED 0x0
+DEF l__INITIALIZER 0x0
+DEF s__CABS 0x0
+DEF s__CODE 0x0
+DEF s__DABS 0x0
+DEF s__HEADER 0x0
+DEF s__HEADER0 0x0
+DEF s__HEADER1 0x0
+DEF s__HEADER2 0x0
+DEF s__HEADER3 0x0
+DEF s__HEADER4 0x0
+DEF s__HEADER5 0x0
+DEF s__HEADER6 0x0
+DEF s__HEADER7 0x0
+DEF s__HEADER8 0x0
+DEF s__HEADER9 0x0
+DEF l__HEADER1 0x2
+DEF l__HEADER2 0x2
+DEF l__HEADER3 0x2
+DEF l__HEADER4 0x2
+DEF l__HEADER5 0x2
+DEF l__HEADER6 0x2
+DEF l__HEADER7 0x2
+DEF l__HEADER8 0x2
+DEF l__HEADER0 0x3
+DEF l__HEADER9 0x9
+DEF l__CODE 0xD
+DEF s__GSFINAL 0xD
+DEF s__GSINIT 0xD
+DEF s__HOME 0xD
+DEF s__INITIALIZER 0xD
+DEF s__BSEG 0x2000
+DEF s__BSS 0x2000
+DEF s__DATA 0x2000
+DEF s__HEAP 0x2000
+DEF s__INITIALIZED 0x2000
+DEF _exit 0x0
+DEF _main 0x3
+LOAD build/ram_test.ihx
diff --git a/sw/z80_tests/ram/build/test.lk b/sw/z80/tests/ram/build/test.lk
index 03a8db4..03a8db4 100644
--- a/sw/z80_tests/ram/build/test.lk
+++ b/sw/z80/tests/ram/build/test.lk
diff --git a/sw/z80_tests/ram/build/test.map b/sw/z80/tests/ram/build/test.map
index 07b953f..07b953f 100644
--- a/sw/z80_tests/ram/build/test.map
+++ b/sw/z80/tests/ram/build/test.map
diff --git a/sw/z80_tests/ram/build/test.noi b/sw/z80/tests/ram/build/test.noi
index 403beda..403beda 100644
--- a/sw/z80_tests/ram/build/test.noi
+++ b/sw/z80/tests/ram/build/test.noi
diff --git a/sw/z80_tests/ram/build/test.z80 b/sw/z80/tests/ram/build/test.z80
index 25a162a..25a162a 100644
--- a/sw/z80_tests/ram/build/test.z80
+++ b/sw/z80/tests/ram/build/test.z80
diff --git a/sw/z80_tests/ram/crt0.s b/sw/z80/tests/ram/crt0.s
index ac0698f..d775e66 100644
--- a/sw/z80_tests/ram/crt0.s
+++ b/sw/z80/tests/ram/crt0.s
@@ -21,7 +21,6 @@
.org 0x38
reti
.org 0x66
- ld hl,#BEEF
reti
.org 0x100
diff --git a/sw/z80_tests/ram/main.c b/sw/z80/tests/ram/main.c
index 581072b..581072b 100644
--- a/sw/z80_tests/ram/main.c
+++ b/sw/z80/tests/ram/main.c
diff --git a/sw/z80_tests/ram/makefile b/sw/z80/tests/ram/makefile
index 35d7419..b8435a7 100644
--- a/sw/z80_tests/ram/makefile
+++ b/sw/z80/tests/ram/makefile
@@ -1,7 +1,7 @@
####
# source code settings
#
-OSNAME := test
+OSNAME := ram_test
CSOURCES := $(wildcard *.c)