summaryrefslogtreecommitdiffstats
path: root/sw/z80
diff options
context:
space:
mode:
Diffstat (limited to 'sw/z80')
-rw-r--r--sw/z80/arch/include/addresses.h4
-rw-r--r--sw/z80/drivers/include/pio.h8
-rw-r--r--sw/z80/tests/pio/main.c14
3 files changed, 15 insertions, 11 deletions
diff --git a/sw/z80/arch/include/addresses.h b/sw/z80/arch/include/addresses.h
index ec5eb96..32f1997 100644
--- a/sw/z80/arch/include/addresses.h
+++ b/sw/z80/arch/include/addresses.h
@@ -5,8 +5,8 @@
#define ADDR_DEV_ROM_H 0x2000
#define ADDR_DEV_PIO 0x0010
-#define ADDR_DEV_CTC 0x4100
-#define ADDR_DEV_USART 0x4200
+#define ADDR_DEV_CTC 0x0020
+#define ADDR_DEV_USART 0x0030
#define ADDR_DEV_MMU
diff --git a/sw/z80/drivers/include/pio.h b/sw/z80/drivers/include/pio.h
index e234b05..ee968d7 100644
--- a/sw/z80/drivers/include/pio.h
+++ b/sw/z80/drivers/include/pio.h
@@ -15,10 +15,10 @@
#define PIO_REG_DATA 0
#define PIO_REG_CTRL 2
-#define PIO_REG_DATA_A (PIO_A | PIO_REG_PORT)
-#define PIO_REG_DATA_B 1 (PIO_B | PIO_REG_PORT)
-#define PIO_REG_CTRL_A 2 (PIO_A | PIO_REG_CTRL)
-#define PIO_REG_CTRL_B 3 (PIO_B | PIO_REG_CTRL)
+#define PIO_REG_DATA_A 0 // (PIO_A | PIO_REG_PORT)
+#define PIO_REG_DATA_B 1 // (PIO_B | PIO_REG_PORT)
+#define PIO_REG_CTRL_A 2 // (PIO_A | PIO_REG_CTRL)
+#define PIO_REG_CTRL_B 3 // (PIO_B | PIO_REG_CTRL)
#define PIO_MODE_BYTE_OUT 0 // mode 0
#define PIO_MODE_BYTE_IN 1 // mode 1
diff --git a/sw/z80/tests/pio/main.c b/sw/z80/tests/pio/main.c
index 3687f50..7ac64bc 100644
--- a/sw/z80/tests/pio/main.c
+++ b/sw/z80/tests/pio/main.c
@@ -3,8 +3,8 @@
#include <stdint.h>
#define PIO_A_DATA 0x10
-#define PIO_A_CMD 0x11
-#define PIO_B_DATA 0x12
+#define PIO_B_DATA 0x11
+#define PIO_A_CMD 0x12
#define PIO_B_CMD 0x13
void main(void)
@@ -14,21 +14,25 @@ void main(void)
ld h, #0x00
;; set bit mode
- ld a, #0xCF
- ;; load cmd addr
ld c, #PIO_B_CMD
+
+ ld a, #0xCF
out (c), a
- ;; set output
+
+ ;; set all pins to output
ld a, #0x00
out (c), a
+
;; disable interrupts
ld a, #0x0C
out (c), a
+
;; load data addr
ld c, #PIO_B_DATA
loop:
out (c), h
ld a, h
+
cpl
ld h, a
jr loop