summaryrefslogtreecommitdiffstats
path: root/sw/z80_test
diff options
context:
space:
mode:
Diffstat (limited to 'sw/z80_test')
-rw-r--r--sw/z80_test/crt0.s103
-rw-r--r--sw/z80_test/ctc.c7
-rw-r--r--sw/z80_test/ctc.h6
-rw-r--r--sw/z80_test/devices.h15
-rw-r--r--sw/z80_test/main.c11
-rw-r--r--sw/z80_test/makefile52
-rw-r--r--sw/z80_test/pio.c40
-rw-r--r--sw/z80_test/pio.h37
-rw-r--r--sw/z80_test/types.h13
-rw-r--r--sw/z80_test/usart.c91
-rw-r--r--sw/z80_test/usart.h155
11 files changed, 530 insertions, 0 deletions
diff --git a/sw/z80_test/crt0.s b/sw/z80_test/crt0.s
new file mode 100644
index 0000000..7701ca6
--- /dev/null
+++ b/sw/z80_test/crt0.s
@@ -0,0 +1,103 @@
+;--------------------------------------------------------------------------
+; crt0.s - Generic crt0.s for a Z80
+;
+; Copyright (C) 2000, Michael Hope
+;
+; This library is free software; you can redistribute it and/or modify it
+; under the terms of the GNU General Public License as published by the
+; Free Software Foundation; either version 2, or (at your option) any
+; later version.
+;
+; This library is distributed in the hope that it will be useful,
+; but WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+; GNU General Public License for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with this library; see the file COPYING. If not, write to the
+; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
+; MA 02110-1301, USA.
+;
+; As a special exception, if you link this library with other files,
+; some of which are compiled with SDCC, to produce an executable,
+; this library does not by itself cause the resulting executable to
+; be covered by the GNU General Public License. This exception does
+; not however invalidate any other reasons why the executable file
+; might be covered by the GNU General Public License.
+;--------------------------------------------------------------------------
+
+ .module crt0
+ .globl _main
+
+ .area _HEADER (ABS)
+ ;; Reset vector
+ .org 0
+ jp init
+
+ .org 0x08
+ reti
+ .org 0x10
+ reti
+ .org 0x18
+ reti
+ .org 0x20
+ reti
+ .org 0x28
+ reti
+ .org 0x30
+ reti
+ .org 0x38
+ reti
+
+ .org 0x100
+init:
+ ;; Set stack pointer directly above top of memory.
+ ld sp,#0xFFFF
+
+ ;; Initialise global variables
+ call gsinit
+ call _main
+ jp _exit
+
+ ;; Ordering of segments for the linker.
+ .area _HOME
+ .area _CODE
+ .area _INITIALIZER
+ .area _GSINIT
+ .area _GSFINAL
+
+ .area _DATA
+ .area _INITIALIZED
+ .area _BSEG
+ .area _BSS
+ .area _HEAP
+
+ .area _CODE
+
+__clock::
+ ld a,#2
+ rst 0x08
+ ret
+
+_exit::
+ ;; Exit - special code to the emulator
+ ld a,#0
+ rst 0x08
+1$:
+ halt
+ jr 1$
+
+ .area _GSINIT
+gsinit::
+ ; ld bc, #l__INITIALIZER
+ ld a, b
+ or a, c
+ jr Z, gsinit_next
+ ; ld de, #s__INITIALIZED
+ ; ld hl, #s__INITIALIZER
+ ldir
+gsinit_next:
+
+ .area _GSFINAL
+ ret
+
diff --git a/sw/z80_test/ctc.c b/sw/z80_test/ctc.c
new file mode 100644
index 0000000..3a4e7d5
--- /dev/null
+++ b/sw/z80_test/ctc.c
@@ -0,0 +1,7 @@
+#include "ctc.h"
+
+void ctc_control()
+{
+
+}
+
diff --git a/sw/z80_test/ctc.h b/sw/z80_test/ctc.h
new file mode 100644
index 0000000..c6b3150
--- /dev/null
+++ b/sw/z80_test/ctc.h
@@ -0,0 +1,6 @@
+#ifndef __CTC_H__
+#define __CTC_H__
+
+void ctc_control();
+
+#endif /* __CTC_H__ */ \ No newline at end of file
diff --git a/sw/z80_test/devices.h b/sw/z80_test/devices.h
new file mode 100644
index 0000000..a846f9b
--- /dev/null
+++ b/sw/z80_test/devices.h
@@ -0,0 +1,15 @@
+#ifndef __DEVICES_H__
+#define __DEVICES_H__
+
+#define ADDR_DEV_ROM_L 0x0000
+#define ADDR_DEV_ROM_H 0x2000
+
+#define ADDR_DEV_USART 0x4000
+#define ADDR_DEV_CTC 0x4100
+#define ADDR_DEV_PIO 0x4200
+
+#define ADDR_DEV_MMU
+
+#define ADDR_DEV_RAM 0x8000
+
+#endif
diff --git a/sw/z80_test/main.c b/sw/z80_test/main.c
new file mode 100644
index 0000000..d2e1d8e
--- /dev/null
+++ b/sw/z80_test/main.c
@@ -0,0 +1,11 @@
+#include "usart.h"
+
+void main(void)
+{
+ usart_init(USART_BAUDRATE_1200, USART_PARITY_EVEN, USART_STOP_BITS_1);
+ usart_write("Hello, World!\n", 13);
+
+ while(1) {
+ usart_write("done\n", 5);
+ }
+}
diff --git a/sw/z80_test/makefile b/sw/z80_test/makefile
new file mode 100644
index 0000000..6f054ae
--- /dev/null
+++ b/sw/z80_test/makefile
@@ -0,0 +1,52 @@
+####
+# source code settings
+#
+OSNAME := sample
+
+CSOURCES := $(wildcard *.c)
+
+OBJECTS := $(patsubst %.c,build/%.rel,$(CSOURCES))
+HEXFILE := build/$(OSNAME).hex
+BINARY := build/$(OSNAME).bin
+
+###
+# compiler settings
+
+CC := sdcc
+
+CFLAGS := -mz80 \
+ -I . \
+ -DDEBUG
+
+LDFLAGS := -mz80 --no-std-crt0 build/crt0.rel \
+ --std-c89 -pedantic \
+ --code-loc 0x0800 --data-loc 0x2000
+
+.PHONY: dirs dis clean
+all: $(BINARY)
+
+# build binary
+$(BINARY): $(OBJECTS) dirs
+ $(CC) $(LDFLAGS) $(OBJECTS) -o $(HEXFILE)
+ @# xxd -r -p $(HEXFILE) $(BINARY)
+ @# makebin -s 16384 $(HEXFILE) $(BINARY)
+ makebin -s 8192 $(HEXFILE) $(BINARY)
+
+$(OBJECTS): build/%.rel : %.c $(CSOURCES) dirs build/crt0.rel
+ @printf "\n"
+ $(CC) $(CFLAGS) -c $< -o $@
+
+build/crt0.rel: crt0.s
+ sdasz80 -o $<
+ @mv crt0.rel build/
+
+dirs:
+ mkdir -p build
+
+dis: $(BINARY)
+ @# z80dasm -a -l -g 0h $< -o build/$(OSNAME).s
+ dz80 -b -n $<
+
+clean:
+ - rm -rd build/*
+ - rm crt0.rel
diff --git a/sw/z80_test/pio.c b/sw/z80_test/pio.c
new file mode 100644
index 0000000..5ca9149
--- /dev/null
+++ b/sw/z80_test/pio.c
@@ -0,0 +1,40 @@
+#include "pio.h"
+
+static uint8_t *pio_port = (uint8_t *) ADDR_DEV_PIO;
+static uint8_t *pio_ctrl = (uint8_t *) (ADDR_DEV_PIO + 2);
+
+inline void _pio_data(int port, uint8_t data)
+{
+ *(pio_port + port) = data;
+}
+
+inline void _pio_control(int port, uint8_t cmd)
+{
+ *(pio_ctrl + port) = cmd;
+}
+
+void pio_set_mode(int port, int mode, uint8_t io)
+{
+ // 0x0F is a control sequence to set mode
+ _pio_control(port, ((mode << 6) | 0x0F));
+
+ // this mode requires an additional argument that sets
+ // a mode for each pin
+ if (mode == PIO_MODE_BIT_IO) {
+ _pio_control(port, io);
+ }
+}
+
+void pio_set_interrupts(int port, int control)
+{
+ // 0x07 is a control sequence to set interrupts
+ _pio_control(port, (control | 0x07));
+}
+
+void pio_set_interrupts_mask(int port, int control, uint8_t mask)
+{
+ // 0x17 is a control sequence to set interrupts
+ // and to interpret the next byte as a mask
+ _pio_control(port, (control | 0x17));
+ _pio_control(port, mask);
+}
diff --git a/sw/z80_test/pio.h b/sw/z80_test/pio.h
new file mode 100644
index 0000000..0df2ed0
--- /dev/null
+++ b/sw/z80_test/pio.h
@@ -0,0 +1,37 @@
+#ifndef __PIO_H__
+#define __PIO_H__
+
+#include "devices.h"
+#include "types.h"
+
+#define PIO_A 0
+#define PIO_B 1
+
+#define PIO_MODE_BYTE_IN 0
+#define PIO_MODE_BYTE_OUT 1
+#define PIO_MODE_BYTE_BI 2
+#define PIO_MODE_BIT_IO 3
+
+#define PIO_INT_ACTIVE_HIGH (1<<5)
+#define PIO_INT_AND_MODE (1<<6)
+#define PIO_INT_ENABLE (1<<7)
+
+
+inline void _pio_data(int port, uint8_t data);
+inline void _pio_control(int port, uint8_t cmd);
+
+void pio_set_mode(int port, int mode, uint8_t io);
+
+void pio_set_interrupts(int port, int control);
+void pio_set_interrupts_mask(int port, int control, uint8_t mask);
+
+// uint8_t pio_read_data(int port);
+uint8_t pio_read(int port);
+void pio_write(int port, uint8_t data);
+
+inline int pio_read_pin(int port, uint8_t pin);
+inline void pio_write_pin(int port, uint8_t pin);
+
+// TODO: implement mode (in/out/both) and interrupt vector
+
+#endif // __PIO_H__
diff --git a/sw/z80_test/types.h b/sw/z80_test/types.h
new file mode 100644
index 0000000..815fc68
--- /dev/null
+++ b/sw/z80_test/types.h
@@ -0,0 +1,13 @@
+#ifndef __TYPES_H__
+#define __TYPES_H__
+
+/* only types from primitive types are defined in this file */
+
+typedef volatile unsigned char register_t;
+
+typedef unsigned int uint;
+typedef char int8_t;
+typedef unsigned char uint8_t;
+typedef int int16_t;
+typedef unsigned int uint16_t;
+#endif
diff --git a/sw/z80_test/usart.c b/sw/z80_test/usart.c
new file mode 100644
index 0000000..9ec6dbd
--- /dev/null
+++ b/sw/z80_test/usart.c
@@ -0,0 +1,91 @@
+#include "usart.h"
+
+static struct _usart_device *_usart = (struct _usart_device *) ADDR_DEV_USART;
+
+void usart_set_baudrate(uint16_t baudrate)
+{
+ // enable latch access
+ _usart->LCR.divisor_latch_access = 1;
+ _usart->buffer = 0x00FF & baudrate; // LSBs
+ memcpy(&_usart->IER, &(baudrate >>8), 1);
+ // _usart->IER = 0x00FF & (baudrate >> 8); // MSBs
+ _usart->LCR.divisor_latch_access = 0;
+}
+
+void usart_set_parity(int mode)
+{
+ if (mode == USART_PARITY_EVEN) {
+ _usart->LCR.even_parity = 1;
+ }
+ else if (mode == USART_PARITY_ODD) {
+ _usart->LCR.even_parity = 0;
+ }
+
+ _usart->LCR.parity = (mode == USART_PARITY_NONE) ? 0 : 1;
+}
+
+void usart_set_stop_bits(int count)
+{
+ _usart->LCR.stop_bits = (count == USART_STOP_BITS_1) ? 0 : 1;
+}
+
+void usart_word_length(int length)
+{
+ _usart->LCR.word_length = length;
+}
+
+void usart_set_autoflow(int mode)
+{
+ _usart->MCR.autoflow = (mode == USART_AUTOFLOW_OFF) ? 0 : 1;
+ _usart->MCR.data_terminal_ready = (mode == USART_AUTOFLOW_ALL);
+}
+
+inline void usart_init(uint16_t baudrate, int parity, int stop_bits)
+{
+ usart_set_baudrate(baudrate);
+ usart_set_parity(parity);
+ usart_set_stop_bits(stop_bits);
+ usart_set_autoflow(USART_AUTOFLOW_OFF);
+}
+
+void usart_transmit(uint8_t data)
+{
+ _usart->buffer = data;
+ while (_usart->LSR.transmitter_holder_empty == 0); // wait
+}
+
+uint8_t usart_receive()
+{
+ return _usart->buffer;
+}
+
+int usart_write(uint8_t *data, size_t size)
+{
+ uint8_t *dp = data;
+
+ while (size--) {
+ _usart->buffer = *(dp++);
+ while (_usart->LSR.transmitter_empty);
+ }
+
+ // TODO: do something that actually counts for sent bytes
+ return size;
+}
+
+int usart_read(uint8_t *buffer, size_t count)
+{
+ uint8_t *bp = buffer;
+ size_t read_count = 0;
+
+ while (count--) {
+ *(bp++) = _usart->buffer;
+ // check for errors
+ if (_usart->LSR.framing_error || _usart->LSR.parity_error) {
+ bp--; // delete last byte (?)
+ } else {
+ read_count++;
+ }
+ }
+
+ return read_count;
+}
diff --git a/sw/z80_test/usart.h b/sw/z80_test/usart.h
new file mode 100644
index 0000000..b85ee3e
--- /dev/null
+++ b/sw/z80_test/usart.h
@@ -0,0 +1,155 @@
+#ifndef __USART_H__
+#define __USART_H__
+
+#include "types.h"
+#include "devices.h"
+
+#include "string.h"
+
+// baudrate clock divisors
+// values from TL16C550C datasheet (table 9 for 1.8432 MHz crystal)
+#define USART_BAUDRATE_50 2304
+#define USART_BAUDRATE_75 1536
+#define USART_BAUDRATE_110 1047
+#define USART_BAUDRATE_134_5 857
+#define USART_BAUDRATE_150 768
+#define USART_BAUDRATE_300 384
+#define USART_BAUDRATE_600 192
+#define USART_BAUDRATE_1200 96
+#define USART_BAUDRATE_1800 64
+#define USART_BAUDRATE_2000 58
+#define USART_BAUDRATE_2400 48
+#define USART_BAUDRATE_3600 32
+#define USART_BAUDRATE_4800 24
+#define USART_BAUDRATE_7200 16
+#define USART_BAUDRATE_9600 12
+#define USART_BAUDRATE_19200 6
+#define USART_BAUDRATE_38400 3
+#define USART_BAUDRATE_56000 3
+
+// parity
+#define USART_PARITY_NONE 0
+#define USART_PARITY_EVEN 1
+#define USART_PARITY_ODD 2
+
+// stop bits
+#define USART_STOP_BITS_1 10
+#define USART_STOP_BITS_15 15
+#define USART_STOP_BITS_2 20
+
+// word lenght
+#define USART_WORD_LENGTH_5 0
+#define USART_WORD_LENGTH_6 1
+#define USART_WORD_LENGTH_7 2
+#define USART_WORD_LENGTH_8 3
+
+// autoflow
+#define USART_AUTOFLOW_ALL 3
+#define USART_AUTOFLOW_CTS 2
+#define USART_AUTOFLOW_OFF 0
+
+/* stuctures for usart registers */
+struct IER
+{
+ volatile uint received_data_interrupt :1;
+ volatile uint transmitter_empty_interrupt :1;
+ volatile uint receiver_line_status_interrupt :1;
+ volatile uint modem_status_interrupt :1;
+ volatile uint reserved :4;
+};
+
+struct IIR
+{
+ volatile uint interrupt_pending :1;
+ volatile uint interrupt_id :3;
+ volatile uint reserved :2;
+ volatile uint fifos :2;
+};
+
+struct FCR
+{
+ volatile uint fifo_enable :1;
+ volatile uint receiver_fifo_rst :1;
+ volatile uint trasmitter_fifo_rst :1;
+ volatile uint dma_mode_select :1;
+ volatile uint reserved :1;
+ volatile uint receiver_trigger :2;
+};
+
+struct LCR
+{
+ volatile uint word_length :2;
+ volatile uint stop_bits :1;
+ volatile uint parity :1;
+ volatile uint even_parity :1;
+ volatile uint stick_parity :1;
+ volatile uint break_control :1;
+ volatile uint divisor_latch_access :1;
+};
+
+struct MCR
+{
+ volatile uint data_terminal_ready :1;
+ volatile uint request_to_send :1;
+ volatile uint out1;
+ volatile uint out2;
+ volatile uint loop;
+ volatile uint autoflow :1;
+ volatile uint reserved :2;
+};
+
+struct LSR
+{
+ volatile uint data_ready :1;
+ volatile uint overrun_error :1;
+ volatile uint parity_error :1;
+ volatile uint framing_error :1;
+ volatile uint break_interrupt :1;
+ volatile uint transmitter_holder_empty :1;
+ volatile uint transmitter_empty :1;
+ volatile uint fifo_recv_error :1;
+};
+
+struct MSR
+{
+ volatile uint delta_cts :1;
+ volatile uint delta_data_set_ready :1;
+ volatile uint trailing_edge_ring_indicator :1;
+ volatile uint delta_data_carrier_detect :1;
+ volatile uint clear_to_send :1;
+ volatile uint data_set_ready :1;
+ volatile uint ring_indicator :1;
+ volatile uint data_carrier_detect :1;
+};
+
+/* this structure is only for internal usage */
+struct _usart_device
+{
+ register_t buffer; // also used as LSB for divisor latch
+ struct IER IER;
+ struct IIR IIR;
+ struct FCR FCR;
+ struct LCR LCR;
+ struct MCR MCR;
+ struct LSR LSR;
+ struct MSR MSR;
+ register_t scratch;
+};
+
+
+// setup functions (wrappers)
+void usart_set_baudrate(uint16_t baudrate);
+void usart_set_parity(int mode);
+void usart_set_stop_bits(int count);
+void usart_set_word_length(int length);
+void usart_set_autoflow(int mode);
+
+inline void usart_init(uint16_t baudrate, int parity, int stop_bits);
+
+void usart_transmit(uint8_t data);
+uint8_t usart_receive();
+
+int usart_write(uint8_t *data, size_t size);
+int usart_read(uint8_t *buffer, size_t count);
+
+#endif // __USART__H__