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* File system interfaceleleraffa97@hotmail.it2017-08-3113-90/+473
| | | | | Basic file system implementation Path resolution work in progress
* time to inodeleleraffa97@hotmail.it2017-08-261-0/+2
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* File system initializationleleraffa97@hotmail.it2017-08-2626-135/+1480
| | | | Simple I/O (sio) interfaced, not yet implemented
* Merge remote-tracking branch 'origin/naopross' into atlasleleraffa97@hotmail.it2017-08-2322-153/+644
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| * new programmer interface for linuxNao Pross2017-08-2312-99/+234
| | | | | | | | | | | | | | | | there is a new program with GUI (gtk3) to send data to its avr conterpart. it needs to be tested, since there may be a few bugs in it; building a GUI was a terrible idea.
| * updated .gitignoreNao Pross2017-08-081-27/+27
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| * implementation for avr programmerNao Pross2017-08-0717-0/+356
| | | | | | | | | | the programmer will receive the binary in blocks of defined size by a program under sw/programmer/linux (moved from sw/linux).
* | Filesystem struct orderleleraffa97@hotmail.it2017-08-232-22/+79
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* filesystem structure intro and docsNao Pross2017-08-0111-17/+20085
| | | | | | | | - new type pid_t and program management mechanism to make it easier to switch to a multitasking kernel - new memory related functions in memory.h to move, copy and manage pages - fix typos
* new structure for process management, structures to discussNao Pross2017-07-0426-969/+328
| | | | | | | | | | | | | | the idea behind kernel/include/progman.h was good but the implementation was very not unix-like, so I made a new file under kernel/include/process.h that will implement the same features other changes: - move usart register structs definitions outside of the device - remove old build files - delete boot.h and boot_loader.h (as they weren't used by anything) - change on makefile to build binary with `makebin` instead of `xxd` - new file memory.h to implement memory mapping and mmu control - new type `uint` in types.h
* merge branch 'atlas' into naoprossNao Pross2017-07-04538-70/+51243
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| * Order and update of the structleleraffa97@hotmail.it2017-06-2310-218/+260
| | | | | | | | | | Separation of boot and login sections Improuved program manager system
| * libc memset, memcmpHEADmasterleleraffa97@hotmail.it2017-06-195-24/+61
| | | | | | | | | | boot improved program allocation
| * Merge branch 'master' of github.com:NaoPross/z80uPC into atlasleleraffa97@hotmail.it2017-06-19543-174/+51138
| |\ | | | | | | | | | Serial updates from NaoPross
| | * merge branch 'naopross'Nao Pross2017-06-1647-430/+2291
| | |\ | | | | | | | | | | | | merge to get the new doc on master
| | * \ merge branch 'hardware'Nao Pross2017-06-10518-70/+49636
| | |\ \ | | | | | | | | | | | | | | | | | | | | this is probably the last merge from this branch since the board has been sent to print
| | | * | board complete, generate gerber (x2) fileshardwareNao Pross2017-05-2391-275/+35121
| | | | | | | | | | | | | | | | | | | | | | | | | this is probably the last commit before printing the PCB, unless there are some other errors in the board design
| | | * | finish wiring and add eurocard compliant standard holesNao Pross2017-05-19178-55/+790
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | since there wasn't enough space (I should have added the holes before beginning) there are only 4 holes instead of 6 (2 will be cut out since the space is unused).
| | | * | wiring for 7 segment displays and traces for the remaining CPU signalsNao Pross2017-05-1954-6/+56
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| | | * | new traces for cpu signals and for high address to the MMU / addr decoderNao Pross2017-05-1827-3/+3
| | | | | | | | | | | | | | | | | | | | there are also many other minor changes to connect various wires
| | | * | wiring for CTC (U8) to address bus and data busNao Pross2017-05-1817-3/+3
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| | | * | wiring for P4 and P5 (I/O ports) and circuits for CLKs and RSTNao Pross2017-05-186-3/+3
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| | | * | wires from DB-9 and HDR5x2 connector to MAX214 (U7) and crystal for TL16C550Nao Pross2017-05-1833-6/+6
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| | | * | created new layout (starting over)Nao Pross2017-05-0973-130/+1039
| | | | | | | | | | | | | | | | | | | | the old layout is still under hw/MainBoard1.PcbDoc
| | | * | complete wiring for serial interface connector and logicNao Pross2017-05-0597-15/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | other changes: - new layout, probably the board will have to be resized to a nonstandard size (currently 2EUROCARD) - new footprint HDR5x2_SOCKET for standard 5x2 flatcable connectors
| | | * | add switches datasheets for footprintsNao Pross2017-05-0515-17/+17
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| | | * | start printed circuit board designNao Pross2017-04-28158-31/+11374
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | wired: - clock circiuts - reset button set layout for: - CPU & memory - serial interface
| | | * | scheme update and PCB startNao Pross2017-04-1351-109/+1787
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add missing capacitor and resistor values (serial XTAL) create new eurocard standard compliant PCB for the uPC and other minor fixes
| * | | | Authentication sectionleleraffa97@hotmail.it2017-06-194-0/+80
| | | | | | | | | | | | | | | | | | | | Programs management
| * | | | Boot loader structures (WORK IN PROGRESS)leleraffa97@hotmail.it2017-06-154-0/+194
| | | | | | | | | | | | | | | | | | | | Some Program manager structures, macros and functions (WORK IN PROGRESS)
| * | | | Kernel memory mapping setupleleraffa97@hotmail.it2017-05-0412-7/+1254
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* | | | | new components list and cpld test unitNao Pross2017-06-1636-46/+773
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* | | | fixed typo in usart.h and in docNao Pross2017-06-164-1/+4
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* | | | new documentation in z80upc.pdfNao Pross2017-06-1512-96/+1022
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* | | | add port interface header, api still to implementNao Pross2017-06-103-25/+31
| | | | | | | | | | | | | | | | | | | | | | | | fix for bug in usart.c, in function usart_write() that checked the trasmission_empty register at the wrong time causing it to overwrite the buffer.
* | | | add serial interface and a few std library functionsNao Pross2017-06-0211-90/+336
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | changes in usart: - new functions to setup the serial comunication settings such as baudrate, parity and stop bits - init function with most common values - transmit and receive functions each with a wrapper to send data blocks changes in libc: - new file stdio.c with basic implementation of putch, printf still a prototype - new file string.c with memcpy() function
* | | | new file coding_rules.txt to have a consistent coding styleNao Pross2017-05-031-0/+120
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* | | | add serial device structNao Pross2017-05-026-14/+104
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | other changes: - change from main() to kmain() in crt0.s and kernel.c - new file devices.h to define all address locations for devices - new data type - register_t as volatile uint8_t for registers in devices - size_t from libc
* | | | Merge branch 'atlas' into naoprossNao Pross2017-05-021-0/+55
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| * | | sysio.h libc interfaceleleraffa97@hotmail.it2017-05-021-0/+0
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| * | | Merge remote-tracking branch 'origin/naopross' into atlasleleraffa97@hotmail.it2017-05-02171-495/+987
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* | | | fix for sdcc makefileNao Pross2017-05-024-32/+122
| | | | | | | | | | | | | | | | | | | | | | | | fix for the old makefile, because it could't compile more than one source file. new libc directory with mem.c to start implementing the standard C library (or at least the part we need).
* | | | Merge branch 'master' into naoprossNao Pross2017-05-02150-199/+276
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| * | | switch to sdccNao Pross2017-05-029-101/+62
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | - update of the makefile to use sdcc, since it is more popular and it's easier to insall on other computers - fix of crt0.s (old loader.asm) for the new compiler - change of the structure in the source code folder to separate betweeen libc and kernel code
| * | Merge branch 'master' of https://github.com/NaoPross/z80uPCNao Pross2017-04-048-27/+159
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| * | | schematic completeNao Pross2017-04-04131-98/+214
| | | | | | | | | | | | | | | | | | | | | | | | hw: change address decoder chip from GAL16V8 to M4-32/32 (CPLD) change main bus connector with a custom one (intead of PC/104) start building footprint library
| * | | added iospace address decoderNao Pross2017-03-3117-12/+12
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* | | | switch from GAL (pld) to M4 32/32 CPLDNao Pross2017-04-1320-296/+621
| | | | | | | | | | | | | | | | | | | | | | | | add M4 32/32 CPLD datasheet new VHDL code with better control over the address space thanks to the M4 which has a 16 bit input port
* | | | Merge branch 'master' into naoprossNao Pross2017-03-251-0/+7
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| * | | added missing makefile for z80 and fixed gitignoreNao Pross2017-03-252-27/+54
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