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* Move sw to sw-old and hw to hw-altium, add kicad filesNao Pross2018-10-301-14/+0
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* board complete, generate gerber (x2) fileshardwareNao Pross2017-05-231-3/+3
| | | | | this is probably the last commit before printing the PCB, unless there are some other errors in the board design
* wiring for 7 segment displays and traces for the remaining CPU signalsNao Pross2017-05-191-3/+3
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* created new layout (starting over)Nao Pross2017-05-091-3/+3
| | | | the old layout is still under hw/MainBoard1.PcbDoc
* complete wiring for serial interface connector and logicNao Pross2017-05-051-3/+3
| | | | | | | other changes: - new layout, probably the board will have to be resized to a nonstandard size (currently 2EUROCARD) - new footprint HDR5x2_SOCKET for standard 5x2 flatcable connectors
* add switches datasheets for footprintsNao Pross2017-05-051-3/+3
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* start printed circuit board designNao Pross2017-04-281-3/+3
| | | | | | | | | wired: - clock circiuts - reset button set layout for: - CPU & memory - serial interface
* scheme update and PCB startNao Pross2017-04-131-3/+3
| | | | | | add missing capacitor and resistor values (serial XTAL) create new eurocard standard compliant PCB for the uPC and other minor fixes
* schematic completeNao Pross2017-04-041-3/+3
| | | | | | hw: change address decoder chip from GAL16V8 to M4-32/32 (CPLD) change main bus connector with a custom one (intead of PC/104) start building footprint library
* added iospace address decoderNao Pross2017-03-311-3/+3
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* changed scheme layoutNao Pross2017-03-231-3/+3
| | | | | | | | | hw: changed scheme and annotated components doc: added build script for windows sw: added res/ folder with blaster and created jedec document for address decoder pld
* hardware nearly finishedNao Pross2017-03-171-0/+14
doc: added datasheets for - GAL16V8 - MAX214 - MAX232 added script to build doc under windows with miktex updated notes hw: finished i/o devices and bus viewer sw: created files for pld programming
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