| Commit message (Expand) | Author | Age | Files | Lines |
* | board complete, generate gerber (x2) fileshardware | Nao Pross | 2017-05-23 | 5 | -21/+21 |
* | finish wiring and add eurocard compliant standard holes | Nao Pross | 2017-05-19 | 4 | -12/+12 |
* | wiring for 7 segment displays and traces for the remaining CPU signals | Nao Pross | 2017-05-19 | 2 | -6/+6 |
* | new traces for cpu signals and for high address to the MMU / addr decoder | Nao Pross | 2017-05-18 | 1 | -3/+3 |
* | wiring for CTC (U8) to address bus and data bus | Nao Pross | 2017-05-18 | 1 | -3/+3 |
* | wiring for P4 and P5 (I/O ports) and circuits for CLKs and RST | Nao Pross | 2017-05-18 | 1 | -3/+3 |
* | wires from DB-9 and HDR5x2 connector to MAX214 (U7) and crystal for TL16C550 | Nao Pross | 2017-05-18 | 2 | -6/+6 |
* | created new layout (starting over) | Nao Pross | 2017-05-09 | 6 | -15/+29 |
* | complete wiring for serial interface connector and logic | Nao Pross | 2017-05-05 | 5 | -15/+15 |
* | add switches datasheets for footprints | Nao Pross | 2017-05-05 | 5 | -15/+15 |
* | start printed circuit board design | Nao Pross | 2017-04-28 | 5 | -24/+24 |
* | scheme update and PCB start | Nao Pross | 2017-04-13 | 5 | -12/+26 |
* | schematic complete | Nao Pross | 2017-04-04 | 6 | -12/+40 |
* | added iospace address decoder | Nao Pross | 2017-03-31 | 4 | -12/+12 |
* | changed scheme layout | Nao Pross | 2017-03-23 | 4 | -12/+12 |
* | hardware nearly finished | Nao Pross | 2017-03-17 | 5 | -12/+54 |
* | hw: moved everything to one sheet | Nao Pross | 2017-03-06 | 2 | -9/+23 |
* | doc: added L7805ACV datasheet; hw: updated scheme | Nao Pross | 2017-03-05 | 1 | -3/+3 |
* | hw: created library project, doc: added 74LS193 datasheet | Nao Pross | 2017-02-24 | 1 | -3/+3 |
* | hw: created sch, doc: added uart datasheet | Nao Pross | 2017-02-24 | 1 | -0/+14 |