sam/z80uPC - Microcomputer based on the Z80 processor

	Commit message (Collapse)	Author	Files	Lines
2017-11-28	Add datasheets and resources	Nao Pross	1	-3/+3

2017-05-23	board complete, generate gerber (x2) fileshardware	Nao Pross	91	-275/+35121
	this is probably the last commit before printing the PCB, unless there are some other errors in the board design
2017-05-19	finish wiring and add eurocard compliant standard holes	Nao Pross	178	-55/+790
	since there wasn't enough space (I should have added the holes before beginning) there are only 4 holes instead of 6 (2 will be cut out since the space is unused).
2017-05-19	wiring for 7 segment displays and traces for the remaining CPU signals	Nao Pross	54	-6/+56

2017-05-18	new traces for cpu signals and for high address to the MMU / addr decoder	Nao Pross	27	-3/+3
	there are also many other minor changes to connect various wires
2017-05-18	wiring for CTC (U8) to address bus and data bus	Nao Pross	17	-3/+3

2017-05-18	wiring for P4 and P5 (I/O ports) and circuits for CLKs and RST	Nao Pross	6	-3/+3

2017-05-18	wires from DB-9 and HDR5x2 connector to MAX214 (U7) and crystal for TL16C550	Nao Pross	33	-6/+6

2017-05-09	created new layout (starting over)	Nao Pross	73	-130/+1039
	the old layout is still under hw/MainBoard1.PcbDoc
2017-05-05	complete wiring for serial interface connector and logic	Nao Pross	97	-15/+20
	other changes: - new layout, probably the board will have to be resized to a nonstandard size (currently 2EUROCARD) - new footprint HDR5x2_SOCKET for standard 5x2 flatcable connectors
2017-05-05	add switches datasheets for footprints	Nao Pross	13	-17/+17

2017-04-28	start printed circuit board design	Nao Pross	158	-31/+11374
	wired: - clock circiuts - reset button set layout for: - CPU & memory - serial interface
2017-04-13	scheme update and PCB start	Nao Pross	51	-109/+1787
	add missing capacitor and resistor values (serial XTAL) create new eurocard standard compliant PCB for the uPC and other minor fixes
2017-04-04	schematic complete	Nao Pross	131	-98/+214
	hw: change address decoder chip from GAL16V8 to M4-32/32 (CPLD) change main bus connector with a custom one (intead of PC/104) start building footprint library
2017-03-31	added iospace address decoder	Nao Pross	17	-12/+12

2017-03-23	changed scheme layout	Nao Pross	119	-13/+189
	hw: changed scheme and annotated components doc: added build script for windows sw: added res/ folder with blaster and created jedec document for address decoder pld
2017-03-17	hardware nearly finished	Nao Pross	339	-125/+850
	doc: added datasheets for - GAL16V8 - MAX214 - MAX232 added script to build doc under windows with miktex updated notes hw: finished i/o devices and bus viewer sw: created files for pld programming
2017-03-06	hw: moved everything to one sheet	Nao Pross	226	-57/+662

2017-03-05	doc: added L7805ACV datasheet; hw: updated scheme	Nao Pross	6	-13/+1275

2017-02-24	hw: created library project, doc: added 74LS193 datasheet	Nao Pross	17	-464/+5

2017-02-24	hw: created sch, doc: added uart datasheet	Nao Pross	5	-3/+501

2017-02-14	hw: created z80acpu in sch library	Nao Pross	12	-0/+1005