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* update cpld files from VHDL dev machine and delete programmer code (unused)Nao Pross2017-11-231-22/+28
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* switch from GAL (pld) to M4 32/32 CPLDNao Pross2017-04-131-0/+22
add M4 32/32 CPLD datasheet new VHDL code with better control over the address space thanks to the M4 which has a 16 bit input port