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* Move sw to sw-old and hw to hw-altium, add kicad filesNao Pross2018-10-3058-5521/+0
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* update cpld files from VHDL dev machine and delete programmer code (unused)Nao Pross2017-11-2365-576/+5521
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* new components list and cpld test unitNao Pross2017-06-162-46/+1
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* switch from GAL (pld) to M4 32/32 CPLDNao Pross2017-04-1313-0/+621
add M4 32/32 CPLD datasheet new VHDL code with better control over the address space thanks to the M4 which has a 16 bit input port