From 985e16b181fd55e28538f2d4524550bd425b86e9 Mon Sep 17 00:00:00 2001
From: Nao Pross <naopross@thearcway.org>
Date: Thu, 13 Apr 2017 16:03:11 +0200
Subject: switch from GAL (pld) to M4 32/32 CPLD

add M4 32/32 CPLD datasheet
new VHDL code with better control over the address space thanks to the
M4 which has a 16 bit input port
---
 doc/datasheets/M4-32_32-15JC.pdf | Bin 0 -> 478635 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)
 create mode 100644 doc/datasheets/M4-32_32-15JC.pdf

(limited to 'doc/datasheets')

diff --git a/doc/datasheets/M4-32_32-15JC.pdf b/doc/datasheets/M4-32_32-15JC.pdf
new file mode 100644
index 0000000..7dcb44a
Binary files /dev/null and b/doc/datasheets/M4-32_32-15JC.pdf differ
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