From 6d90fa4ec93cfb664927ff645743e92cb0582dae Mon Sep 17 00:00:00 2001 From: Nao Pross Date: Fri, 5 May 2017 16:27:15 +0200 Subject: complete wiring for serial interface connector and logic other changes: - new layout, probably the board will have to be resized to a nonstandard size (currently 2EUROCARD) - new footprint HDR5x2_SOCKET for standard 5x2 flatcable connectors --- hw/History/z80uPC.~(35).SCHLIB.Zip | Bin 0 -> 25896 bytes 1 file changed, 0 insertions(+), 0 deletions(-) create mode 100644 hw/History/z80uPC.~(35).SCHLIB.Zip (limited to 'hw/History/z80uPC.~(35).SCHLIB.Zip') diff --git a/hw/History/z80uPC.~(35).SCHLIB.Zip b/hw/History/z80uPC.~(35).SCHLIB.Zip new file mode 100644 index 0000000..7b96dd6 Binary files /dev/null and b/hw/History/z80uPC.~(35).SCHLIB.Zip differ -- cgit v1.2.1