From a952876ae9787d603cf5cf5c19b7f0be34e883f2 Mon Sep 17 00:00:00 2001 From: Nao Pross Date: Fri, 28 Apr 2017 18:19:42 +0200 Subject: start printed circuit board design wired: - clock circiuts - reset button set layout for: - CPU & memory - serial interface --- hw/Project Logs for z80uPC/BusViewer SCH ECO 26.04.2017 16-26-06.LOG | 5 +++++ 1 file changed, 5 insertions(+) create mode 100644 hw/Project Logs for z80uPC/BusViewer SCH ECO 26.04.2017 16-26-06.LOG (limited to 'hw/Project Logs for z80uPC/BusViewer SCH ECO 26.04.2017 16-26-06.LOG') diff --git a/hw/Project Logs for z80uPC/BusViewer SCH ECO 26.04.2017 16-26-06.LOG b/hw/Project Logs for z80uPC/BusViewer SCH ECO 26.04.2017 16-26-06.LOG new file mode 100644 index 0000000..c57b9fd --- /dev/null +++ b/hw/Project Logs for z80uPC/BusViewer SCH ECO 26.04.2017 16-26-06.LOG @@ -0,0 +1,5 @@ +Change Component Footprint: Designator=P3 Old Footprint=HDR2X5 New Footprint=MHDR2X5 +Add Pin To Net: Pin=S1-1 Old Net=NetS1_1 New Net=CLK +Add Pin To Net: Pin=S1-3 Old Net=NetS1_3 New Net=CLK3 +Add Pin To Net: Pin=S1-4 Old Net=NetS1_4 New Net=CLK2 +Add Pin To Net: Pin=S1-5 Old Net=NetS1_5 New Net=CLK1 -- cgit v1.2.1