From 6d90fa4ec93cfb664927ff645743e92cb0582dae Mon Sep 17 00:00:00 2001 From: Nao Pross Date: Fri, 5 May 2017 16:27:15 +0200 Subject: complete wiring for serial interface connector and logic other changes: - new layout, probably the board will have to be resized to a nonstandard size (currently 2EUROCARD) - new footprint HDR5x2_SOCKET for standard 5x2 flatcable connectors --- hw/Project Logs for z80uPC/MainBoard PCB ECO 05.05.2017 09-41-08.LOG | 1 + 1 file changed, 1 insertion(+) create mode 100644 hw/Project Logs for z80uPC/MainBoard PCB ECO 05.05.2017 09-41-08.LOG (limited to 'hw/Project Logs for z80uPC/MainBoard PCB ECO 05.05.2017 09-41-08.LOG') diff --git a/hw/Project Logs for z80uPC/MainBoard PCB ECO 05.05.2017 09-41-08.LOG b/hw/Project Logs for z80uPC/MainBoard PCB ECO 05.05.2017 09-41-08.LOG new file mode 100644 index 0000000..3565d69 --- /dev/null +++ b/hw/Project Logs for z80uPC/MainBoard PCB ECO 05.05.2017 09-41-08.LOG @@ -0,0 +1 @@ +Change Component Footprint: Designator=P3 Old Footprint=HDR2X5 New Footprint=HDR5x2_SOCK -- cgit v1.2.1