From a952876ae9787d603cf5cf5c19b7f0be34e883f2 Mon Sep 17 00:00:00 2001 From: Nao Pross Date: Fri, 28 Apr 2017 18:19:42 +0200 Subject: start printed circuit board design wired: - clock circiuts - reset button set layout for: - CPU & memory - serial interface --- hw/z80uPC.SCHLIB | Bin 177664 -> 184320 bytes 1 file changed, 0 insertions(+), 0 deletions(-) (limited to 'hw/z80uPC.SCHLIB') diff --git a/hw/z80uPC.SCHLIB b/hw/z80uPC.SCHLIB index 6041b3c..81b8432 100644 Binary files a/hw/z80uPC.SCHLIB and b/hw/z80uPC.SCHLIB differ -- cgit v1.2.1 From 6d90fa4ec93cfb664927ff645743e92cb0582dae Mon Sep 17 00:00:00 2001 From: Nao Pross Date: Fri, 5 May 2017 16:27:15 +0200 Subject: complete wiring for serial interface connector and logic other changes: - new layout, probably the board will have to be resized to a nonstandard size (currently 2EUROCARD) - new footprint HDR5x2_SOCKET for standard 5x2 flatcable connectors --- hw/z80uPC.SCHLIB | Bin 184320 -> 184320 bytes 1 file changed, 0 insertions(+), 0 deletions(-) (limited to 'hw/z80uPC.SCHLIB') diff --git a/hw/z80uPC.SCHLIB b/hw/z80uPC.SCHLIB index 81b8432..2e6f8c0 100644 Binary files a/hw/z80uPC.SCHLIB and b/hw/z80uPC.SCHLIB differ -- cgit v1.2.1