From 43be150dc6e84f6f6eeb071cd3cdb7fc21125d60 Mon Sep 17 00:00:00 2001
From: Nao Pross <naopross@thearcway.org>
Date: Tue, 30 Oct 2018 11:41:24 +0100
Subject: Move sw to sw-old and hw to hw-altium, add kicad files

---
 sw-old/z80/tests/ram/crt0.s   | 40 ++++++++++++++++++++++++++++++++
 sw-old/z80/tests/ram/main.c   | 13 +++++++++++
 sw-old/z80/tests/ram/makefile | 54 +++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 107 insertions(+)
 create mode 100644 sw-old/z80/tests/ram/crt0.s
 create mode 100644 sw-old/z80/tests/ram/main.c
 create mode 100644 sw-old/z80/tests/ram/makefile

(limited to 'sw-old/z80/tests/ram')

diff --git a/sw-old/z80/tests/ram/crt0.s b/sw-old/z80/tests/ram/crt0.s
new file mode 100644
index 0000000..b0caa8c
--- /dev/null
+++ b/sw-old/z80/tests/ram/crt0.s
@@ -0,0 +1,40 @@
+	.module crt0
+	.area	_HEADER (ABS)
+
+;; Reset vectors
+	.org 	0
+	jp	init
+
+	.org	0x38 ; the instruction 0xff (not written) resets to this location
+    jp init
+
+;; main code
+	.org	0x100
+    .globl  _main
+
+init:
+	;; Set stack pointer directly above top of memory.
+	ld	sp,#0xffff
+
+	;; Start of the program
+	call	_main
+	jp	    _exit
+
+_exit:
+    halt
+    jp  _exit
+
+;; Ordering of segments for the linker.
+	.area	_HOME
+	.area	_CODE
+	.area	_INITIALIZER
+	.area   _GSINIT
+	.area   _GSFINAL
+
+	.area	_DATA
+	.area	_INITIALIZED
+	.area	_BSEG
+	.area   _BSS
+	.area   _HEAP
+
+	.area   _CODE
\ No newline at end of file
diff --git a/sw-old/z80/tests/ram/main.c b/sw-old/z80/tests/ram/main.c
new file mode 100644
index 0000000..581072b
--- /dev/null
+++ b/sw-old/z80/tests/ram/main.c
@@ -0,0 +1,13 @@
+
+void main(void)
+{
+    unsigned char j;
+    unsigned char *mem;
+    
+    j = 0;
+    mem = (unsigned char *) 0x8200; // somwhere in ram
+
+    while (1) {
+        *mem = j++;
+    }
+}
diff --git a/sw-old/z80/tests/ram/makefile b/sw-old/z80/tests/ram/makefile
new file mode 100644
index 0000000..f8eb9fc
--- /dev/null
+++ b/sw-old/z80/tests/ram/makefile
@@ -0,0 +1,54 @@
+####
+# source code settings
+#
+OSNAME := ram_test
+ 
+CSOURCES 	:=  $(wildcard *.c)
+
+OBJECTS 	:= $(patsubst %.c,build/%.rel,$(CSOURCES))
+HEXFILE		:= build/$(OSNAME).hex
+BINARY  	:= build/$(OSNAME).bin
+
+### 
+# compiler settings
+#
+CC 		:= sdcc
+
+CFLAGS	:= -mz80 \
+			-I . \
+			-DDEBUG
+
+LDFLAGS := -mz80 \
+			--no-std-crt0 build/crt0.rel \
+			-pedantic 
+
+			# --code-loc 0x0120 \
+			# --data-loc 0x2000
+
+.PHONY: flash dirs dis clean
+all: $(BINARY)
+
+flash: $(BINARY)
+	minipro -p M28C64 -w $< 
+
+# build binary
+$(BINARY): $(OBJECTS) dirs
+	$(CC) $(LDFLAGS) $(OBJECTS) -o $(HEXFILE)
+	makebin -s 8192 -yo 1 $(HEXFILE) $(BINARY)
+
+$(OBJECTS): build/%.rel : %.c $(CSOURCES) dirs build/crt0.rel
+	@printf "\n"
+	$(CC) $(CFLAGS) -c $< -o $@
+
+build/crt0.rel: crt0.s
+	sdasz80 -o $<
+	@mv crt0.rel build/
+
+dirs:
+	mkdir -p build
+
+dis: $(BINARY)
+	r2 -a z80 $< -c 'pd 0x10; s 0x100; pd 10; s 0x200; pd 10'
+
+clean:
+	- rm -rd build
-- 
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