From 141137dfe5bdc7400d5cc1ad388b670f9f2e9446 Mon Sep 17 00:00:00 2001 From: Nao Pross Date: Thu, 23 Nov 2017 14:34:55 +0100 Subject: update cpld files from VHDL dev machine and delete programmer code (unused) --- sw/cpld/address_decoder.tt4 | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100755 sw/cpld/address_decoder.tt4 (limited to 'sw/cpld/address_decoder.tt4') diff --git a/sw/cpld/address_decoder.tt4 b/sw/cpld/address_decoder.tt4 new file mode 100755 index 0000000..4a58b90 --- /dev/null +++ b/sw/cpld/address_decoder.tt4 @@ -0,0 +1,25 @@ +#$ TOOL ispDesignEXPERT 8.3.02.12 +#$ DATE Thu Nov 23 11:54:43 2017 +#$ MODULE ADDRESS_DECODER +#$ PINS 21 MMU_IN_7_ MMU_IN_6_ MMU_IN_15_ MMU_IN_5_ MMU_IN_4_ MMU_OUT_15_ + MMU_IN_3_ IORQ MMU_IN_2_ CSROML CSROMH MMU_OUT_14_ CSRAM MMU_OUT_13_ CSUART + MMU_OUT_12_ CSCTC CSPIO MMU_IN_14_ MMU_IN_13_ MMU_IN_12_ +.type f +.i 11 +.o 10 +.ilb MMU_IN_15_ IORQ MMU_IN_14_ MMU_IN_13_ MMU_IN_12_ MMU_IN_7_ MMU_IN_6_ + MMU_IN_5_ MMU_IN_4_ MMU_IN_3_ MMU_IN_2_ +.ob MMU_OUT_15_ CSROML% CSROMH% MMU_OUT_14_ CSRAM MMU_OUT_13_ CSUART MMU_OUT_12_ + CSCTC CSPIO% +.phase 1111111111 +.p 9 +1---------- 1000000000 +0-00------- 0100000000 +0-01------- 0010000000 +--1-------- 0001000000 +0---------- 0000100000 +---1------- 0000010000 +----------- 0000000000 +----1------ 0000000100 +-0---000100 0000000001 +.end -- cgit v1.2.1