From 6105426e159a55cfb15fee3e999bb4fcf6289446 Mon Sep 17 00:00:00 2001 From: Nao Pross Date: Fri, 16 Jun 2017 15:25:54 +0200 Subject: new components list and cpld test unit --- sw/cpld_test/syntmp/cpld_test_srr.htm | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 sw/cpld_test/syntmp/cpld_test_srr.htm (limited to 'sw/cpld_test/syntmp/cpld_test_srr.htm') diff --git a/sw/cpld_test/syntmp/cpld_test_srr.htm b/sw/cpld_test/syntmp/cpld_test_srr.htm new file mode 100644 index 0000000..a234dd1 --- /dev/null +++ b/sw/cpld_test/syntmp/cpld_test_srr.htm @@ -0,0 +1,29 @@ +
+
+#Build: Synplify Pro I-2014.03LC , Build 063R, May 27 2014
+#install: C:\ispLEVER_Classic2\synpbase
+#OS: Windows 7 6.1
+#Hostname: PC805012
+
+#Implementation: cpld_test
+
+$ Start of Compile
+#Thu Jun 01 13:51:51 2017
+
+Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014
+@N: :  | Running in 32-bit mode 
+Copyright (C) 1994-2014 Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc.  All other use, reproduction, or distribution of this software is strictly prohibited.
+
+@N:CD720 : std.vhd(123) | Setting time resolution to ns
+Top entity isn't set yet!
+@E:CD169 : cpld_test.vhd(7) | Illegal declaration
+@E:CD213 : cpld_test.vhd(13) | Undefined identifier
+2 errors parsing file \\nas001\account_pif\_prossn\samb_3\lab3\projects\z80upc\sw\cpld_test\cpld_test.vhd
+@END
+@E: :  | Parse errors encountered - exiting 
+Process took 0h:00m:01s realtime, 0h:00m:01s cputime
+# Thu Jun 01 13:51:51 2017
+
+###########################################################]
+
+
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