From 985e16b181fd55e28538f2d4524550bd425b86e9 Mon Sep 17 00:00:00 2001
From: Nao Pross <naopross@thearcway.org>
Date: Thu, 13 Apr 2017 16:03:11 +0200
Subject: switch from GAL (pld) to M4 32/32 CPLD

add M4 32/32 CPLD datasheet
new VHDL code with better control over the address space thanks to the
M4 which has a 16 bit input port
---
 sw/pld/ADDRESS_DECODER.abs | Bin 1481 -> 0 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)
 delete mode 100644 sw/pld/ADDRESS_DECODER.abs

(limited to 'sw/pld/ADDRESS_DECODER.abs')

diff --git a/sw/pld/ADDRESS_DECODER.abs b/sw/pld/ADDRESS_DECODER.abs
deleted file mode 100644
index ab6deb9..0000000
Binary files a/sw/pld/ADDRESS_DECODER.abs and /dev/null differ
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