From 985e16b181fd55e28538f2d4524550bd425b86e9 Mon Sep 17 00:00:00 2001 From: Nao Pross Date: Thu, 13 Apr 2017 16:03:11 +0200 Subject: switch from GAL (pld) to M4 32/32 CPLD add M4 32/32 CPLD datasheet new VHDL code with better control over the address space thanks to the M4 which has a 16 bit input port --- sw/pld/address_decoder.PLD | 35 ----------------------------------- 1 file changed, 35 deletions(-) delete mode 100644 sw/pld/address_decoder.PLD (limited to 'sw/pld/address_decoder.PLD') diff --git a/sw/pld/address_decoder.PLD b/sw/pld/address_decoder.PLD deleted file mode 100644 index 1cc9e22..0000000 --- a/sw/pld/address_decoder.PLD +++ /dev/null @@ -1,35 +0,0 @@ -Name ADDRESS_DECODER ; -PartNo 00 ; -Date 17.03.2017 ; -Revision 01 ; -Designer Engineer ; -Company SAM Bellinzona ; -Assembly None ; -Location ; -Device g16v8a; - -/* *************** INPUT PINS *********************/ -PIN 2 = A8 ; -PIN 3 = A9 ; -PIN 4 = A10 ; -PIN 5 = A11 ; -PIN 6 = A12 ; -PIN 7 = A13 ; -PIN 8 = A14 ; -PIN 9 = A15 ; - -/* *************** OUTPUT PINS *********************/ -PIN 12 = CSROML ; -PIN 13 = CSROMH ; -PIN 14 = CSRAM ; -PIN 15 = CSUART ; -PIN 16 = CSCTC ; -PIN 17 = CSPIO ; - -CSRAM = !A15 ; -CSROML = !(!A15 & !A14 & !A13) ; -CSROMH = !(!A15 & !A14 & A13) ; -CSUART = !(!A15 & !A14 & A13 & !A12 & !A11 & !A10 & !A9 & !A8) ; -CSTIMER = !(!A15 & !A14 & A13 & !A12 & !A11 & !A10 & !A9 & A8) ; -CSCTC = !(!A15 & !A14 & A13 & !A12 & !A11 & !A10 & A9 & !A8) ; -CSPIO = !(!A15 & !A14 & A13 & !A12 & !A11 & !A10 & A9 & A8) ; -- cgit v1.2.1