From f000d406809d8a7a0e71c388ebfb15d7564728e4 Mon Sep 17 00:00:00 2001 From: Nao Pross Date: Thu, 5 Oct 2017 12:17:37 +0200 Subject: Test units are now in their own folder 'z80_test', add programmer cli interface --- sw/z80_tests/ram/build/crt0.rel | 70 +++++++++++++++++ sw/z80_tests/ram/build/main.asm | 59 +++++++++++++++ sw/z80_tests/ram/build/main.lst | 59 +++++++++++++++ sw/z80_tests/ram/build/main.rel | 23 ++++++ sw/z80_tests/ram/build/main.sym | 27 +++++++ sw/z80_tests/ram/build/test.lk | 11 +++ sw/z80_tests/ram/build/test.map | 162 ++++++++++++++++++++++++++++++++++++++++ sw/z80_tests/ram/build/test.noi | 48 ++++++++++++ sw/z80_tests/ram/build/test.z80 | 73 ++++++++++++++++++ 9 files changed, 532 insertions(+) create mode 100644 sw/z80_tests/ram/build/crt0.rel create mode 100644 sw/z80_tests/ram/build/main.asm create mode 100644 sw/z80_tests/ram/build/main.lst create mode 100644 sw/z80_tests/ram/build/main.rel create mode 100644 sw/z80_tests/ram/build/main.sym create mode 100644 sw/z80_tests/ram/build/test.lk create mode 100644 sw/z80_tests/ram/build/test.map create mode 100644 sw/z80_tests/ram/build/test.noi create mode 100644 sw/z80_tests/ram/build/test.z80 (limited to 'sw/z80_tests/ram/build') diff --git a/sw/z80_tests/ram/build/crt0.rel b/sw/z80_tests/ram/build/crt0.rel new file mode 100644 index 0000000..cce6a25 --- /dev/null +++ b/sw/z80_tests/ram/build/crt0.rel @@ -0,0 +1,70 @@ +XL2 +H 14 areas 3 global symbols +M crt0 +S _main Ref0000 +S .__.ABS. Def0000 +A _CODE size 3 flags 0 addr 0 +S _exit Def0000 +A _HEADER size 0 flags 8 addr 0 +A _HEADER0 size 3 flags 8 addr 0 +A _HEADER1 size 2 flags 8 addr 8 +A _HEADER2 size 2 flags 8 addr 10 +A _HEADER3 size 2 flags 8 addr 18 +A _HEADER4 size 2 flags 8 addr 20 +A _HEADER5 size 2 flags 8 addr 28 +A _HEADER6 size 2 flags 8 addr 30 +A _HEADER7 size 2 flags 8 addr 38 +A _HEADER8 size 9 flags 8 addr 100 +A _HOME size 0 flags 0 addr 0 +A _INITIALIZER size 0 flags 0 addr 0 +A _GSINIT size 0 flags 0 addr 0 +A _GSFINAL size 0 flags 0 addr 0 +A _DATA size 0 flags 0 addr 0 +A _INITIALIZED size 0 flags 0 addr 0 +A _BSEG size 0 flags 0 addr 0 +A _BSS size 0 flags 0 addr 0 +A _HEAP size 0 flags 0 addr 0 +T 00 00 +R 00 00 02 00 +T 00 00 C3 00 01 +R 00 00 02 00 00 03 0A 00 +T 08 00 +R 00 00 03 00 +T 08 00 ED 4D +R 00 00 03 00 +T 10 00 +R 00 00 04 00 +T 10 00 ED 4D +R 00 00 04 00 +T 18 00 +R 00 00 05 00 +T 18 00 ED 4D +R 00 00 05 00 +T 20 00 +R 00 00 06 00 +T 20 00 ED 4D +R 00 00 06 00 +T 28 00 +R 00 00 07 00 +T 28 00 ED 4D +R 00 00 07 00 +T 30 00 +R 00 00 08 00 +T 30 00 ED 4D +R 00 00 08 00 +T 38 00 +R 00 00 09 00 +T 38 00 ED 4D +R 00 00 09 00 +T 00 01 +R 00 00 0A 00 +T 00 01 +R 00 00 0A 00 +T 00 01 31 FF FF CD 00 00 C3 00 00 +R 00 00 0A 00 02 06 00 00 00 09 00 00 +T 00 00 +R 00 00 00 00 +T 00 00 +R 00 00 00 00 +T 00 00 76 18 FD +R 00 00 00 00 diff --git a/sw/z80_tests/ram/build/main.asm b/sw/z80_tests/ram/build/main.asm new file mode 100644 index 0000000..f3b8add --- /dev/null +++ b/sw/z80_tests/ram/build/main.asm @@ -0,0 +1,59 @@ +;-------------------------------------------------------- +; File Created by SDCC : free open source ANSI-C Compiler +; Version 3.6.0 #9615 (Linux) +;-------------------------------------------------------- + .module main + .optsdcc -mz80 + +;-------------------------------------------------------- +; Public variables in this module +;-------------------------------------------------------- + .globl _main +;-------------------------------------------------------- +; special function registers +;-------------------------------------------------------- +;-------------------------------------------------------- +; ram data +;-------------------------------------------------------- + .area _DATA +;-------------------------------------------------------- +; ram data +;-------------------------------------------------------- + .area _INITIALIZED +;-------------------------------------------------------- +; absolute external ram data +;-------------------------------------------------------- + .area _DABS (ABS) +;-------------------------------------------------------- +; global & static initialisations +;-------------------------------------------------------- + .area _HOME + .area _GSINIT + .area _GSFINAL + .area _GSINIT +;-------------------------------------------------------- +; Home +;-------------------------------------------------------- + .area _HOME + .area _HOME +;-------------------------------------------------------- +; code +;-------------------------------------------------------- + .area _CODE +;main.c:2: void main(void) +; --------------------------------- +; Function main +; --------------------------------- +_main:: +;main.c:10: while (1) { + ld c,#0x00 +00102$: +;main.c:11: *mem = j++; + ld b,c + inc c + ld hl,#0x8200 + ld (hl),b + jr 00102$ + .area _CODE + .area _INITIALIZER + .area _CABS (ABS) diff --git a/sw/z80_tests/ram/build/main.lst b/sw/z80_tests/ram/build/main.lst new file mode 100644 index 0000000..17142d4 --- /dev/null +++ b/sw/z80_tests/ram/build/main.lst @@ -0,0 +1,59 @@ + 1 ;-------------------------------------------------------- + 2 ; File Created by SDCC : free open source ANSI-C Compiler + 3 ; Version 3.6.0 #9615 (Linux) + 4 ;-------------------------------------------------------- + 5 .module main + 6 .optsdcc -mz80 + 7 + 8 ;-------------------------------------------------------- + 9 ; Public variables in this module + 10 ;-------------------------------------------------------- + 11 .globl _main + 12 ;-------------------------------------------------------- + 13 ; special function registers + 14 ;-------------------------------------------------------- + 15 ;-------------------------------------------------------- + 16 ; ram data + 17 ;-------------------------------------------------------- + 18 .area _DATA + 19 ;-------------------------------------------------------- + 20 ; ram data + 21 ;-------------------------------------------------------- + 22 .area _INITIALIZED + 23 ;-------------------------------------------------------- + 24 ; absolute external ram data + 25 ;-------------------------------------------------------- + 26 .area _DABS (ABS) + 27 ;-------------------------------------------------------- + 28 ; global & static initialisations + 29 ;-------------------------------------------------------- + 30 .area _HOME + 31 .area _GSINIT + 32 .area _GSFINAL + 33 .area _GSINIT + 34 ;-------------------------------------------------------- + 35 ; Home + 36 ;-------------------------------------------------------- + 37 .area _HOME + 38 .area _HOME + 39 ;-------------------------------------------------------- + 40 ; code + 41 ;-------------------------------------------------------- + 42 .area _CODE + 43 ;main.c:2: void main(void) + 44 ; --------------------------------- + 45 ; Function main + 46 ; --------------------------------- + 0000 47 _main:: + 48 ;main.c:10: while (1) { + 0000 0E 00 [ 7] 49 ld c,#0x00 + 0002 50 00102$: + 51 ;main.c:11: *mem = j++; + 0002 41 [ 4] 52 ld b,c + 0003 0C [ 4] 53 inc c + 0004 21 00 82 [10] 54 ld hl,#0x8200 + 0007 70 [ 7] 55 ld (hl),b + 0008 18 F8 [12] 56 jr 00102$ + 57 .area _CODE + 58 .area _INITIALIZER + 59 .area _CABS (ABS) diff --git a/sw/z80_tests/ram/build/main.rel b/sw/z80_tests/ram/build/main.rel new file mode 100644 index 0000000..cad7a3c --- /dev/null +++ b/sw/z80_tests/ram/build/main.rel @@ -0,0 +1,23 @@ +XL2 +H 9 areas 2 global symbols +M main +O -mz80 +S .__.ABS. Def0000 +A _CODE size A flags 0 addr 0 +S _main Def0000 +A _DATA size 0 flags 0 addr 0 +A _INITIALIZED size 0 flags 0 addr 0 +A _DABS size 0 flags 8 addr 0 +A _HOME size 0 flags 0 addr 0 +A _GSINIT size 0 flags 0 addr 0 +A _GSFINAL size 0 flags 0 addr 0 +A _INITIALIZER size 0 flags 0 addr 0 +A _CABS size 0 flags 8 addr 0 +T 00 00 +R 00 00 00 00 +T 00 00 0E 00 +R 00 00 00 00 +T 02 00 +R 00 00 00 00 +T 02 00 41 0C 21 00 82 70 18 F8 +R 00 00 00 00 diff --git a/sw/z80_tests/ram/build/main.sym b/sw/z80_tests/ram/build/main.sym new file mode 100644 index 0000000..d81bdc8 --- /dev/null +++ b/sw/z80_tests/ram/build/main.sym @@ -0,0 +1,27 @@ + ASxxxx Assembler V02.00 + NoICE + SDCC mods (Zilog Z80 / Hitachi HD64180), page 1. +Hexadecimal [16-Bits] + +Symbol Table + + .__.$$$. = 2710 L + .__.ABS. = 0000 G + .__.CPU. = 0000 L + .__.H$L. = 0000 L + 0 _main 0000 GR + + + ASxxxx Assembler V02.00 + NoICE + SDCC mods (Zilog Z80 / Hitachi HD64180), page 2. +Hexadecimal [16-Bits] + +Area Table + + 0 _CODE size A flags 0 + 1 _DATA size 0 flags 0 + 2 _INITIALIZED size 0 flags 0 + 3 _DABS size 0 flags 8 + 4 _HOME size 0 flags 0 + 5 _GSINIT size 0 flags 0 + 6 _GSFINAL size 0 flags 0 + 7 _INITIALIZER size 0 flags 0 + 8 _CABS size 0 flags 8 + diff --git a/sw/z80_tests/ram/build/test.lk b/sw/z80_tests/ram/build/test.lk new file mode 100644 index 0000000..03a8db4 --- /dev/null +++ b/sw/z80_tests/ram/build/test.lk @@ -0,0 +1,11 @@ +-mjwx +-i build/test.hex +-b _CODE = 0x0000 +-b _DATA = 0x2000 +-k /usr/libexec/../share/sdcc/lib/z80 +-k /usr/share/sdcc/lib/z80 +-l z80 +build/crt0.rel +build/main.rel + +-e diff --git a/sw/z80_tests/ram/build/test.map b/sw/z80_tests/ram/build/test.map new file mode 100644 index 0000000..07b953f --- /dev/null +++ b/sw/z80_tests/ram/build/test.map @@ -0,0 +1,162 @@ + ASxxxx Linker V03.00 + NoICE + sdld, page 1. +Hexadecimal [32-Bits] + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +. .ABS. 00000000 00000000 = 0. bytes (ABS,CON) + + Value Global Global Defined In Module + ----- -------------------------------- ------------------------ + 00000000 .__.ABS. main + 00000000 l__BSEG + 00000000 l__BSS + 00000000 l__CABS + 00000000 l__DABS + 00000000 l__DATA + 00000000 l__GSFINAL + 00000000 l__GSINIT + 00000000 l__HEADER + 00000000 l__HEAP + 00000000 l__HOME + 00000000 l__INITIALIZED + 00000000 l__INITIALIZER + 00000000 s__CABS + 00000000 s__CODE + 00000000 s__DABS + 00000000 s__HEADER + 00000000 s__HEADER0 + 00000000 s__HEADER1 + 00000000 s__HEADER2 + 00000000 s__HEADER3 + 00000000 s__HEADER4 + 00000000 s__HEADER5 + 00000000 s__HEADER6 + 00000000 s__HEADER7 + 00000000 s__HEADER8 + 00000002 l__HEADER1 + 00000002 l__HEADER2 + 00000002 l__HEADER3 + 00000002 l__HEADER4 + 00000002 l__HEADER5 + 00000002 l__HEADER6 + 00000002 l__HEADER7 + 00000003 l__HEADER0 + 00000009 l__HEADER8 + 0000000D l__CODE + 0000000D s__GSFINAL + 0000000D s__GSINIT + 0000000D s__HOME + 0000000D s__INITIALIZER + 00002000 s__BSEG + 00002000 s__BSS + 00002000 s__DATA + 00002000 s__HEAP + 00002000 s__INITIALIZED + ASxxxx Linker V03.00 + NoICE + sdld, page 2. +Hexadecimal [32-Bits] + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +_CODE 00000000 0000000D = 13. bytes (REL,CON) + + Value Global Global Defined In Module + ----- -------------------------------- ------------------------ + 00000000 _exit crt0 + 00000003 _main main + + ASxxxx Linker V03.00 + NoICE + sdld, page 3. +Hexadecimal [32-Bits] + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +_HEADER0 00000000 00000003 = 3. bytes (ABS,CON) + + Value Global Global Defined In Module + ----- -------------------------------- ------------------------ + ASxxxx Linker V03.00 + NoICE + sdld, page 4. +Hexadecimal [32-Bits] + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +_HEADER1 00000000 00000002 = 2. bytes (ABS,CON) + + Value Global Global Defined In Module + ----- -------------------------------- ------------------------ + ASxxxx Linker V03.00 + NoICE + sdld, page 5. +Hexadecimal [32-Bits] + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +_HEADER2 00000000 00000002 = 2. bytes (ABS,CON) + + Value Global Global Defined In Module + ----- -------------------------------- ------------------------ + ASxxxx Linker V03.00 + NoICE + sdld, page 6. +Hexadecimal [32-Bits] + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +_HEADER3 00000000 00000002 = 2. bytes (ABS,CON) + + Value Global Global Defined In Module + ----- -------------------------------- ------------------------ + ASxxxx Linker V03.00 + NoICE + sdld, page 7. +Hexadecimal [32-Bits] + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +_HEADER4 00000000 00000002 = 2. bytes (ABS,CON) + + Value Global Global Defined In Module + ----- -------------------------------- ------------------------ + ASxxxx Linker V03.00 + NoICE + sdld, page 8. +Hexadecimal [32-Bits] + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +_HEADER5 00000000 00000002 = 2. bytes (ABS,CON) + + Value Global Global Defined In Module + ----- -------------------------------- ------------------------ + ASxxxx Linker V03.00 + NoICE + sdld, page 9. +Hexadecimal [32-Bits] + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +_HEADER6 00000000 00000002 = 2. bytes (ABS,CON) + + Value Global Global Defined In Module + ----- -------------------------------- ------------------------ + ASxxxx Linker V03.00 + NoICE + sdld, page 10. +Hexadecimal [32-Bits] + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +_HEADER7 00000000 00000002 = 2. bytes (ABS,CON) + + Value Global Global Defined In Module + ----- -------------------------------- ------------------------ + ASxxxx Linker V03.00 + NoICE + sdld, page 11. +Hexadecimal [32-Bits] + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +_HEADER8 00000000 00000009 = 9. bytes (ABS,CON) + + Value Global Global Defined In Module + ----- -------------------------------- ------------------------ + ASxxxx Linker V03.00 + NoICE + sdld, page 12. + +Files Linked [ module(s) ] + +build/crt0.rel [ crt0 ] +build/main.rel [ main ] + + ASxxxx Linker V03.00 + NoICE + sdld, page 13. + +User Base Address Definitions + +_CODE = 0x0000 +_DATA = 0x2000 + + \ No newline at end of file diff --git a/sw/z80_tests/ram/build/test.noi b/sw/z80_tests/ram/build/test.noi new file mode 100644 index 0000000..403beda --- /dev/null +++ b/sw/z80_tests/ram/build/test.noi @@ -0,0 +1,48 @@ +DEF .__.ABS. 0x0 +DEF l__BSEG 0x0 +DEF l__BSS 0x0 +DEF l__CABS 0x0 +DEF l__DABS 0x0 +DEF l__DATA 0x0 +DEF l__GSFINAL 0x0 +DEF l__GSINIT 0x0 +DEF l__HEADER 0x0 +DEF l__HEAP 0x0 +DEF l__HOME 0x0 +DEF l__INITIALIZED 0x0 +DEF l__INITIALIZER 0x0 +DEF s__CABS 0x0 +DEF s__CODE 0x0 +DEF s__DABS 0x0 +DEF s__HEADER 0x0 +DEF s__HEADER0 0x0 +DEF s__HEADER1 0x0 +DEF s__HEADER2 0x0 +DEF s__HEADER3 0x0 +DEF s__HEADER4 0x0 +DEF s__HEADER5 0x0 +DEF s__HEADER6 0x0 +DEF s__HEADER7 0x0 +DEF s__HEADER8 0x0 +DEF l__HEADER1 0x2 +DEF l__HEADER2 0x2 +DEF l__HEADER3 0x2 +DEF l__HEADER4 0x2 +DEF l__HEADER5 0x2 +DEF l__HEADER6 0x2 +DEF l__HEADER7 0x2 +DEF l__HEADER0 0x3 +DEF l__HEADER8 0x9 +DEF l__CODE 0xD +DEF s__GSFINAL 0xD +DEF s__GSINIT 0xD +DEF s__HOME 0xD +DEF s__INITIALIZER 0xD +DEF s__BSEG 0x2000 +DEF s__BSS 0x2000 +DEF s__DATA 0x2000 +DEF s__HEAP 0x2000 +DEF s__INITIALIZED 0x2000 +DEF _exit 0x0 +DEF _main 0x3 +LOAD build/test.ihx diff --git a/sw/z80_tests/ram/build/test.z80 b/sw/z80_tests/ram/build/test.z80 new file mode 100644 index 0000000..25a162a --- /dev/null +++ b/sw/z80_tests/ram/build/test.z80 @@ -0,0 +1,73 @@ +; +; DZ80 V3.4.1 Z80 Disassembly of build/test.bin +; 2017/09/26 09:42 +; + org 0x0 +; +X0000: halt +; + jr X0000 +; +X0003: ld c,0x0 +X0005: ld b,c + inc c + ld hl,X8200 + ld (hl),b + jr X0005 +; + rst 0x38 +; + org 0x10 +; + reti +; + rst 0x38 +; + org 0x18 +; + reti +; + rst 0x38 +; + org 0x20 +; + reti +; + rst 0x38 +; + org 0x28 +; + reti +; + rst 0x38 +; + org 0x30 +; + reti +; + rst 0x38 +; + org 0x38 +; + reti +; + rst 0x38 +; + org 0x100 +; + ld sp,Xffff + call X0003 + jp X0000 +; +; Miscellaneous equates +; +; These are addresses referenced in the code but +; which are in the middle of a multibyte instruction +; or are addresses outside the initialized space +; +X8200 equ 0x8200 +Xffff equ 0xffff +; + end +; + -- cgit v1.2.1