[Device]
Family=M4A5;
PartNumber=M4A5-32/32-10JC;
Package=44PLCC;
PartType=M4A5-32/32;
Speed=-10;
Operating_condition=COM;
Status=Production;

[Revision]
Parent=m4a5.lci;
DATE=06/01/2017;
TIME=13:49:11;
Source_Format=Pure_VHDL;
Synthesis=Synplify;

[Ignore Assignments]

[Clear Assignments]

[Backannotate Assignments]

[Global Constraints]

[Location Assignments]
Layer = Off;

[Group Assignments]
Layer = Off;

[Resource Reservations]
Layer = Off;

[Fitter Report Format]

[Power]

[Source Constraint Option]

[Fast Bypass]

[OSM Bypass]

[Input Registers]

[Netlist/Delay Format]

[IO Types]
Layer = off;

[Pullup]

[Slewrate]

[Region]

[Timing Constraints]

[HSI Attributes]

[Input Delay]