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| author | Nao Pross <naopross@thearcway.org> | 2018-11-28 22:39:59 +0100 |
|---|---|---|
| committer | Nao Pross <naopross@thearcway.org> | 2018-11-28 22:39:59 +0100 |
| commit | c3cf8166784515eff25e415535628645d402cb66 (patch) | |
| tree | daab64d5518cc9f3bb38d56bbefec4758d7363fe | |
| parent | Add main loop to read more than 5 bytes (diff) | |
| download | base32asm-c3cf8166784515eff25e415535628645d402cb66.tar.gz base32asm-c3cf8166784515eff25e415535628645d402cb66.zip | |
Swap bytes (endianness)
The problem with the code until now, was that x64 is little endian.
Therefore when the input buffer is loaded into a register to perform a
bit operation (i.e shift) the result was messed up.
| -rw-r--r-- | b32e.asm | 15 |
1 files changed, 11 insertions, 4 deletions
@@ -49,19 +49,19 @@ b32e: xor rbx, rbx ; get a byte from the input - mov bl, byte [input_buffer] + mov bl, byte [input_buffer + 4] ; mask and shift to get 5 bits which is a number in 0 ~ 31 and bl, 0xf8 shr bl, 3 - ; rshift the input buffer - shr qword [input_buffer], 5 + ; shift left the input buffer + shl qword [input_buffer], 5 ; convert to base32 add rbx, rfc4648 mov dl, byte [rbx] - mov [output_buffer + r11], dl + mov byte [output_buffer + r11], dl ; increase counter inc r11 @@ -85,6 +85,13 @@ _start: cmp rax, 0 je .exit + ; swap endianness of input + mov rax, qword [input_buffer] + bswap rax + ; correct position in qword + shr rax, 24 + mov qword [input_buffer], rax + ; convert to base 32 call b32e ; print |