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* Add padding to outputNao Pross2018-11-291-6/+21
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* Update b32e to not use rdxNao Pross2018-11-291-3/+3
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* Correct write syscall argumentNao Pross2018-11-291-1/+1
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* Swap bytes (endianness)Nao Pross2018-11-281-4/+11
| | | | | | The problem with the code until now, was that x64 is little endian. Therefore when the input buffer is loaded into a register to perform a bit operation (i.e shift) the result was messed up.
* Add main loop to read more than 5 bytesNao Pross2018-11-281-0/+11
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* Use 4 spaces for indent, update comments, change input buffer shift directionNao Pross2018-11-281-43/+56
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* Set input buffer to be 8 bytes to fit in a register for shlNao Pross2018-11-271-2/+5
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* Add Intel IA32 x64 instruction set manualNao Pross2018-11-271-0/+0
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* Add gdb configuration and debug symbolsNao Pross2018-11-272-1/+10
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* Add ret statementsNao Pross2018-11-271-1/+5
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* Update makefile with check of b32eNao Pross2018-11-271-0/+10
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* Initial implementation of encoderNao Pross2018-11-273-0/+76