base32asm - RFC4648 base 32 encoder for Linux in x64 assembly

	Commit message (Collapse)	Author	Age	Files	Lines
*	Add rough untested implementation for b32d	Nao Pross	2018-11-30	1	-2/+42
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*	Update test to show diff	Nao Pross	2018-11-29	2	-3/+6
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*	Add b32d for future decoder implementation, update test	Nao Pross	2018-11-29	3	-6/+67
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*	Add padding to output	Nao Pross	2018-11-29	1	-6/+21
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*	Update b32e to not use rdx	Nao Pross	2018-11-29	1	-3/+3
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*	Correct write syscall argument	Nao Pross	2018-11-29	1	-1/+1
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*	Swap bytes (endianness)	Nao Pross	2018-11-28	1	-4/+11
\| \| \| \| \| \|	The problem with the code until now, was that x64 is little endian. Therefore when the input buffer is loaded into a register to perform a bit operation (i.e shift) the result was messed up.
*	Add main loop to read more than 5 bytes	Nao Pross	2018-11-28	1	-0/+11
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*	Use 4 spaces for indent, update comments, change input buffer shift direction	Nao Pross	2018-11-28	1	-43/+56
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*	Set input buffer to be 8 bytes to fit in a register for shl	Nao Pross	2018-11-27	1	-2/+5
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*	Add Intel IA32 x64 instruction set manual	Nao Pross	2018-11-27	1	-0/+0
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*	Add gdb configuration and debug symbols	Nao Pross	2018-11-27	2	-1/+10
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*	Add ret statements	Nao Pross	2018-11-27	1	-1/+5
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*	Update makefile with check of b32e	Nao Pross	2018-11-27	1	-0/+10
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*	Initial implementation of encoder	Nao Pross	2018-11-27	3	-0/+76