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Diffstat (limited to 'src/armadillo/include/armadillo_bits/fn_shuffle.hpp')
-rw-r--r-- | src/armadillo/include/armadillo_bits/fn_shuffle.hpp | 88 |
1 files changed, 88 insertions, 0 deletions
diff --git a/src/armadillo/include/armadillo_bits/fn_shuffle.hpp b/src/armadillo/include/armadillo_bits/fn_shuffle.hpp new file mode 100644 index 0000000..a0e0f65 --- /dev/null +++ b/src/armadillo/include/armadillo_bits/fn_shuffle.hpp @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: Apache-2.0 +// +// Copyright 2008-2016 Conrad Sanderson (http://conradsanderson.id.au) +// Copyright 2008-2016 National ICT Australia (NICTA) +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// ------------------------------------------------------------------------ + + + +//! \addtogroup fn_shuffle +//! @{ + + +template<typename T1> +arma_warn_unused +arma_inline +typename +enable_if2 + < + is_arma_type<T1>::value && resolves_to_vector<T1>::yes, + const Op<T1, op_shuffle_vec> + >::result +shuffle + ( + const T1& X + ) + { + arma_extra_debug_sigprint(); + + return Op<T1, op_shuffle_vec>(X); + } + + + +template<typename T1> +arma_warn_unused +arma_inline +typename +enable_if2 + < + is_arma_type<T1>::value && resolves_to_vector<T1>::no, + const Op<T1, op_shuffle> + >::result +shuffle + ( + const T1& X + ) + { + arma_extra_debug_sigprint(); + + return Op<T1, op_shuffle>(X, 0, 0); + } + + + +template<typename T1> +arma_warn_unused +arma_inline +typename +enable_if2 + < + (is_arma_type<T1>::value), + const Op<T1, op_shuffle> + >::result +shuffle + ( + const T1& X, + const uword dim + ) + { + arma_extra_debug_sigprint(); + + return Op<T1, op_shuffle>(X, dim, 0); + } + + + +//! @} |