Hardware AM korrigiert, QPSK angefangen

6 files changed, 48 insertions, 320 deletions

diff --git a/tests/Simulation Hardware/AM/AM_Hardware_Simulation_v1.grc b/tests/Simulation Hardware/AM/AM_Hardware_Simulation_v1.grc
index fced962..da78390 100644
--- a/tests/Simulation Hardware/AM/AM_Hardware_Simulation_v1.grc
+++ b/tests/Simulation Hardware/AM/AM_Hardware_Simulation_v1.grc
@@ -32,18 +32,6 @@ options:
     state: enabled
 
 blocks:
-- name: decim
-  id: variable
-  parameters:
-    comment: ''
-    value: '16'
-  states:
-    bus_sink: false
-    bus_source: false
-    bus_structure: null
-    coordinate: [288, 12.0]
-    rotation: 0
-    state: enabled
 - name: samp_rate
   id: variable
   parameters:
@@ -262,24 +250,6 @@ blocks:
     coordinate: [728, 288.0]
     rotation: 0
     state: true
-- name: blocks_repeat_0
-  id: blocks_repeat
-  parameters:
-    affinity: ''
-    alias: ''
-    comment: ''
-    interp: '20'
-    maxoutbuf: '0'
-    minoutbuf: '0'
-    type: complex
-    vlen: '1'
-  states:
-    bus_sink: false
-    bus_source: false
-    bus_structure: null
-    coordinate: [1528, 316.0]
-    rotation: 0
-    state: true
 - name: freq_xlating_fir_filter_xxx_0
   id: freq_xlating_fir_filter_xxx
   parameters:
@@ -610,7 +580,7 @@ blocks:
     marker7: '-1'
     marker8: '-1'
     marker9: '-1'
-    name: '"Demodul"'
+    name: '"Demodulation"'
     nconnections: '1'
     size: '1024'
     srate: samp_rate
@@ -948,7 +918,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [1768, 236.0]
+    coordinate: [1568, 236.0]
     rotation: 0
     state: true
 - name: uhd_usrp_source_0
@@ -1339,9 +1309,8 @@ connections:
 - [blocks_multiply_xx_0_0, '0', blocks_add_xx_1, '0']
 - [blocks_multiply_xx_0_1, '0', blocks_float_to_complex_0, '0']
 - [blocks_multiply_xx_0_1, '0', qtgui_freq_sink_x_0, '0']
-- [blocks_repeat_0, '0', uhd_usrp_sink_0, '0']
 - [freq_xlating_fir_filter_xxx_0, '0', band_pass_filter_0, '0']
-- [rational_resampler_xxx_0, '0', blocks_repeat_0, '0']
+- [rational_resampler_xxx_0, '0', uhd_usrp_sink_0, '0']
 - [uhd_usrp_source_0, '0', freq_xlating_fir_filter_xxx_0, '0']
 
 metadata:
diff --git a/tests/Simulation Hardware/AM/AM_Hardware_Simulation_v3_dreieck.grc b/tests/Simulation Hardware/AM/AM_Hardware_Simulation_v3_dreieck.grc
index 2fe47e2..6545266 100644
--- a/tests/Simulation Hardware/AM/AM_Hardware_Simulation_v3_dreieck.grc
+++ b/tests/Simulation Hardware/AM/AM_Hardware_Simulation_v3_dreieck.grc
@@ -132,14 +132,14 @@ blocks:
     alias: ''
     amp: '1'
     comment: ''
-    freq: 5e3
+    freq: 10e3
     maxoutbuf: '0'
     minoutbuf: '0'
     offset: '0'
     phase: '0'
     samp_rate: samp_rate
     type: float
-    waveform: analog.GR_SIN_WAVE
+    waveform: analog.GR_TRI_WAVE
   states:
     bus_sink: false
     bus_source: false
@@ -147,28 +147,6 @@ blocks:
     coordinate: [80, 244.0]
     rotation: 0
     state: true
-- name: analog_sig_source_x_0_0
-  id: analog_sig_source_x
-  parameters:
-    affinity: ''
-    alias: ''
-    amp: '10'
-    comment: ''
-    freq: 100E3
-    maxoutbuf: '0'
-    minoutbuf: '0'
-    offset: '0'
-    phase: '0'
-    samp_rate: samp_rate
-    type: float
-    waveform: analog.GR_COS_WAVE
-  states:
-    bus_sink: false
-    bus_source: false
-    bus_structure: null
-    coordinate: [456, 420.0]
-    rotation: 0
-    state: true
 - name: band_pass_filter_0
   id: band_pass_filter
   parameters:
@@ -178,14 +156,14 @@ blocks:
     comment: ''
     decim: '1'
     gain: '1'
-    high_cutoff_freq: 200e3
+    high_cutoff_freq: 100e3
     interp: '1'
     low_cutoff_freq: '500'
     maxoutbuf: '0'
     minoutbuf: '0'
     samp_rate: samp_rate
     type: fir_filter_ccf
-    width: 200e3
+    width: 100e3
     win: firdes.WIN_HAMMING
   states:
     bus_sink: false
@@ -209,7 +187,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [520, 272.0]
+    coordinate: [512, 272.0]
     rotation: 0
     state: true
 - name: blocks_complex_to_real_0
@@ -262,24 +240,6 @@ blocks:
     coordinate: [320, 256.0]
     rotation: 0
     state: true
-- name: blocks_multiply_xx_0_1
-  id: blocks_multiply_xx
-  parameters:
-    affinity: ''
-    alias: ''
-    comment: ''
-    maxoutbuf: '0'
-    minoutbuf: '0'
-    num_inputs: '2'
-    type: float
-    vlen: '1'
-  states:
-    bus_sink: false
-    bus_source: false
-    bus_structure: null
-    coordinate: [728, 288.0]
-    rotation: 0
-    state: true
 - name: blocks_repeat_0
   id: blocks_repeat
   parameters:
@@ -297,7 +257,7 @@ blocks:
     bus_structure: null
     coordinate: [1528, 316.0]
     rotation: 0
-    state: true
+    state: bypassed
 - name: freq_xlating_fir_filter_xxx_0
   id: freq_xlating_fir_filter_xxx
   parameters:
@@ -309,7 +269,7 @@ blocks:
     maxoutbuf: '0'
     minoutbuf: '0'
     samp_rate: samp_rate
-    taps: firdes.low_pass(1,samp_rate,6e3, 2000)
+    taps: firdes.low_pass(1,samp_rate,50e3, 2000)
     type: ccc
   states:
     bus_sink: false
@@ -572,7 +532,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [688, 92.0]
+    coordinate: [680, 84.0]
     rotation: 0
     state: true
 - name: qtgui_time_sink_x_0_0_0_0
@@ -729,7 +689,7 @@ blocks:
     ant7: TX/RX
     ant8: TX/RX
     ant9: TX/RX
-    bw0: 600e3
+    bw0: '0'
     bw1: '0'
     bw10: '0'
     bw11: '0'
@@ -805,7 +765,7 @@ blocks:
     comment: ''
     dev_addr: '"serial=309AF59  "'
     dev_args: '""'
-    gain0: '0.5'
+    gain0: '0.2'
     gain1: '0'
     gain10: '0'
     gain11: '0'
@@ -1006,7 +966,7 @@ blocks:
     ant7: RX2
     ant8: RX2
     ant9: RX2
-    bw0: 400e3
+    bw0: '0'
     bw1: '0'
     bw10: '0'
     bw11: '0'
@@ -1338,7 +1298,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [1088, 572.0]
+    coordinate: [1072, 576.0]
     rotation: 0
     state: true
 
@@ -1348,16 +1308,14 @@ connections:
 - [analog_const_source_x_1, '0', blocks_float_to_complex_0, '1']
 - [analog_pll_carriertracking_cc_0, '0', band_pass_filter_0, '0']
 - [analog_sig_source_x_0, '0', blocks_multiply_xx_0_0, '1']
-- [analog_sig_source_x_0_0, '0', blocks_multiply_xx_0_1, '1']
 - [band_pass_filter_0, '0', blocks_complex_to_real_0, '0']
 - [band_pass_filter_0, '0', qtgui_freq_sink_x_0_0, '0']
-- [blocks_add_xx_1, '0', blocks_multiply_xx_0_1, '0']
+- [blocks_add_xx_1, '0', blocks_float_to_complex_0, '0']
+- [blocks_add_xx_1, '0', qtgui_freq_sink_x_0, '0']
 - [blocks_add_xx_1, '0', qtgui_time_sink_x_0_0, '0']
 - [blocks_complex_to_real_0, '0', qtgui_time_sink_x_0_0_0_0, '0']
 - [blocks_float_to_complex_0, '0', rational_resampler_xxx_0, '0']
 - [blocks_multiply_xx_0_0, '0', blocks_add_xx_1, '0']
-- [blocks_multiply_xx_0_1, '0', blocks_float_to_complex_0, '0']
-- [blocks_multiply_xx_0_1, '0', qtgui_freq_sink_x_0, '0']
 - [blocks_repeat_0, '0', uhd_usrp_sink_0, '0']
 - [freq_xlating_fir_filter_xxx_0, '0', analog_pll_carriertracking_cc_0, '0']
 - [rational_resampler_xxx_0, '0', blocks_repeat_0, '0']
diff --git a/tests/Simulation Hardware/AM/AM_Hardware_Simulation_v2.grc b/tests/Simulation Hardware/AM/AM_Hardware_Simulation_v4.grc
index 2e94c04..0970ba1 100644
--- a/tests/Simulation Hardware/AM/AM_Hardware_Simulation_v2.grc
+++ b/tests/Simulation Hardware/AM/AM_Hardware_Simulation_v4.grc
@@ -10,7 +10,7 @@ options:
     gen_linking: dynamic
     generate_options: qt_gui
     hier_block_src_path: '.:'
-    id: AM_Simulation_v2
+    id: AM_Simulation_v1
     max_nouts: '0'
     output_language: python
     placement: (0,0)
@@ -21,7 +21,7 @@ options:
     run_options: prompt
     sizing_mode: fixed
     thread_safe_setters: ''
-    title: AM_Simulation_v2
+    title: AM_Simulation_v1
     window_size: ''
   states:
     bus_sink: false
@@ -32,18 +32,6 @@ options:
     state: enabled
 
 blocks:
-- name: decim
-  id: variable
-  parameters:
-    comment: ''
-    value: '16'
-  states:
-    bus_sink: false
-    bus_source: false
-    bus_structure: null
-    coordinate: [288, 12.0]
-    rotation: 0
-    state: enabled
 - name: samp_rate
   id: variable
   parameters:
@@ -104,7 +92,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [880, 332.0]
+    coordinate: [736, 316.0]
     rotation: 0
     state: true
 - name: analog_sig_source_x_0
@@ -121,34 +109,12 @@ blocks:
     phase: '0'
     samp_rate: samp_rate
     type: float
-    waveform: analog.GR_COS_WAVE
+    waveform: analog.GR_SIN_WAVE
   states:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [80, 244.0]
-    rotation: 0
-    state: true
-- name: analog_sig_source_x_0_0
-  id: analog_sig_source_x
-  parameters:
-    affinity: ''
-    alias: ''
-    amp: '10'
-    comment: ''
-    freq: 100E3
-    maxoutbuf: '0'
-    minoutbuf: '0'
-    offset: '0'
-    phase: '0'
-    samp_rate: samp_rate
-    type: float
-    waveform: analog.GR_COS_WAVE
-  states:
-    bus_sink: false
-    bus_source: false
-    bus_structure: null
-    coordinate: [456, 420.0]
+    coordinate: [96, 244.0]
     rotation: 0
     state: true
 - name: band_pass_filter_0
@@ -223,7 +189,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [1096, 304.0]
+    coordinate: [976, 288.0]
     rotation: 0
     state: true
 - name: blocks_multiply_xx_0_0
@@ -244,65 +210,6 @@ blocks:
     coordinate: [320, 256.0]
     rotation: 0
     state: true
-- name: blocks_multiply_xx_0_1
-  id: blocks_multiply_xx
-  parameters:
-    affinity: ''
-    alias: ''
-    comment: ''
-    maxoutbuf: '0'
-    minoutbuf: '0'
-    num_inputs: '2'
-    type: float
-    vlen: '1'
-  states:
-    bus_sink: false
-    bus_source: false
-    bus_structure: null
-    coordinate: [728, 288.0]
-    rotation: 0
-    state: true
-- name: blocks_repeat_0
-  id: blocks_repeat
-  parameters:
-    affinity: ''
-    alias: ''
-    comment: ''
-    interp: '20'
-    maxoutbuf: '0'
-    minoutbuf: '0'
-    type: complex
-    vlen: '1'
-  states:
-    bus_sink: false
-    bus_source: false
-    bus_structure: null
-    coordinate: [1528, 316.0]
-    rotation: 0
-    state: true
-- name: digital_pfb_clock_sync_xxx_0
-  id: digital_pfb_clock_sync_xxx
-  parameters:
-    affinity: ''
-    alias: ''
-    comment: ''
-    filter_size: '32'
-    init_phase: '16'
-    loop_bw: '62.8e-3'
-    max_dev: '1.5'
-    maxoutbuf: '0'
-    minoutbuf: '0'
-    osps: '1'
-    sps: '4.004'
-    taps: '2'
-    type: ccf
-  states:
-    bus_sink: false
-    bus_source: false
-    bus_structure: null
-    coordinate: [1480, 796.0]
-    rotation: 0
-    state: true
 - name: freq_xlating_fir_filter_xxx_0
   id: freq_xlating_fir_filter_xxx
   parameters:
@@ -323,98 +230,6 @@ blocks:
     coordinate: [1504, 636.0]
     rotation: 0
     state: true
-- name: qtgui_const_sink_x_0
-  id: qtgui_const_sink_x
-  parameters:
-    affinity: ''
-    alias: ''
-    alpha1: '1.0'
-    alpha10: '1.0'
-    alpha2: '1.0'
-    alpha3: '1.0'
-    alpha4: '1.0'
-    alpha5: '1.0'
-    alpha6: '1.0'
-    alpha7: '1.0'
-    alpha8: '1.0'
-    alpha9: '1.0'
-    autoscale: 'False'
-    axislabels: 'True'
-    color1: '"blue"'
-    color10: '"red"'
-    color2: '"red"'
-    color3: '"red"'
-    color4: '"red"'
-    color5: '"red"'
-    color6: '"red"'
-    color7: '"red"'
-    color8: '"red"'
-    color9: '"red"'
-    comment: ''
-    grid: 'False'
-    gui_hint: ''
-    label1: ''
-    label10: ''
-    label2: ''
-    label3: ''
-    label4: ''
-    label5: ''
-    label6: ''
-    label7: ''
-    label8: ''
-    label9: ''
-    legend: 'True'
-    marker1: '0'
-    marker10: '0'
-    marker2: '0'
-    marker3: '0'
-    marker4: '0'
-    marker5: '0'
-    marker6: '0'
-    marker7: '0'
-    marker8: '0'
-    marker9: '0'
-    name: '""'
-    nconnections: '1'
-    size: '1024'
-    style1: '0'
-    style10: '0'
-    style2: '0'
-    style3: '0'
-    style4: '0'
-    style5: '0'
-    style6: '0'
-    style7: '0'
-    style8: '0'
-    style9: '0'
-    tr_chan: '0'
-    tr_level: '0.0'
-    tr_mode: qtgui.TRIG_MODE_FREE
-    tr_slope: qtgui.TRIG_SLOPE_POS
-    tr_tag: '""'
-    type: complex
-    update_time: '0.10'
-    width1: '1'
-    width10: '1'
-    width2: '1'
-    width3: '1'
-    width4: '1'
-    width5: '1'
-    width6: '1'
-    width7: '1'
-    width8: '1'
-    width9: '1'
-    xmax: '2'
-    xmin: '-2'
-    ymax: '2'
-    ymin: '-2'
-  states:
-    bus_sink: false
-    bus_source: false
-    bus_structure: null
-    coordinate: [1776, 788.0]
-    rotation: 0
-    state: true
 - name: qtgui_freq_sink_x_0
   id: qtgui_freq_sink_x
   parameters:
@@ -492,7 +307,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [896, 456.0]
+    coordinate: [648, 408.0]
     rotation: 0
     state: true
 - name: qtgui_freq_sink_x_0_0
@@ -669,7 +484,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [688, 132.0]
+    coordinate: [648, 132.0]
     rotation: 0
     state: true
 - name: qtgui_time_sink_x_0_0_0_0
@@ -725,7 +540,7 @@ blocks:
     marker7: '-1'
     marker8: '-1'
     marker9: '-1'
-    name: '"Demodul"'
+    name: '"Demodulation"'
     nconnections: '1'
     size: '1024'
     srate: samp_rate
@@ -786,7 +601,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [1304, 292.0]
+    coordinate: [1200, 276.0]
     rotation: 0
     state: true
 - name: uhd_usrp_sink_0
@@ -826,7 +641,7 @@ blocks:
     ant7: TX/RX
     ant8: TX/RX
     ant9: TX/RX
-    bw0: 400e3
+    bw0: '0'
     bw1: '0'
     bw10: '0'
     bw11: '0'
@@ -891,7 +706,7 @@ blocks:
     center_freq8: '0'
     center_freq9: '0'
     clock_rate: 0e0
-    clock_source0: ''
+    clock_source0: external
     clock_source1: ''
     clock_source2: ''
     clock_source3: ''
@@ -902,7 +717,7 @@ blocks:
     comment: ''
     dev_addr: '"serial=309AF59  "'
     dev_args: '""'
-    gain0: '0.5'
+    gain0: '0.2'
     gain1: '0'
     gain10: '0'
     gain11: '0'
@@ -1063,7 +878,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [1768, 236.0]
+    coordinate: [1480, 228.0]
     rotation: 0
     state: true
 - name: uhd_usrp_source_0
@@ -1103,7 +918,7 @@ blocks:
     ant7: RX2
     ant8: RX2
     ant9: RX2
-    bw0: 400e3
+    bw0: '0'
     bw1: '0'
     bw10: '0'
     bw11: '0'
@@ -1168,7 +983,7 @@ blocks:
     center_freq8: '0'
     center_freq9: '0'
     clock_rate: 0e0
-    clock_source0: ''
+    clock_source0: external
     clock_source1: ''
     clock_source2: ''
     clock_source3: ''
@@ -1435,7 +1250,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [1200, 572.0]
+    coordinate: [1200, 580.0]
     rotation: 0
     state: true
 
@@ -1444,21 +1259,16 @@ connections:
 - [analog_const_source_x_0_0, '0', blocks_add_xx_1, '1']
 - [analog_const_source_x_1, '0', blocks_float_to_complex_0, '1']
 - [analog_sig_source_x_0, '0', blocks_multiply_xx_0_0, '1']
-- [analog_sig_source_x_0_0, '0', blocks_multiply_xx_0_1, '1']
 - [band_pass_filter_0, '0', blocks_complex_to_real_0, '0']
 - [band_pass_filter_0, '0', qtgui_freq_sink_x_0_0, '0']
-- [blocks_add_xx_1, '0', blocks_multiply_xx_0_1, '0']
+- [blocks_add_xx_1, '0', blocks_float_to_complex_0, '0']
+- [blocks_add_xx_1, '0', qtgui_freq_sink_x_0, '0']
 - [blocks_add_xx_1, '0', qtgui_time_sink_x_0_0, '0']
 - [blocks_complex_to_real_0, '0', qtgui_time_sink_x_0_0_0_0, '0']
 - [blocks_float_to_complex_0, '0', rational_resampler_xxx_0, '0']
 - [blocks_multiply_xx_0_0, '0', blocks_add_xx_1, '0']
-- [blocks_multiply_xx_0_1, '0', blocks_float_to_complex_0, '0']
-- [blocks_multiply_xx_0_1, '0', qtgui_freq_sink_x_0, '0']
-- [blocks_repeat_0, '0', uhd_usrp_sink_0, '0']
-- [digital_pfb_clock_sync_xxx_0, '0', qtgui_const_sink_x_0, '0']
 - [freq_xlating_fir_filter_xxx_0, '0', band_pass_filter_0, '0']
-- [rational_resampler_xxx_0, '0', blocks_repeat_0, '0']
-- [uhd_usrp_source_0, '0', digital_pfb_clock_sync_xxx_0, '0']
+- [rational_resampler_xxx_0, '0', uhd_usrp_sink_0, '0']
 - [uhd_usrp_source_0, '0', freq_xlating_fir_filter_xxx_0, '0']
 
 metadata:
diff --git a/tests/Simulation Hardware/AM/AM_Simulation_v1.py b/tests/Simulation Hardware/AM/AM_Simulation_v1.py
index 97be120..4b90f26 100755
--- a/tests/Simulation Hardware/AM/AM_Simulation_v1.py
+++ b/tests/Simulation Hardware/AM/AM_Simulation_v1.py
@@ -93,7 +93,6 @@ class AM_Simulation_v1(gr.top_block, Qt.QWidget):
         self.uhd_usrp_source_0.set_center_freq(223e6, 0)
         self.uhd_usrp_source_0.set_normalized_gain(0.5, 0)
         self.uhd_usrp_source_0.set_antenna('RX2', 0)
-        self.uhd_usrp_source_0.set_bandwidth(400e3, 0)
         self.uhd_usrp_source_0.set_samp_rate(samp_rate)
         self.uhd_usrp_source_0.set_time_unknown_pps(uhd.time_spec())
         self.uhd_usrp_sink_0 = uhd.usrp_sink(
@@ -107,9 +106,8 @@ class AM_Simulation_v1(gr.top_block, Qt.QWidget):
         )
         self.uhd_usrp_sink_0.set_clock_source('external', 0)
         self.uhd_usrp_sink_0.set_center_freq(223e6, 0)
-        self.uhd_usrp_sink_0.set_normalized_gain(0.5, 0)
+        self.uhd_usrp_sink_0.set_normalized_gain(0.2, 0)
         self.uhd_usrp_sink_0.set_antenna('TX/RX', 0)
-        self.uhd_usrp_sink_0.set_bandwidth(600e3, 0)
         self.uhd_usrp_sink_0.set_samp_rate(samp_rate)
         self.uhd_usrp_sink_0.set_time_unknown_pps(uhd.time_spec())
         self.rational_resampler_xxx_0 = filter.rational_resampler_ccc(
@@ -308,9 +306,7 @@ class AM_Simulation_v1(gr.top_block, Qt.QWidget):
             self.top_grid_layout.setRowStretch(r, 1)
         for c in range(0, 1):
             self.top_grid_layout.setColumnStretch(c, 1)
-        self.freq_xlating_fir_filter_xxx_0 = filter.freq_xlating_fir_filter_ccc(1, firdes.low_pass(1,samp_rate,6e3, 2000), 0, samp_rate)
-        self.blocks_repeat_0 = blocks.repeat(gr.sizeof_gr_complex*1, 20)
-        self.blocks_multiply_xx_0_1 = blocks.multiply_vff(1)
+        self.freq_xlating_fir_filter_xxx_0 = filter.freq_xlating_fir_filter_ccc(1, firdes.low_pass(1,samp_rate,50e3, 2000), 0, samp_rate)
         self.blocks_multiply_xx_0_0 = blocks.multiply_vff(1)
         self.blocks_float_to_complex_0 = blocks.float_to_complex(1)
         self.blocks_complex_to_real_0 = blocks.complex_to_real(1)
@@ -321,12 +317,11 @@ class AM_Simulation_v1(gr.top_block, Qt.QWidget):
                 1,
                 samp_rate,
                 500,
-                200e3,
-                200e3,
+                100e3,
+                100e3,
                 firdes.WIN_HAMMING,
                 6.76))
-        self.analog_sig_source_x_0_0 = analog.sig_source_f(samp_rate, analog.GR_COS_WAVE, 100E3, 10, 0, 0)
-        self.analog_sig_source_x_0 = analog.sig_source_f(samp_rate, analog.GR_SIN_WAVE, 5e3, 1, 0, 0)
+        self.analog_sig_source_x_0 = analog.sig_source_f(samp_rate, analog.GR_TRI_WAVE, 10e3, 1, 0, 0)
         self.analog_const_source_x_1 = analog.sig_source_f(0, analog.GR_CONST_WAVE, 0, 0, 0)
         self.analog_const_source_x_0_0 = analog.sig_source_f(0, analog.GR_CONST_WAVE, 0, 0, 0)
         self.analog_const_source_x_0 = analog.sig_source_f(0, analog.GR_CONST_WAVE, 0, 0, 700e-3)
@@ -340,19 +335,16 @@ class AM_Simulation_v1(gr.top_block, Qt.QWidget):
         self.connect((self.analog_const_source_x_0_0, 0), (self.blocks_add_xx_1, 1))
         self.connect((self.analog_const_source_x_1, 0), (self.blocks_float_to_complex_0, 1))
         self.connect((self.analog_sig_source_x_0, 0), (self.blocks_multiply_xx_0_0, 1))
-        self.connect((self.analog_sig_source_x_0_0, 0), (self.blocks_multiply_xx_0_1, 1))
         self.connect((self.band_pass_filter_0, 0), (self.blocks_complex_to_real_0, 0))
         self.connect((self.band_pass_filter_0, 0), (self.qtgui_freq_sink_x_0_0, 0))
-        self.connect((self.blocks_add_xx_1, 0), (self.blocks_multiply_xx_0_1, 0))
+        self.connect((self.blocks_add_xx_1, 0), (self.blocks_float_to_complex_0, 0))
+        self.connect((self.blocks_add_xx_1, 0), (self.qtgui_freq_sink_x_0, 0))
         self.connect((self.blocks_add_xx_1, 0), (self.qtgui_time_sink_x_0_0, 0))
         self.connect((self.blocks_complex_to_real_0, 0), (self.qtgui_time_sink_x_0_0_0_0, 0))
         self.connect((self.blocks_float_to_complex_0, 0), (self.rational_resampler_xxx_0, 0))
         self.connect((self.blocks_multiply_xx_0_0, 0), (self.blocks_add_xx_1, 0))
-        self.connect((self.blocks_multiply_xx_0_1, 0), (self.blocks_float_to_complex_0, 0))
-        self.connect((self.blocks_multiply_xx_0_1, 0), (self.qtgui_freq_sink_x_0, 0))
-        self.connect((self.blocks_repeat_0, 0), (self.uhd_usrp_sink_0, 0))
         self.connect((self.freq_xlating_fir_filter_xxx_0, 0), (self.band_pass_filter_0, 0))
-        self.connect((self.rational_resampler_xxx_0, 0), (self.blocks_repeat_0, 0))
+        self.connect((self.rational_resampler_xxx_0, 0), (self.uhd_usrp_sink_0, 0))
         self.connect((self.uhd_usrp_source_0, 0), (self.freq_xlating_fir_filter_xxx_0, 0))
 
 
@@ -367,9 +359,8 @@ class AM_Simulation_v1(gr.top_block, Qt.QWidget):
     def set_samp_rate(self, samp_rate):
         self.samp_rate = samp_rate
         self.analog_sig_source_x_0.set_sampling_freq(self.samp_rate)
-        self.analog_sig_source_x_0_0.set_sampling_freq(self.samp_rate)
-        self.band_pass_filter_0.set_taps(firdes.band_pass(1, self.samp_rate, 500, 200e3, 200e3, firdes.WIN_HAMMING, 6.76))
-        self.freq_xlating_fir_filter_xxx_0.set_taps(firdes.low_pass(1,self.samp_rate,6e3, 2000))
+        self.band_pass_filter_0.set_taps(firdes.band_pass(1, self.samp_rate, 500, 100e3, 100e3, firdes.WIN_HAMMING, 6.76))
+        self.freq_xlating_fir_filter_xxx_0.set_taps(firdes.low_pass(1,self.samp_rate,50e3, 2000))
         self.qtgui_freq_sink_x_0.set_frequency_range(0, self.samp_rate)
         self.qtgui_freq_sink_x_0_0.set_frequency_range(0, self.samp_rate)
         self.qtgui_time_sink_x_0_0.set_samp_rate(self.samp_rate)
diff --git a/tests/Simulation Hardware/AM/AM_Simulation_v1_1027.png b/tests/Simulation Hardware/AM/AM_Simulation_v1_1027.png
new file mode 100644
index 0000000..930d027
--- /dev/null
+++ b/tests/Simulation Hardware/AM/AM_Simulation_v1_1027.png
diff --git a/tests/Simulation Hardware/AM/AM_Simulation_v2.py b/tests/Simulation Hardware/AM/AM_Simulation_v2.py
index 53a7fce..4069cb0 100755
--- a/tests/Simulation Hardware/AM/AM_Simulation_v2.py
+++ b/tests/Simulation Hardware/AM/AM_Simulation_v2.py
@@ -348,7 +348,7 @@ class AM_Simulation_v2(gr.top_block, Qt.QWidget):
         self._qtgui_const_sink_x_0_win = sip.wrapinstance(self.qtgui_const_sink_x_0.pyqwidget(), Qt.QWidget)
         self.top_grid_layout.addWidget(self._qtgui_const_sink_x_0_win)
         self.freq_xlating_fir_filter_xxx_0 = filter.freq_xlating_fir_filter_ccc(1, firdes.low_pass(1,samp_rate,6e3, 2000), 0, samp_rate)
-        self.digital_pfb_clock_sync_xxx_0 = digital.pfb_clock_sync_ccf(4.004, 62.8e-3, [2], 32, 16, 1.5, 1)
+        self.digital_pfb_clock_sync_xxx_0 = digital.pfb_clock_sync_ccf(4.004, 62.8e-3, [1], 32, 16, 1.5, 1)
         self.blocks_repeat_0 = blocks.repeat(gr.sizeof_gr_complex*1, 20)
         self.blocks_multiply_xx_0_1 = blocks.multiply_vff(1)
         self.blocks_multiply_xx_0_0 = blocks.multiply_vff(1)