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authorNao Pross <np@0hm.ch>2021-08-25 17:20:43 +0200
committerNao Pross <np@0hm.ch>2021-08-25 17:20:43 +0200
commit121b12c5550bf430053ff1fe0874d059e0355436 (patch)
tree5ef92ae1a0ce93aff33ed15e66cddec1c26a6702 /tex
parentTypos, add abstract and samples, finish workflow diagram (diff)
parentSmall corrections (diff)
downloadDigDes-121b12c5550bf430053ff1fe0874d059e0355436.tar.gz
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Merge remote-tracking branch 'origin/master'
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-rw-r--r--tex/vhdl.tex2
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diff --git a/tex/vhdl.tex b/tex/vhdl.tex
index 6cf160c..06dabd0 100644
--- a/tex/vhdl.tex
+++ b/tex/vhdl.tex
@@ -548,7 +548,7 @@ statements, the following applies:
\item Neither selective (\vhdl{with}) nor conditional (\vhdl{when}) should be used.
They are replaced with new sequential constructs (\vhdl{if} and \vhdl{case}).
\item Signal assignments (with \vhdl{<=}) change their value
- \emph{only at the end of the process}.
+ \emph{only at the next} \vhdl{wait for} \emph{statement or at the end of the process}.
\item Variables on the other hand change as soon as they are assigned (with \vhdl{:=}).
\end{itemize}
And for good practice: